]> git.ipfire.org Git - people/ms/u-boot.git/blame - drivers/mmc/mmc.c
mmc: Fix incorrect handling of 'read' & 'write' commands
[people/ms/u-boot.git] / drivers / mmc / mmc.c
CommitLineData
272cc70b
AF
1/*
2 * Copyright 2008, Freescale Semiconductor, Inc
3 * Andy Fleming
4 *
5 * Based vaguely on the Linux code
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include <config.h>
27#include <common.h>
28#include <command.h>
29#include <mmc.h>
30#include <part.h>
31#include <malloc.h>
32#include <linux/list.h>
9b1f942c 33#include <div64.h>
272cc70b 34
ce0fbcd2
MW
35/* Set block count limit because of 16 bit register limit on some hardware*/
36#ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT
37#define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535
38#endif
39
272cc70b
AF
40static struct list_head mmc_devices;
41static int cur_dev_num = -1;
42
314284b1 43int __board_mmc_getcd(struct mmc *mmc) {
11fdade2
SB
44 return -1;
45}
46
314284b1 47int board_mmc_getcd(struct mmc *mmc)__attribute__((weak,
11fdade2
SB
48 alias("__board_mmc_getcd")));
49
fdbb873e
KP
50static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
51 struct mmc_data *data)
272cc70b 52{
8635ff9e 53 struct mmc_data backup;
5db2fe3a 54 int ret;
8635ff9e
MV
55
56 memset(&backup, 0, sizeof(backup));
57
8635ff9e 58#ifdef CONFIG_MMC_TRACE
5db2fe3a
RR
59 int i;
60 u8 *ptr;
61
62 printf("CMD_SEND:%d\n", cmd->cmdidx);
63 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
5db2fe3a
RR
64 ret = mmc->send_cmd(mmc, cmd, data);
65 switch (cmd->resp_type) {
66 case MMC_RSP_NONE:
67 printf("\t\tMMC_RSP_NONE\n");
68 break;
69 case MMC_RSP_R1:
70 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
71 cmd->response[0]);
72 break;
73 case MMC_RSP_R1b:
74 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
75 cmd->response[0]);
76 break;
77 case MMC_RSP_R2:
78 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
79 cmd->response[0]);
80 printf("\t\t \t\t 0x%08X \n",
81 cmd->response[1]);
82 printf("\t\t \t\t 0x%08X \n",
83 cmd->response[2]);
84 printf("\t\t \t\t 0x%08X \n",
85 cmd->response[3]);
86 printf("\n");
87 printf("\t\t\t\t\tDUMPING DATA\n");
88 for (i = 0; i < 4; i++) {
89 int j;
90 printf("\t\t\t\t\t%03d - ", i*4);
146bec79 91 ptr = (u8 *)&cmd->response[i];
5db2fe3a
RR
92 ptr += 3;
93 for (j = 0; j < 4; j++)
94 printf("%02X ", *ptr--);
95 printf("\n");
96 }
97 break;
98 case MMC_RSP_R3:
99 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
100 cmd->response[0]);
101 break;
102 default:
103 printf("\t\tERROR MMC rsp not supported\n");
104 break;
105 }
5db2fe3a 106#else
8635ff9e 107 ret = mmc->send_cmd(mmc, cmd, data);
5db2fe3a 108#endif
8635ff9e 109 return ret;
272cc70b
AF
110}
111
fdbb873e 112static int mmc_send_status(struct mmc *mmc, int timeout)
5d4fc8d9
RR
113{
114 struct mmc_cmd cmd;
d617c426 115 int err, retries = 5;
5d4fc8d9
RR
116#ifdef CONFIG_MMC_TRACE
117 int status;
118#endif
119
120 cmd.cmdidx = MMC_CMD_SEND_STATUS;
121 cmd.resp_type = MMC_RSP_R1;
aaf3d41a
MV
122 if (!mmc_host_is_spi(mmc))
123 cmd.cmdarg = mmc->rca << 16;
5d4fc8d9
RR
124
125 do {
126 err = mmc_send_cmd(mmc, &cmd, NULL);
d617c426
JK
127 if (!err) {
128 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
129 (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
130 MMC_STATE_PRG)
131 break;
132 else if (cmd.response[0] & MMC_STATUS_MASK) {
133 printf("Status Error: 0x%08X\n",
134 cmd.response[0]);
135 return COMM_ERR;
136 }
137 } else if (--retries < 0)
5d4fc8d9 138 return err;
5d4fc8d9
RR
139
140 udelay(1000);
141
5d4fc8d9
RR
142 } while (timeout--);
143
5db2fe3a
RR
144#ifdef CONFIG_MMC_TRACE
145 status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
146 printf("CURR STATE:%d\n", status);
147#endif
5b0c942f 148 if (timeout <= 0) {
5d4fc8d9
RR
149 printf("Timeout waiting card ready\n");
150 return TIMEOUT;
151 }
152
153 return 0;
154}
155
fdbb873e 156static int mmc_set_blocklen(struct mmc *mmc, int len)
272cc70b
AF
157{
158 struct mmc_cmd cmd;
159
160 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
161 cmd.resp_type = MMC_RSP_R1;
162 cmd.cmdarg = len;
272cc70b
AF
163
164 return mmc_send_cmd(mmc, &cmd, NULL);
165}
166
167struct mmc *find_mmc_device(int dev_num)
168{
169 struct mmc *m;
170 struct list_head *entry;
171
172 list_for_each(entry, &mmc_devices) {
173 m = list_entry(entry, struct mmc, link);
174
175 if (m->block_dev.dev == dev_num)
176 return m;
177 }
178
179 printf("MMC Device %d not found\n", dev_num);
180
181 return NULL;
182}
183
e6f99a56
LW
184static ulong mmc_erase_t(struct mmc *mmc, ulong start, lbaint_t blkcnt)
185{
186 struct mmc_cmd cmd;
187 ulong end;
188 int err, start_cmd, end_cmd;
189
190 if (mmc->high_capacity)
191 end = start + blkcnt - 1;
192 else {
193 end = (start + blkcnt - 1) * mmc->write_bl_len;
194 start *= mmc->write_bl_len;
195 }
196
197 if (IS_SD(mmc)) {
198 start_cmd = SD_CMD_ERASE_WR_BLK_START;
199 end_cmd = SD_CMD_ERASE_WR_BLK_END;
200 } else {
201 start_cmd = MMC_CMD_ERASE_GROUP_START;
202 end_cmd = MMC_CMD_ERASE_GROUP_END;
203 }
204
205 cmd.cmdidx = start_cmd;
206 cmd.cmdarg = start;
207 cmd.resp_type = MMC_RSP_R1;
e6f99a56
LW
208
209 err = mmc_send_cmd(mmc, &cmd, NULL);
210 if (err)
211 goto err_out;
212
213 cmd.cmdidx = end_cmd;
214 cmd.cmdarg = end;
215
216 err = mmc_send_cmd(mmc, &cmd, NULL);
217 if (err)
218 goto err_out;
219
220 cmd.cmdidx = MMC_CMD_ERASE;
221 cmd.cmdarg = SECURE_ERASE;
222 cmd.resp_type = MMC_RSP_R1b;
223
224 err = mmc_send_cmd(mmc, &cmd, NULL);
225 if (err)
226 goto err_out;
227
228 return 0;
229
230err_out:
231 puts("mmc erase failed\n");
232 return err;
233}
234
235static unsigned long
236mmc_berase(int dev_num, unsigned long start, lbaint_t blkcnt)
237{
238 int err = 0;
239 struct mmc *mmc = find_mmc_device(dev_num);
240 lbaint_t blk = 0, blk_r = 0;
d2d8afae 241 int timeout = 1000;
e6f99a56
LW
242
243 if (!mmc)
244 return -1;
245
246 if ((start % mmc->erase_grp_size) || (blkcnt % mmc->erase_grp_size))
247 printf("\n\nCaution! Your devices Erase group is 0x%x\n"
248 "The erase range would be change to 0x%lx~0x%lx\n\n",
249 mmc->erase_grp_size, start & ~(mmc->erase_grp_size - 1),
250 ((start + blkcnt + mmc->erase_grp_size)
251 & ~(mmc->erase_grp_size - 1)) - 1);
252
253 while (blk < blkcnt) {
254 blk_r = ((blkcnt - blk) > mmc->erase_grp_size) ?
255 mmc->erase_grp_size : (blkcnt - blk);
256 err = mmc_erase_t(mmc, start + blk, blk_r);
257 if (err)
258 break;
259
260 blk += blk_r;
d2d8afae
JH
261
262 /* Waiting for the ready status */
263 if (mmc_send_status(mmc, timeout))
264 return 0;
e6f99a56
LW
265 }
266
267 return blk;
268}
269
272cc70b 270static ulong
0158126e 271mmc_write_blocks(struct mmc *mmc, ulong start, lbaint_t blkcnt, const void*src)
272cc70b
AF
272{
273 struct mmc_cmd cmd;
274 struct mmc_data data;
5d4fc8d9 275 int timeout = 1000;
272cc70b 276
d2bf29e3 277 if ((start + blkcnt) > mmc->block_dev.lba) {
def412b6 278 printf("MMC: block number 0x%lx exceeds max(0x%lx)\n",
d2bf29e3
LW
279 start + blkcnt, mmc->block_dev.lba);
280 return 0;
281 }
272cc70b
AF
282
283 if (blkcnt > 1)
284 cmd.cmdidx = MMC_CMD_WRITE_MULTIPLE_BLOCK;
285 else
286 cmd.cmdidx = MMC_CMD_WRITE_SINGLE_BLOCK;
287
288 if (mmc->high_capacity)
289 cmd.cmdarg = start;
290 else
def412b6 291 cmd.cmdarg = start * mmc->write_bl_len;
272cc70b
AF
292
293 cmd.resp_type = MMC_RSP_R1;
272cc70b
AF
294
295 data.src = src;
296 data.blocks = blkcnt;
def412b6 297 data.blocksize = mmc->write_bl_len;
272cc70b
AF
298 data.flags = MMC_DATA_WRITE;
299
def412b6
SS
300 if (mmc_send_cmd(mmc, &cmd, &data)) {
301 printf("mmc write failed\n");
302 return 0;
272cc70b
AF
303 }
304
d52ebf10
TC
305 /* SPI multiblock writes terminate using a special
306 * token, not a STOP_TRANSMISSION request.
307 */
308 if (!mmc_host_is_spi(mmc) && blkcnt > 1) {
272cc70b
AF
309 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
310 cmd.cmdarg = 0;
311 cmd.resp_type = MMC_RSP_R1b;
def412b6
SS
312 if (mmc_send_cmd(mmc, &cmd, NULL)) {
313 printf("mmc fail to send stop cmd\n");
314 return 0;
0158126e 315 }
272cc70b
AF
316 }
317
93ad0d18
JK
318 /* Waiting for the ready status */
319 if (mmc_send_status(mmc, timeout))
320 return 0;
321
272cc70b
AF
322 return blkcnt;
323}
324
0158126e
LW
325static ulong
326mmc_bwrite(int dev_num, ulong start, lbaint_t blkcnt, const void*src)
327{
0158126e
LW
328 lbaint_t cur, blocks_todo = blkcnt;
329
def412b6 330 struct mmc *mmc = find_mmc_device(dev_num);
0158126e 331 if (!mmc)
def412b6 332 return 0;
0158126e 333
def412b6
SS
334 if (mmc_set_blocklen(mmc, mmc->write_bl_len))
335 return 0;
0158126e
LW
336
337 do {
8feafcc4 338 cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo;
0158126e 339 if(mmc_write_blocks(mmc, start, cur, src) != cur)
def412b6 340 return 0;
0158126e
LW
341 blocks_todo -= cur;
342 start += cur;
343 src += cur * mmc->write_bl_len;
344 } while (blocks_todo > 0);
345
346 return blkcnt;
347}
348
fdbb873e
KP
349static int mmc_read_blocks(struct mmc *mmc, void *dst, ulong start,
350 lbaint_t blkcnt)
272cc70b
AF
351{
352 struct mmc_cmd cmd;
353 struct mmc_data data;
354
4a1a06bc
AS
355 if (blkcnt > 1)
356 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
357 else
358 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
272cc70b
AF
359
360 if (mmc->high_capacity)
4a1a06bc 361 cmd.cmdarg = start;
272cc70b 362 else
4a1a06bc 363 cmd.cmdarg = start * mmc->read_bl_len;
272cc70b
AF
364
365 cmd.resp_type = MMC_RSP_R1;
272cc70b
AF
366
367 data.dest = dst;
4a1a06bc 368 data.blocks = blkcnt;
272cc70b
AF
369 data.blocksize = mmc->read_bl_len;
370 data.flags = MMC_DATA_READ;
371
4a1a06bc
AS
372 if (mmc_send_cmd(mmc, &cmd, &data))
373 return 0;
272cc70b 374
4a1a06bc
AS
375 if (blkcnt > 1) {
376 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
377 cmd.cmdarg = 0;
378 cmd.resp_type = MMC_RSP_R1b;
4a1a06bc
AS
379 if (mmc_send_cmd(mmc, &cmd, NULL)) {
380 printf("mmc fail to send stop cmd\n");
381 return 0;
382 }
272cc70b
AF
383 }
384
4a1a06bc 385 return blkcnt;
272cc70b
AF
386}
387
388static ulong mmc_bread(int dev_num, ulong start, lbaint_t blkcnt, void *dst)
389{
4a1a06bc
AS
390 lbaint_t cur, blocks_todo = blkcnt;
391
392 if (blkcnt == 0)
393 return 0;
272cc70b 394
4a1a06bc 395 struct mmc *mmc = find_mmc_device(dev_num);
272cc70b
AF
396 if (!mmc)
397 return 0;
398
d2bf29e3 399 if ((start + blkcnt) > mmc->block_dev.lba) {
4a1a06bc 400 printf("MMC: block number 0x%lx exceeds max(0x%lx)\n",
d2bf29e3
LW
401 start + blkcnt, mmc->block_dev.lba);
402 return 0;
403 }
272cc70b 404
4a1a06bc 405 if (mmc_set_blocklen(mmc, mmc->read_bl_len))
272cc70b 406 return 0;
272cc70b 407
4a1a06bc 408 do {
8feafcc4 409 cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo;
4a1a06bc
AS
410 if(mmc_read_blocks(mmc, dst, start, cur) != cur)
411 return 0;
412 blocks_todo -= cur;
413 start += cur;
414 dst += cur * mmc->read_bl_len;
415 } while (blocks_todo > 0);
272cc70b
AF
416
417 return blkcnt;
418}
419
fdbb873e 420static int mmc_go_idle(struct mmc *mmc)
272cc70b
AF
421{
422 struct mmc_cmd cmd;
423 int err;
424
425 udelay(1000);
426
427 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
428 cmd.cmdarg = 0;
429 cmd.resp_type = MMC_RSP_NONE;
272cc70b
AF
430
431 err = mmc_send_cmd(mmc, &cmd, NULL);
432
433 if (err)
434 return err;
435
436 udelay(2000);
437
438 return 0;
439}
440
fdbb873e 441static int sd_send_op_cond(struct mmc *mmc)
272cc70b
AF
442{
443 int timeout = 1000;
444 int err;
445 struct mmc_cmd cmd;
446
447 do {
448 cmd.cmdidx = MMC_CMD_APP_CMD;
449 cmd.resp_type = MMC_RSP_R1;
450 cmd.cmdarg = 0;
272cc70b
AF
451
452 err = mmc_send_cmd(mmc, &cmd, NULL);
453
454 if (err)
455 return err;
456
457 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
458 cmd.resp_type = MMC_RSP_R3;
250de12b
SB
459
460 /*
461 * Most cards do not answer if some reserved bits
462 * in the ocr are set. However, Some controller
463 * can set bit 7 (reserved for low voltages), but
464 * how to manage low voltages SD card is not yet
465 * specified.
466 */
d52ebf10
TC
467 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
468 (mmc->voltages & 0xff8000);
272cc70b
AF
469
470 if (mmc->version == SD_VERSION_2)
471 cmd.cmdarg |= OCR_HCS;
472
473 err = mmc_send_cmd(mmc, &cmd, NULL);
474
475 if (err)
476 return err;
477
478 udelay(1000);
479 } while ((!(cmd.response[0] & OCR_BUSY)) && timeout--);
480
481 if (timeout <= 0)
482 return UNUSABLE_ERR;
483
484 if (mmc->version != SD_VERSION_2)
485 mmc->version = SD_VERSION_1_0;
486
d52ebf10
TC
487 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
488 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
489 cmd.resp_type = MMC_RSP_R3;
490 cmd.cmdarg = 0;
d52ebf10
TC
491
492 err = mmc_send_cmd(mmc, &cmd, NULL);
493
494 if (err)
495 return err;
496 }
497
998be3dd 498 mmc->ocr = cmd.response[0];
272cc70b
AF
499
500 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
501 mmc->rca = 0;
502
503 return 0;
504}
505
fdbb873e 506static int mmc_send_op_cond(struct mmc *mmc)
272cc70b 507{
31cacbab 508 int timeout = 10000;
272cc70b
AF
509 struct mmc_cmd cmd;
510 int err;
511
512 /* Some cards seem to need this */
513 mmc_go_idle(mmc);
514
31cacbab
RR
515 /* Asking to the card its capabilities */
516 cmd.cmdidx = MMC_CMD_SEND_OP_COND;
517 cmd.resp_type = MMC_RSP_R3;
518 cmd.cmdarg = 0;
cd6881b5 519
31cacbab 520 err = mmc_send_cmd(mmc, &cmd, NULL);
cd6881b5 521
31cacbab
RR
522 if (err)
523 return err;
cd6881b5 524
31cacbab 525 udelay(1000);
cd6881b5 526
272cc70b
AF
527 do {
528 cmd.cmdidx = MMC_CMD_SEND_OP_COND;
529 cmd.resp_type = MMC_RSP_R3;
31cacbab
RR
530 cmd.cmdarg = (mmc_host_is_spi(mmc) ? 0 :
531 (mmc->voltages &
532 (cmd.response[0] & OCR_VOLTAGE_MASK)) |
533 (cmd.response[0] & OCR_ACCESS_MODE));
b1f1e821
ŁM
534
535 if (mmc->host_caps & MMC_MODE_HC)
536 cmd.cmdarg |= OCR_HCS;
537
272cc70b
AF
538 err = mmc_send_cmd(mmc, &cmd, NULL);
539
540 if (err)
541 return err;
542
543 udelay(1000);
544 } while (!(cmd.response[0] & OCR_BUSY) && timeout--);
545
546 if (timeout <= 0)
547 return UNUSABLE_ERR;
548
d52ebf10
TC
549 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
550 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
551 cmd.resp_type = MMC_RSP_R3;
552 cmd.cmdarg = 0;
d52ebf10
TC
553
554 err = mmc_send_cmd(mmc, &cmd, NULL);
555
556 if (err)
557 return err;
558 }
559
272cc70b 560 mmc->version = MMC_VERSION_UNKNOWN;
998be3dd 561 mmc->ocr = cmd.response[0];
272cc70b
AF
562
563 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
564 mmc->rca = 0;
565
566 return 0;
567}
568
569
fdbb873e 570static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
272cc70b
AF
571{
572 struct mmc_cmd cmd;
573 struct mmc_data data;
574 int err;
575
576 /* Get the Card Status Register */
577 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
578 cmd.resp_type = MMC_RSP_R1;
579 cmd.cmdarg = 0;
272cc70b 580
cdfd1ac6 581 data.dest = (char *)ext_csd;
272cc70b
AF
582 data.blocks = 1;
583 data.blocksize = 512;
584 data.flags = MMC_DATA_READ;
585
586 err = mmc_send_cmd(mmc, &cmd, &data);
587
588 return err;
589}
590
591
fdbb873e 592static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
272cc70b
AF
593{
594 struct mmc_cmd cmd;
5d4fc8d9
RR
595 int timeout = 1000;
596 int ret;
272cc70b
AF
597
598 cmd.cmdidx = MMC_CMD_SWITCH;
599 cmd.resp_type = MMC_RSP_R1b;
600 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
5d4fc8d9
RR
601 (index << 16) |
602 (value << 8);
272cc70b 603
5d4fc8d9
RR
604 ret = mmc_send_cmd(mmc, &cmd, NULL);
605
606 /* Waiting for the ready status */
93ad0d18
JK
607 if (!ret)
608 ret = mmc_send_status(mmc, timeout);
5d4fc8d9
RR
609
610 return ret;
611
272cc70b
AF
612}
613
fdbb873e 614static int mmc_change_freq(struct mmc *mmc)
272cc70b 615{
cdfd1ac6 616 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, 512);
272cc70b
AF
617 char cardtype;
618 int err;
619
620 mmc->card_caps = 0;
621
d52ebf10
TC
622 if (mmc_host_is_spi(mmc))
623 return 0;
624
272cc70b
AF
625 /* Only version 4 supports high-speed */
626 if (mmc->version < MMC_VERSION_4)
627 return 0;
628
272cc70b
AF
629 err = mmc_send_ext_csd(mmc, ext_csd);
630
631 if (err)
632 return err;
633
0560db18 634 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
272cc70b
AF
635
636 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
637
638 if (err)
639 return err;
640
641 /* Now check to see that it worked */
642 err = mmc_send_ext_csd(mmc, ext_csd);
643
644 if (err)
645 return err;
646
647 /* No high-speed support */
0560db18 648 if (!ext_csd[EXT_CSD_HS_TIMING])
272cc70b
AF
649 return 0;
650
651 /* High Speed is set, there are two types: 52MHz and 26MHz */
652 if (cardtype & MMC_HS_52MHZ)
653 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
654 else
655 mmc->card_caps |= MMC_MODE_HS;
656
657 return 0;
658}
659
bc897b1d
LW
660int mmc_switch_part(int dev_num, unsigned int part_num)
661{
662 struct mmc *mmc = find_mmc_device(dev_num);
663
664 if (!mmc)
665 return -1;
666
667 return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
668 (mmc->part_config & ~PART_ACCESS_MASK)
669 | (part_num & PART_ACCESS_MASK));
670}
671
48972d90
TR
672int mmc_getcd(struct mmc *mmc)
673{
674 int cd;
675
676 cd = board_mmc_getcd(mmc);
677
678 if ((cd < 0) && mmc->getcd)
679 cd = mmc->getcd(mmc);
680
681 return cd;
682}
683
fdbb873e 684static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
272cc70b
AF
685{
686 struct mmc_cmd cmd;
687 struct mmc_data data;
688
689 /* Switch the frequency */
690 cmd.cmdidx = SD_CMD_SWITCH_FUNC;
691 cmd.resp_type = MMC_RSP_R1;
692 cmd.cmdarg = (mode << 31) | 0xffffff;
693 cmd.cmdarg &= ~(0xf << (group * 4));
694 cmd.cmdarg |= value << (group * 4);
272cc70b
AF
695
696 data.dest = (char *)resp;
697 data.blocksize = 64;
698 data.blocks = 1;
699 data.flags = MMC_DATA_READ;
700
701 return mmc_send_cmd(mmc, &cmd, &data);
702}
703
704
fdbb873e 705static int sd_change_freq(struct mmc *mmc)
272cc70b
AF
706{
707 int err;
708 struct mmc_cmd cmd;
f781dd38
A
709 ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
710 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
272cc70b
AF
711 struct mmc_data data;
712 int timeout;
713
714 mmc->card_caps = 0;
715
d52ebf10
TC
716 if (mmc_host_is_spi(mmc))
717 return 0;
718
272cc70b
AF
719 /* Read the SCR to find out if this card supports higher speeds */
720 cmd.cmdidx = MMC_CMD_APP_CMD;
721 cmd.resp_type = MMC_RSP_R1;
722 cmd.cmdarg = mmc->rca << 16;
272cc70b
AF
723
724 err = mmc_send_cmd(mmc, &cmd, NULL);
725
726 if (err)
727 return err;
728
729 cmd.cmdidx = SD_CMD_APP_SEND_SCR;
730 cmd.resp_type = MMC_RSP_R1;
731 cmd.cmdarg = 0;
272cc70b
AF
732
733 timeout = 3;
734
735retry_scr:
f781dd38 736 data.dest = (char *)scr;
272cc70b
AF
737 data.blocksize = 8;
738 data.blocks = 1;
739 data.flags = MMC_DATA_READ;
740
741 err = mmc_send_cmd(mmc, &cmd, &data);
742
743 if (err) {
744 if (timeout--)
745 goto retry_scr;
746
747 return err;
748 }
749
4e3d89ba
YK
750 mmc->scr[0] = __be32_to_cpu(scr[0]);
751 mmc->scr[1] = __be32_to_cpu(scr[1]);
272cc70b
AF
752
753 switch ((mmc->scr[0] >> 24) & 0xf) {
754 case 0:
755 mmc->version = SD_VERSION_1_0;
756 break;
757 case 1:
758 mmc->version = SD_VERSION_1_10;
759 break;
760 case 2:
761 mmc->version = SD_VERSION_2;
762 break;
763 default:
764 mmc->version = SD_VERSION_1_0;
765 break;
766 }
767
b44c7083
AS
768 if (mmc->scr[0] & SD_DATA_4BIT)
769 mmc->card_caps |= MMC_MODE_4BIT;
770
272cc70b
AF
771 /* Version 1.0 doesn't support switching */
772 if (mmc->version == SD_VERSION_1_0)
773 return 0;
774
775 timeout = 4;
776 while (timeout--) {
777 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
f781dd38 778 (u8 *)switch_status);
272cc70b
AF
779
780 if (err)
781 return err;
782
783 /* The high-speed function is busy. Try again */
4e3d89ba 784 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
272cc70b
AF
785 break;
786 }
787
272cc70b 788 /* If high-speed isn't supported, we return */
4e3d89ba 789 if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
272cc70b
AF
790 return 0;
791
2c3fbf4c
ML
792 /*
793 * If the host doesn't support SD_HIGHSPEED, do not switch card to
794 * HIGHSPEED mode even if the card support SD_HIGHSPPED.
795 * This can avoid furthur problem when the card runs in different
796 * mode between the host.
797 */
798 if (!((mmc->host_caps & MMC_MODE_HS_52MHz) &&
799 (mmc->host_caps & MMC_MODE_HS)))
800 return 0;
801
f781dd38 802 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
272cc70b
AF
803
804 if (err)
805 return err;
806
4e3d89ba 807 if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
272cc70b
AF
808 mmc->card_caps |= MMC_MODE_HS;
809
810 return 0;
811}
812
813/* frequency bases */
814/* divided by 10 to be nice to platforms without floating point */
5f837c2c 815static const int fbase[] = {
272cc70b
AF
816 10000,
817 100000,
818 1000000,
819 10000000,
820};
821
822/* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
823 * to platforms without floating point.
824 */
5f837c2c 825static const int multipliers[] = {
272cc70b
AF
826 0, /* reserved */
827 10,
828 12,
829 13,
830 15,
831 20,
832 25,
833 30,
834 35,
835 40,
836 45,
837 50,
838 55,
839 60,
840 70,
841 80,
842};
843
fdbb873e 844static void mmc_set_ios(struct mmc *mmc)
272cc70b
AF
845{
846 mmc->set_ios(mmc);
847}
848
849void mmc_set_clock(struct mmc *mmc, uint clock)
850{
851 if (clock > mmc->f_max)
852 clock = mmc->f_max;
853
854 if (clock < mmc->f_min)
855 clock = mmc->f_min;
856
857 mmc->clock = clock;
858
859 mmc_set_ios(mmc);
860}
861
fdbb873e 862static void mmc_set_bus_width(struct mmc *mmc, uint width)
272cc70b
AF
863{
864 mmc->bus_width = width;
865
866 mmc_set_ios(mmc);
867}
868
fdbb873e 869static int mmc_startup(struct mmc *mmc)
272cc70b 870{
4137894e 871 int err, width;
272cc70b 872 uint mult, freq;
639b7827 873 u64 cmult, csize, capacity;
272cc70b 874 struct mmc_cmd cmd;
cdfd1ac6
YS
875 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, 512);
876 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, 512);
5d4fc8d9 877 int timeout = 1000;
272cc70b 878
d52ebf10
TC
879#ifdef CONFIG_MMC_SPI_CRC_ON
880 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
881 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
882 cmd.resp_type = MMC_RSP_R1;
883 cmd.cmdarg = 1;
d52ebf10
TC
884 err = mmc_send_cmd(mmc, &cmd, NULL);
885
886 if (err)
887 return err;
888 }
889#endif
890
272cc70b 891 /* Put the Card in Identify Mode */
d52ebf10
TC
892 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
893 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
272cc70b
AF
894 cmd.resp_type = MMC_RSP_R2;
895 cmd.cmdarg = 0;
272cc70b
AF
896
897 err = mmc_send_cmd(mmc, &cmd, NULL);
898
899 if (err)
900 return err;
901
902 memcpy(mmc->cid, cmd.response, 16);
903
904 /*
905 * For MMC cards, set the Relative Address.
906 * For SD cards, get the Relatvie Address.
907 * This also puts the cards into Standby State
908 */
d52ebf10
TC
909 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
910 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
911 cmd.cmdarg = mmc->rca << 16;
912 cmd.resp_type = MMC_RSP_R6;
272cc70b 913
d52ebf10 914 err = mmc_send_cmd(mmc, &cmd, NULL);
272cc70b 915
d52ebf10
TC
916 if (err)
917 return err;
272cc70b 918
d52ebf10
TC
919 if (IS_SD(mmc))
920 mmc->rca = (cmd.response[0] >> 16) & 0xffff;
921 }
272cc70b
AF
922
923 /* Get the Card-Specific Data */
924 cmd.cmdidx = MMC_CMD_SEND_CSD;
925 cmd.resp_type = MMC_RSP_R2;
926 cmd.cmdarg = mmc->rca << 16;
272cc70b
AF
927
928 err = mmc_send_cmd(mmc, &cmd, NULL);
929
5d4fc8d9
RR
930 /* Waiting for the ready status */
931 mmc_send_status(mmc, timeout);
932
272cc70b
AF
933 if (err)
934 return err;
935
998be3dd
RV
936 mmc->csd[0] = cmd.response[0];
937 mmc->csd[1] = cmd.response[1];
938 mmc->csd[2] = cmd.response[2];
939 mmc->csd[3] = cmd.response[3];
272cc70b
AF
940
941 if (mmc->version == MMC_VERSION_UNKNOWN) {
0b453ffe 942 int version = (cmd.response[0] >> 26) & 0xf;
272cc70b
AF
943
944 switch (version) {
945 case 0:
946 mmc->version = MMC_VERSION_1_2;
947 break;
948 case 1:
949 mmc->version = MMC_VERSION_1_4;
950 break;
951 case 2:
952 mmc->version = MMC_VERSION_2_2;
953 break;
954 case 3:
955 mmc->version = MMC_VERSION_3;
956 break;
957 case 4:
958 mmc->version = MMC_VERSION_4;
959 break;
960 default:
961 mmc->version = MMC_VERSION_1_2;
962 break;
963 }
964 }
965
966 /* divide frequency by 10, since the mults are 10x bigger */
0b453ffe
RV
967 freq = fbase[(cmd.response[0] & 0x7)];
968 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
272cc70b
AF
969
970 mmc->tran_speed = freq * mult;
971
998be3dd 972 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
272cc70b
AF
973
974 if (IS_SD(mmc))
975 mmc->write_bl_len = mmc->read_bl_len;
976 else
998be3dd 977 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
272cc70b
AF
978
979 if (mmc->high_capacity) {
980 csize = (mmc->csd[1] & 0x3f) << 16
981 | (mmc->csd[2] & 0xffff0000) >> 16;
982 cmult = 8;
983 } else {
984 csize = (mmc->csd[1] & 0x3ff) << 2
985 | (mmc->csd[2] & 0xc0000000) >> 30;
986 cmult = (mmc->csd[2] & 0x00038000) >> 15;
987 }
988
989 mmc->capacity = (csize + 1) << (cmult + 2);
990 mmc->capacity *= mmc->read_bl_len;
991
992 if (mmc->read_bl_len > 512)
993 mmc->read_bl_len = 512;
994
995 if (mmc->write_bl_len > 512)
996 mmc->write_bl_len = 512;
997
998 /* Select the card, and put it into Transfer Mode */
d52ebf10
TC
999 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1000 cmd.cmdidx = MMC_CMD_SELECT_CARD;
fe8f7066 1001 cmd.resp_type = MMC_RSP_R1;
d52ebf10 1002 cmd.cmdarg = mmc->rca << 16;
d52ebf10 1003 err = mmc_send_cmd(mmc, &cmd, NULL);
272cc70b 1004
d52ebf10
TC
1005 if (err)
1006 return err;
1007 }
272cc70b 1008
e6f99a56
LW
1009 /*
1010 * For SD, its erase group is always one sector
1011 */
1012 mmc->erase_grp_size = 1;
bc897b1d 1013 mmc->part_config = MMCPART_NOAVAILABLE;
d23e2c09
SG
1014 if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
1015 /* check ext_csd version and capacity */
1016 err = mmc_send_ext_csd(mmc, ext_csd);
fdbb873e 1017 if (!err && (ext_csd[EXT_CSD_REV] >= 2)) {
639b7827
YS
1018 /*
1019 * According to the JEDEC Standard, the value of
1020 * ext_csd's capacity is valid if the value is more
1021 * than 2GB
1022 */
0560db18
LW
1023 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
1024 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
1025 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
1026 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
639b7827 1027 capacity *= 512;
b1f1e821 1028 if ((capacity >> 20) > 2 * 1024)
639b7827 1029 mmc->capacity = capacity;
d23e2c09 1030 }
bc897b1d 1031
e6f99a56
LW
1032 /*
1033 * Check whether GROUP_DEF is set, if yes, read out
1034 * group size from ext_csd directly, or calculate
1035 * the group size from the csd value.
1036 */
0560db18
LW
1037 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF])
1038 mmc->erase_grp_size =
1039 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 512 * 1024;
e6f99a56
LW
1040 else {
1041 int erase_gsz, erase_gmul;
1042 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
1043 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
1044 mmc->erase_grp_size = (erase_gsz + 1)
1045 * (erase_gmul + 1);
1046 }
1047
bc897b1d 1048 /* store the partition info of emmc */
8948ea83
SW
1049 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
1050 ext_csd[EXT_CSD_BOOT_MULT])
0560db18 1051 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
d23e2c09
SG
1052 }
1053
272cc70b
AF
1054 if (IS_SD(mmc))
1055 err = sd_change_freq(mmc);
1056 else
1057 err = mmc_change_freq(mmc);
1058
1059 if (err)
1060 return err;
1061
1062 /* Restrict card's capabilities by what the host can do */
1063 mmc->card_caps &= mmc->host_caps;
1064
1065 if (IS_SD(mmc)) {
1066 if (mmc->card_caps & MMC_MODE_4BIT) {
1067 cmd.cmdidx = MMC_CMD_APP_CMD;
1068 cmd.resp_type = MMC_RSP_R1;
1069 cmd.cmdarg = mmc->rca << 16;
272cc70b
AF
1070
1071 err = mmc_send_cmd(mmc, &cmd, NULL);
1072 if (err)
1073 return err;
1074
1075 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1076 cmd.resp_type = MMC_RSP_R1;
1077 cmd.cmdarg = 2;
272cc70b
AF
1078 err = mmc_send_cmd(mmc, &cmd, NULL);
1079 if (err)
1080 return err;
1081
1082 mmc_set_bus_width(mmc, 4);
1083 }
1084
1085 if (mmc->card_caps & MMC_MODE_HS)
ad5fd922 1086 mmc->tran_speed = 50000000;
272cc70b 1087 else
ad5fd922 1088 mmc->tran_speed = 25000000;
272cc70b 1089 } else {
62722036
ŁM
1090 width = ((mmc->host_caps & MMC_MODE_MASK_WIDTH_BITS) >>
1091 MMC_MODE_WIDTH_BITS_SHIFT);
1092 for (; width >= 0; width--) {
272cc70b
AF
1093 /* Set the card to use 4 bit*/
1094 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
4137894e 1095 EXT_CSD_BUS_WIDTH, width);
272cc70b
AF
1096
1097 if (err)
4137894e 1098 continue;
272cc70b 1099
4137894e
LW
1100 if (!width) {
1101 mmc_set_bus_width(mmc, 1);
1102 break;
1103 } else
1104 mmc_set_bus_width(mmc, 4 * width);
1105
1106 err = mmc_send_ext_csd(mmc, test_csd);
1107 if (!err && ext_csd[EXT_CSD_PARTITIONING_SUPPORT] \
1108 == test_csd[EXT_CSD_PARTITIONING_SUPPORT]
1109 && ext_csd[EXT_CSD_ERASE_GROUP_DEF] \
1110 == test_csd[EXT_CSD_ERASE_GROUP_DEF] \
1111 && ext_csd[EXT_CSD_REV] \
1112 == test_csd[EXT_CSD_REV]
1113 && ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] \
1114 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1115 && memcmp(&ext_csd[EXT_CSD_SEC_CNT], \
1116 &test_csd[EXT_CSD_SEC_CNT], 4) == 0) {
1117
1118 mmc->card_caps |= width;
1119 break;
1120 }
272cc70b
AF
1121 }
1122
1123 if (mmc->card_caps & MMC_MODE_HS) {
1124 if (mmc->card_caps & MMC_MODE_HS_52MHz)
ad5fd922 1125 mmc->tran_speed = 52000000;
272cc70b 1126 else
ad5fd922
JC
1127 mmc->tran_speed = 26000000;
1128 }
272cc70b
AF
1129 }
1130
ad5fd922
JC
1131 mmc_set_clock(mmc, mmc->tran_speed);
1132
272cc70b
AF
1133 /* fill in device description */
1134 mmc->block_dev.lun = 0;
1135 mmc->block_dev.type = 0;
1136 mmc->block_dev.blksz = mmc->read_bl_len;
9b1f942c 1137 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
babce5f6
TH
1138 sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x",
1139 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
1140 (mmc->cid[3] >> 16) & 0xffff);
1141 sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
1142 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1143 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
1144 (mmc->cid[2] >> 24) & 0xff);
1145 sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
1146 (mmc->cid[2] >> 16) & 0xf);
122efd43 1147#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
272cc70b 1148 init_part(&mmc->block_dev);
122efd43 1149#endif
272cc70b
AF
1150
1151 return 0;
1152}
1153
fdbb873e 1154static int mmc_send_if_cond(struct mmc *mmc)
272cc70b
AF
1155{
1156 struct mmc_cmd cmd;
1157 int err;
1158
1159 cmd.cmdidx = SD_CMD_SEND_IF_COND;
1160 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
1161 cmd.cmdarg = ((mmc->voltages & 0xff8000) != 0) << 8 | 0xaa;
1162 cmd.resp_type = MMC_RSP_R7;
272cc70b
AF
1163
1164 err = mmc_send_cmd(mmc, &cmd, NULL);
1165
1166 if (err)
1167 return err;
1168
998be3dd 1169 if ((cmd.response[0] & 0xff) != 0xaa)
272cc70b
AF
1170 return UNUSABLE_ERR;
1171 else
1172 mmc->version = SD_VERSION_2;
1173
1174 return 0;
1175}
1176
1177int mmc_register(struct mmc *mmc)
1178{
1179 /* Setup the universal parts of the block interface just once */
1180 mmc->block_dev.if_type = IF_TYPE_MMC;
1181 mmc->block_dev.dev = cur_dev_num++;
1182 mmc->block_dev.removable = 1;
1183 mmc->block_dev.block_read = mmc_bread;
1184 mmc->block_dev.block_write = mmc_bwrite;
e6f99a56 1185 mmc->block_dev.block_erase = mmc_berase;
8feafcc4
JR
1186 if (!mmc->b_max)
1187 mmc->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
272cc70b
AF
1188
1189 INIT_LIST_HEAD (&mmc->link);
1190
1191 list_add_tail (&mmc->link, &mmc_devices);
1192
1193 return 0;
1194}
1195
df3fc526 1196#ifdef CONFIG_PARTITIONS
272cc70b
AF
1197block_dev_desc_t *mmc_get_dev(int dev)
1198{
1199 struct mmc *mmc = find_mmc_device(dev);
6bb4b4bc 1200 if (!mmc || mmc_init(mmc))
40242bc3 1201 return NULL;
272cc70b 1202
40242bc3 1203 return &mmc->block_dev;
272cc70b 1204}
df3fc526 1205#endif
272cc70b
AF
1206
1207int mmc_init(struct mmc *mmc)
1208{
afd5932b 1209 int err;
272cc70b 1210
48972d90
TR
1211 if (mmc_getcd(mmc) == 0) {
1212 mmc->has_init = 0;
1213 printf("MMC: no card present\n");
1214 return NO_CARD_ERR;
1215 }
1216
bc897b1d
LW
1217 if (mmc->has_init)
1218 return 0;
1219
272cc70b
AF
1220 err = mmc->init(mmc);
1221
1222 if (err)
1223 return err;
1224
b86b85e2
IY
1225 mmc_set_bus_width(mmc, 1);
1226 mmc_set_clock(mmc, 1);
1227
272cc70b
AF
1228 /* Reset the Card */
1229 err = mmc_go_idle(mmc);
1230
1231 if (err)
1232 return err;
1233
bc897b1d
LW
1234 /* The internal partition reset to user partition(0) at every CMD0*/
1235 mmc->part_num = 0;
1236
272cc70b 1237 /* Test for SD version 2 */
afd5932b 1238 err = mmc_send_if_cond(mmc);
272cc70b 1239
272cc70b
AF
1240 /* Now try to get the SD card's operating condition */
1241 err = sd_send_op_cond(mmc);
1242
1243 /* If the command timed out, we check for an MMC card */
1244 if (err == TIMEOUT) {
1245 err = mmc_send_op_cond(mmc);
1246
1247 if (err) {
1248 printf("Card did not respond to voltage select!\n");
1249 return UNUSABLE_ERR;
1250 }
1251 }
1252
bc897b1d
LW
1253 err = mmc_startup(mmc);
1254 if (err)
1255 mmc->has_init = 0;
1256 else
1257 mmc->has_init = 1;
1258 return err;
272cc70b
AF
1259}
1260
1261/*
1262 * CPU and board-specific MMC initializations. Aliased function
1263 * signals caller to move on
1264 */
1265static int __def_mmc_init(bd_t *bis)
1266{
1267 return -1;
1268}
1269
f9a109b3
PT
1270int cpu_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init")));
1271int board_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init")));
272cc70b
AF
1272
1273void print_mmc_devices(char separator)
1274{
1275 struct mmc *m;
1276 struct list_head *entry;
1277
1278 list_for_each(entry, &mmc_devices) {
1279 m = list_entry(entry, struct mmc, link);
1280
1281 printf("%s: %d", m->name, m->block_dev.dev);
1282
1283 if (entry->next != &mmc_devices)
1284 printf("%c ", separator);
1285 }
1286
1287 printf("\n");
1288}
1289
ea6ebe21
LW
1290int get_mmc_num(void)
1291{
1292 return cur_dev_num;
1293}
1294
272cc70b
AF
1295int mmc_initialize(bd_t *bis)
1296{
1297 INIT_LIST_HEAD (&mmc_devices);
1298 cur_dev_num = 0;
1299
1300 if (board_mmc_init(bis) < 0)
1301 cpu_mmc_init(bis);
1302
1303 print_mmc_devices(',');
1304
1305 return 0;
1306}