[people/ms/u-boot.git] / include / configs / zynq-common.h

/*
 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
 * (C) Copyright 2013 Xilinx, Inc.
 *
 * Common configuration options for all Zynq boards.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_ZYNQ_COMMON_H
#define __CONFIG_ZYNQ_COMMON_H

/* CPU clock */
#ifndef CONFIG_CPU_FREQ_HZ
# define CONFIG_CPU_FREQ_HZ	800000000
#endif

/* Cache options */
#define CONFIG_CMD_CACHE
#define CONFIG_SYS_CACHELINE_SIZE	32

#define CONFIG_SYS_L2CACHE_OFF
#ifndef CONFIG_SYS_L2CACHE_OFF
# define CONFIG_SYS_L2_PL310
# define CONFIG_SYS_PL310_BASE		0xf8f02000
#endif

#define ZYNQ_SCUTIMER_BASEADDR		0xF8F00600
#define CONFIG_SYS_TIMERBASE		ZYNQ_SCUTIMER_BASEADDR
#define CONFIG_SYS_TIMER_COUNTS_DOWN
#define CONFIG_SYS_TIMER_COUNTER	(CONFIG_SYS_TIMERBASE + 0x4)

/* Serial drivers */
#define CONFIG_BAUDRATE		115200
/* The following table includes the supported baudrates */
#define CONFIG_SYS_BAUDRATE_TABLE  \
	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}

#define CONFIG_ARM_DCC
#define CONFIG_ZYNQ_SERIAL

#define CONFIG_ZYNQ_GPIO

/* Ethernet driver */
#if defined(CONFIG_ZYNQ_GEM)
# define CONFIG_MII
# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
# define CONFIG_PHY_MARVELL
# define CONFIG_PHY_REALTEK
# define CONFIG_BOOTP_SERVERIP
# define CONFIG_BOOTP_BOOTPATH
# define CONFIG_BOOTP_GATEWAY
# define CONFIG_BOOTP_HOSTNAME
# define CONFIG_BOOTP_MAY_FAIL
#endif

/* SPI */
#ifdef CONFIG_ZYNQ_SPI
# define CONFIG_CMD_SF
#endif

/* QSPI */
#ifdef CONFIG_ZYNQ_QSPI
# define CONFIG_SF_DEFAULT_SPEED	30000000
# define CONFIG_SPI_FLASH_ISSI
# define CONFIG_CMD_SF
#endif

/* NOR */
#ifndef CONFIG_SYS_NO_FLASH
# define CONFIG_SYS_FLASH_BASE		0xE2000000
# define CONFIG_SYS_FLASH_SIZE		(16 * 1024 * 1024)
# define CONFIG_SYS_MAX_FLASH_BANKS	1
# define CONFIG_SYS_MAX_FLASH_SECT	512
# define CONFIG_SYS_FLASH_ERASE_TOUT	1000
# define CONFIG_SYS_FLASH_WRITE_TOUT	5000
# define CONFIG_FLASH_SHOW_PROGRESS	10
# define CONFIG_SYS_FLASH_CFI
# undef CONFIG_SYS_FLASH_EMPTY_INFO
# define CONFIG_FLASH_CFI_DRIVER
# undef CONFIG_SYS_FLASH_PROTECTION
# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
#endif

/* MMC */
#if defined(CONFIG_ZYNQ_SDHCI)
# define CONFIG_MMC
# define CONFIG_GENERIC_MMC
# define CONFIG_SDHCI
# define CONFIG_CMD_MMC
# define CONFIG_ZYNQ_SDHCI_MAX_FREQ	52000000
#endif

#ifdef CONFIG_ZYNQ_USB
# define CONFIG_USB_EHCI
# define CONFIG_CMD_USB
# define CONFIG_USB_STORAGE
# define CONFIG_USB_EHCI_ZYNQ
# define CONFIG_EHCI_IS_TDI
# define CONFIG_USB_MAX_CONTROLLER_COUNT	2

# define CONFIG_CI_UDC           /* ChipIdea CI13xxx UDC */
# define CONFIG_USB_GADGET_DUALSPEED
# define CONFIG_USB_GADGET_DOWNLOAD
# define CONFIG_SYS_DFU_DATA_BUF_SIZE	0x600000
# define DFU_DEFAULT_POLL_TIMEOUT	300
# define CONFIG_USB_FUNCTION_DFU
# define CONFIG_DFU_RAM
# define CONFIG_USB_GADGET_VBUS_DRAW	2
# define CONFIG_G_DNL_VENDOR_NUM	0x03FD
# define CONFIG_G_DNL_PRODUCT_NUM	0x0300
# define CONFIG_G_DNL_MANUFACTURER	"Xilinx"
# define CONFIG_USB_CABLE_CHECK
# define CONFIG_CMD_DFU
# define CONFIG_CMD_THOR_DOWNLOAD
# define CONFIG_USB_FUNCTION_THOR
# define DFU_ALT_INFO_RAM \
	"dfu_ram_info=" \
	"set dfu_alt_info " \
	"${kernel_image} ram 0x3000000 0x500000\\\\;" \
	"${devicetree_image} ram 0x2A00000 0x20000\\\\;" \
	"${ramdisk_image} ram 0x2000000 0x600000\0" \
	"dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
	"thor_ram=run dfu_ram_info && thordown 0 ram 0\0"

# if defined(CONFIG_ZYNQ_SDHCI)
#  define CONFIG_DFU_MMC
#  define DFU_ALT_INFO_MMC \
	"dfu_mmc_info=" \
	"set dfu_alt_info " \
	"${kernel_image} fat 0 1\\\\;" \
	"${devicetree_image} fat 0 1\\\\;" \
	"${ramdisk_image} fat 0 1\0" \
	"dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \
	"thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0"

#  define DFU_ALT_INFO	\
	DFU_ALT_INFO_RAM \
	DFU_ALT_INFO_MMC
# else
#  define DFU_ALT_INFO	\
	DFU_ALT_INFO_RAM
# endif
#endif

#if !defined(DFU_ALT_INFO)
# define DFU_ALT_INFO
#endif

#if defined(CONFIG_ZYNQ_SDHCI) || defined(CONFIG_ZYNQ_USB)
# define CONFIG_SUPPORT_VFAT
# define CONFIG_CMD_FAT
# define CONFIG_CMD_EXT2
# define CONFIG_FAT_WRITE
# define CONFIG_DOS_PARTITION
# define CONFIG_CMD_EXT4
# define CONFIG_CMD_EXT4_WRITE
# define CONFIG_CMD_FS_GENERIC
#endif

#if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1)
#define CONFIG_SYS_I2C_ZYNQ
#endif

/* I2C */
#if defined(CONFIG_SYS_I2C_ZYNQ)
# define CONFIG_CMD_I2C
# define CONFIG_SYS_I2C
# define CONFIG_SYS_I2C_ZYNQ_SPEED		100000
# define CONFIG_SYS_I2C_ZYNQ_SLAVE		0
#endif

/* EEPROM */
#ifdef CONFIG_ZYNQ_EEPROM
# define CONFIG_CMD_EEPROM
# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
# define CONFIG_SYS_I2C_EEPROM_ADDR		0x54
# define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
# define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
# define CONFIG_SYS_EEPROM_SIZE			1024 /* Bytes */
#endif

/* Total Size of Environment Sector */
#define CONFIG_ENV_SIZE			(128 << 10)

/* Allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE

/* Environment */
#ifndef CONFIG_ENV_IS_NOWHERE
# ifndef CONFIG_SYS_NO_FLASH
/* Environment in NOR flash */
#  define CONFIG_ENV_IS_IN_FLASH
# elif defined(CONFIG_ZYNQ_QSPI)
/* Environment in Serial Flash */
#  define CONFIG_ENV_IS_IN_SPI_FLASH
# elif defined(CONFIG_SYS_NO_FLASH)
#  define CONFIG_ENV_IS_NOWHERE
# endif

# define CONFIG_ENV_SECT_SIZE		CONFIG_ENV_SIZE
# define CONFIG_ENV_OFFSET		0xE0000
#endif

/* Default environment */
#define CONFIG_EXTRA_ENV_SETTINGS	\
	"fit_image=fit.itb\0"		\
	"load_addr=0x2000000\0"		\
	"fit_size=0x800000\0"		\
	"flash_off=0x100000\0"		\
	"nor_flash_off=0xE2100000\0"	\
	"fdt_high=0x20000000\0"		\
	"initrd_high=0x20000000\0"	\
	"norboot=echo Copying FIT from NOR flash to RAM... && " \
		"cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \
		"bootm ${load_addr}\0" \
	"sdboot=echo Copying FIT from SD to RAM... && " \
		"load mmc 0 ${load_addr} ${fit_image} && " \
		"bootm ${load_addr}\0" \
	"jtagboot=echo TFTPing FIT to RAM... && " \
		"tftpboot ${load_addr} ${fit_image} && " \
		"bootm ${load_addr}\0" \
	"usbboot=if usb start; then " \
			"echo Copying FIT from USB to RAM... && " \
			"load usb 0 ${load_addr} ${fit_image} && " \
			"bootm ${load_addr}; fi\0" \
		DFU_ALT_INFO

#define CONFIG_BOOTCOMMAND		"run $modeboot"
#define CONFIG_BOOTDELAY		3 /* -1 to Disable autoboot */
#define CONFIG_SYS_LOAD_ADDR		0 /* default? */

/* Miscellaneous configurable options */
#define CONFIG_SYS_HUSH_PARSER

#define CONFIG_CMDLINE_EDITING
#define CONFIG_AUTO_COMPLETE
#define CONFIG_BOARD_LATE_INIT
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_SYS_LONGHELP
#define CONFIG_CLOCKS
#define CONFIG_CMD_CLK
#define CONFIG_SYS_MAXARGS		32 /* max number of command args */
#define CONFIG_SYS_CBSIZE		256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
					sizeof(CONFIG_SYS_PROMPT) + 16)

/* Physical Memory map */
#define CONFIG_SYS_TEXT_BASE		0x4000000

#define CONFIG_NR_DRAM_BANKS		1
#define CONFIG_SYS_SDRAM_BASE		0

#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x1000)

#define CONFIG_SYS_MALLOC_LEN		0x1400000
#define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_INIT_RAM_SIZE	CONFIG_SYS_MALLOC_LEN
#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
					CONFIG_SYS_INIT_RAM_SIZE - \
					GENERATED_GBL_DATA_SIZE)

/* Enable the PL to be downloaded */
#define CONFIG_FPGA
#define CONFIG_FPGA_XILINX
#define CONFIG_FPGA_ZYNQPL
#define CONFIG_CMD_FPGA_LOADMK
#define CONFIG_CMD_FPGA_LOADP
#define CONFIG_CMD_FPGA_LOADBP
#define CONFIG_CMD_FPGA_LOADFS

/* FIT support */
#define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */

/* FDT support */
#define CONFIG_DISPLAY_BOARDINFO_LATE

/* Extend size of kernel image for uncompression */
#define CONFIG_SYS_BOOTM_LEN	(60 * 1024 * 1024)

/* Boot FreeBSD/vxWorks from an ELF image */
#define CONFIG_SYS_MMC_MAX_DEVICE	1

#define CONFIG_SYS_LDSCRIPT  "arch/arm/mach-zynq/u-boot.lds"

/* Commands */
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_MII
#define CONFIG_CMD_TFTPPUT

/* SPL part */
#define CONFIG_CMD_SPL
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_RAM_DEVICE

#define CONFIG_SPL_LDSCRIPT	"arch/arm/mach-zynq/u-boot-spl.lds"

/* MMC support */
#ifdef CONFIG_ZYNQ_SDHCI
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS      0x200 /* 256 KB */
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION     1
#define CONFIG_SPL_LIBDISK_SUPPORT
#define CONFIG_SPL_FAT_SUPPORT
#ifdef CONFIG_OF_SEPARATE
# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME     "u-boot-dtb.img"
#else
# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME     "u-boot.img"
#endif
#endif

/* Disable dcache for SPL just for sure */
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_DCACHE_OFF
#undef CONFIG_FPGA
#endif

/* Address in RAM where the parameters must be copied by SPL. */
#define CONFIG_SYS_SPL_ARGS_ADDR	0x10000000

#define CONFIG_SPL_FS_LOAD_ARGS_NAME		"system.dtb"
#define CONFIG_SPL_FS_LOAD_KERNEL_NAME		"uImage"

/* Not using MMC raw mode - just for compilation purpose */
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	0
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	0
#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	0

/* qspi mode is working fine */
#ifdef CONFIG_ZYNQ_QSPI
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x100000
#define CONFIG_SYS_SPI_ARGS_OFFS	0x200000
#define CONFIG_SYS_SPI_ARGS_SIZE	0x80000
#define CONFIG_SYS_SPI_KERNEL_OFFS	(CONFIG_SYS_SPI_ARGS_OFFS + \
					CONFIG_SYS_SPI_ARGS_SIZE)
#endif

/* for booting directly linux */
#define CONFIG_SPL_OS_BOOT

/* SP location before relocation, must use scratch RAM */
#define CONFIG_SPL_TEXT_BASE	0x0

/* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
#define CONFIG_SPL_MAX_SIZE	0x30000

/* The highest 64k OCM address */
#define OCM_HIGH_ADDR	0xffff0000

/* On the top of OCM space */
#define CONFIG_SYS_SPL_MALLOC_START	OCM_HIGH_ADDR
#define CONFIG_SYS_SPL_MALLOC_SIZE	0x2000

/*
 * SPL stack position - and stack goes down
 * 0xfffffe00 is used for putting wfi loop.
 * Set it up as limit for now.
 */
#define CONFIG_SPL_STACK	0xfffffe00

/* BSS setup */
#define CONFIG_SPL_BSS_START_ADDR	0x100000
#define CONFIG_SPL_BSS_MAX_SIZE		0x100000

#define CONFIG_SYS_UBOOT_START	CONFIG_SYS_TEXT_BASE


#endif /* __CONFIG_ZYNQ_COMMON_H */
Commit	Line	Data
f22651cf MS	1	/*
f22651cf MS	2	* (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
06fe8dae JT	3	* (C) Copyright 2013 Xilinx, Inc.
	4	*
	5	* Common configuration options for all Zynq boards.
f22651cf	6	*
1a459660	7	* SPDX-License-Identifier: GPL-2.0+
f22651cf MS	8	*/
f22651cf MS	9
06fe8dae JT	10	#ifndef __CONFIG_ZYNQ_COMMON_H
06fe8dae JT	11	#define __CONFIG_ZYNQ_COMMON_H
f22651cf	12
f22651cf	13	/* CPU clock */
53e49f74 JT	14	#ifndef CONFIG_CPU_FREQ_HZ
	15	# define CONFIG_CPU_FREQ_HZ 800000000
	16	#endif
f22651cf	17
8cfac504 JT	18	/* Cache options */
	19	#define CONFIG_CMD_CACHE
	20	#define CONFIG_SYS_CACHELINE_SIZE 32
	21
	22	#define CONFIG_SYS_L2CACHE_OFF
	23	#ifndef CONFIG_SYS_L2CACHE_OFF
	24	# define CONFIG_SYS_L2_PL310
	25	# define CONFIG_SYS_PL310_BASE 0xf8f02000
	26	#endif
	27
a2ec7fb9 MS	28	#define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600
	29	#define CONFIG_SYS_TIMERBASE ZYNQ_SCUTIMER_BASEADDR
	30	#define CONFIG_SYS_TIMER_COUNTS_DOWN
	31	#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4)
	32
53e49f74 JT	33	/* Serial drivers */
53e49f74 JT	34	#define CONFIG_BAUDRATE 115200
f22651cf MS	35	/* The following table includes the supported baudrates */
	36	#define CONFIG_SYS_BAUDRATE_TABLE \
	37	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
	38
636ac181 MS	39	#define CONFIG_ARM_DCC
636ac181 MS	40	#define CONFIG_ZYNQ_SERIAL
53e49f74	41
caacb33f	42	#define CONFIG_ZYNQ_GPIO
caacb33f	43
f22651cf	44	/* Ethernet driver */
596e5782	45	#if defined(CONFIG_ZYNQ_GEM)
88fcfb1c JT	46	# define CONFIG_MII
88fcfb1c JT	47	# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
88fcfb1c	48	# define CONFIG_PHY_MARVELL
9ec2cf00	49	# define CONFIG_PHY_REALTEK
dd1c351f MS	50	# define CONFIG_BOOTP_SERVERIP
	51	# define CONFIG_BOOTP_BOOTPATH
	52	# define CONFIG_BOOTP_GATEWAY
	53	# define CONFIG_BOOTP_HOSTNAME
	54	# define CONFIG_BOOTP_MAY_FAIL
88fcfb1c	55	#endif
f22651cf	56
53e49f74 JT	57	/* SPI */
53e49f74 JT	58	#ifdef CONFIG_ZYNQ_SPI
53e49f74 JT	59	# define CONFIG_CMD_SF
	60	#endif
	61
a241d4ec JT	62	/* QSPI */
	63	#ifdef CONFIG_ZYNQ_QSPI
	64	# define CONFIG_SF_DEFAULT_SPEED 30000000
232a8e4e	65	# define CONFIG_SPI_FLASH_ISSI
a241d4ec JT	66	# define CONFIG_CMD_SF
	67	#endif
	68
fe5eddbf JT	69	/* NOR */
	70	#ifndef CONFIG_SYS_NO_FLASH
	71	# define CONFIG_SYS_FLASH_BASE 0xE2000000
	72	# define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024)
	73	# define CONFIG_SYS_MAX_FLASH_BANKS 1
	74	# define CONFIG_SYS_MAX_FLASH_SECT 512
	75	# define CONFIG_SYS_FLASH_ERASE_TOUT 1000
	76	# define CONFIG_SYS_FLASH_WRITE_TOUT 5000
	77	# define CONFIG_FLASH_SHOW_PROGRESS 10
	78	# define CONFIG_SYS_FLASH_CFI
	79	# undef CONFIG_SYS_FLASH_EMPTY_INFO
	80	# define CONFIG_FLASH_CFI_DRIVER
	81	# undef CONFIG_SYS_FLASH_PROTECTION
	82	# define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
	83	#endif
	84
293eb33f	85	/* MMC */
ce0335f2	86	#if defined(CONFIG_ZYNQ_SDHCI)
293eb33f MS	87	# define CONFIG_MMC
	88	# define CONFIG_GENERIC_MMC
	89	# define CONFIG_SDHCI
293eb33f	90	# define CONFIG_CMD_MMC
f3bd7280	91	# define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000
293eb33f MS	92	#endif
293eb33f MS	93
c6024c8e SDPP	94	#ifdef CONFIG_ZYNQ_USB
	95	# define CONFIG_USB_EHCI
	96	# define CONFIG_CMD_USB
	97	# define CONFIG_USB_STORAGE
c6024c8e	98	# define CONFIG_USB_EHCI_ZYNQ
c6024c8e SDPP	99	# define CONFIG_EHCI_IS_TDI
c6024c8e SDPP	100	# define CONFIG_USB_MAX_CONTROLLER_COUNT 2
87f3dbdf SDPP	101
87f3dbdf SDPP	102	# define CONFIG_CI_UDC /* ChipIdea CI13xxx UDC */
87f3dbdf	103	# define CONFIG_USB_GADGET_DUALSPEED
01acd6ab	104	# define CONFIG_USB_GADGET_DOWNLOAD
87f3dbdf SDPP	105	# define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x600000
87f3dbdf SDPP	106	# define DFU_DEFAULT_POLL_TIMEOUT 300
01acd6ab	107	# define CONFIG_USB_FUNCTION_DFU
87f3dbdf SDPP	108	# define CONFIG_DFU_RAM
	109	# define CONFIG_USB_GADGET_VBUS_DRAW 2
	110	# define CONFIG_G_DNL_VENDOR_NUM 0x03FD
	111	# define CONFIG_G_DNL_PRODUCT_NUM 0x0300
	112	# define CONFIG_G_DNL_MANUFACTURER "Xilinx"
87f3dbdf SDPP	113	# define CONFIG_USB_CABLE_CHECK
87f3dbdf SDPP	114	# define CONFIG_CMD_DFU
c4fa5114	115	# define CONFIG_CMD_THOR_DOWNLOAD
01acd6ab	116	# define CONFIG_USB_FUNCTION_THOR
87f3dbdf SDPP	117	# define DFU_ALT_INFO_RAM \
	118	"dfu_ram_info=" \
	119	"set dfu_alt_info " \
	120	"${kernel_image} ram 0x3000000 0x500000\\\\;" \
	121	"${devicetree_image} ram 0x2A00000 0x20000\\\\;" \
	122	"${ramdisk_image} ram 0x2000000 0x600000\0" \
c4fa5114 SDPP	123	"dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
c4fa5114 SDPP	124	"thor_ram=run dfu_ram_info && thordown 0 ram 0\0"
87f3dbdf	125
ce0335f2	126	# if defined(CONFIG_ZYNQ_SDHCI)
87f3dbdf SDPP	127	# define CONFIG_DFU_MMC
	128	# define DFU_ALT_INFO_MMC \
	129	"dfu_mmc_info=" \
	130	"set dfu_alt_info " \
	131	"${kernel_image} fat 0 1\\\\;" \
	132	"${devicetree_image} fat 0 1\\\\;" \
	133	"${ramdisk_image} fat 0 1\0" \
c4fa5114 SDPP	134	"dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \
	135	"thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0"
	136
87f3dbdf SDPP	137	# define DFU_ALT_INFO \
	138	DFU_ALT_INFO_RAM \
	139	DFU_ALT_INFO_MMC
	140	# else
	141	# define DFU_ALT_INFO \
	142	DFU_ALT_INFO_RAM
	143	# endif
	144	#endif
	145
	146	#if !defined(DFU_ALT_INFO)
	147	# define DFU_ALT_INFO
c6024c8e SDPP	148	#endif
c6024c8e SDPP	149
47b35a51	150	#if defined(CONFIG_ZYNQ_SDHCI) \|\| defined(CONFIG_ZYNQ_USB)
293eb33f	151	# define CONFIG_SUPPORT_VFAT
47b35a51	152	# define CONFIG_CMD_FAT
293eb33f	153	# define CONFIG_CMD_EXT2
47b35a51	154	# define CONFIG_FAT_WRITE
293eb33f	155	# define CONFIG_DOS_PARTITION
2e38a906 SDPP	156	# define CONFIG_CMD_EXT4
2e38a906 SDPP	157	# define CONFIG_CMD_EXT4_WRITE
e9d69c1c	158	# define CONFIG_CMD_FS_GENERIC
293eb33f MS	159	#endif
293eb33f MS	160
1c3f2c72	161	#if defined(CONFIG_ZYNQ_I2C0) \|\| defined(CONFIG_ZYNQ_I2C1)
18948632	162	#define CONFIG_SYS_I2C_ZYNQ
1c3f2c72 SDPP	163	#endif
1c3f2c72 SDPP	164
8934f784	165	/* I2C */
18948632	166	#if defined(CONFIG_SYS_I2C_ZYNQ)
8934f784	167	# define CONFIG_CMD_I2C
0bdffe71	168	# define CONFIG_SYS_I2C
0bdffe71	169	# define CONFIG_SYS_I2C_ZYNQ_SPEED 100000
18948632	170	# define CONFIG_SYS_I2C_ZYNQ_SLAVE 0
8934f784 MS	171	#endif
8934f784 MS	172
65da1efd JT	173	/* EEPROM */
	174	#ifdef CONFIG_ZYNQ_EEPROM
	175	# define CONFIG_CMD_EEPROM
	176	# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
	177	# define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
	178	# define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
	179	# define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
	180	# define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */
	181	#endif
	182
18eee22f JT	183	/* Total Size of Environment Sector */
	184	#define CONFIG_ENV_SIZE (128 << 10)
	185
b660ca13 JT	186	/* Allow to overwrite serial and ethaddr */
	187	#define CONFIG_ENV_OVERWRITE
	188
f22651cf	189	/* Environment */
ed53e4d6 JT	190	#ifndef CONFIG_ENV_IS_NOWHERE
ed53e4d6 JT	191	# ifndef CONFIG_SYS_NO_FLASH
18c61e95	192	/* Environment in NOR flash */
ed53e4d6	193	# define CONFIG_ENV_IS_IN_FLASH
18c61e95 MS	194	# elif defined(CONFIG_ZYNQ_QSPI)
	195	/* Environment in Serial Flash */
	196	# define CONFIG_ENV_IS_IN_SPI_FLASH
ed53e4d6 JT	197	# elif defined(CONFIG_SYS_NO_FLASH)
	198	# define CONFIG_ENV_IS_NOWHERE
	199	# endif
	200
	201	# define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
	202	# define CONFIG_ENV_OFFSET 0xE0000
ed53e4d6	203	#endif
e83f61a6 JT	204
	205	/* Default environment */
	206	#define CONFIG_EXTRA_ENV_SETTINGS \
	207	"fit_image=fit.itb\0" \
	208	"load_addr=0x2000000\0" \
	209	"fit_size=0x800000\0" \
	210	"flash_off=0x100000\0" \
	211	"nor_flash_off=0xE2100000\0" \
	212	"fdt_high=0x20000000\0" \
	213	"initrd_high=0x20000000\0" \
	214	"norboot=echo Copying FIT from NOR flash to RAM... && " \
	215	"cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \
	216	"bootm ${load_addr}\0" \
	217	"sdboot=echo Copying FIT from SD to RAM... && " \
e9d69c1c	218	"load mmc 0 ${load_addr} ${fit_image} && " \
e83f61a6 JT	219	"bootm ${load_addr}\0" \
e83f61a6 JT	220	"jtagboot=echo TFTPing FIT to RAM... && " \
dfa94058	221	"tftpboot ${load_addr} ${fit_image} && " \
c6024c8e SDPP	222	"bootm ${load_addr}\0" \
	223	"usbboot=if usb start; then " \
	224	"echo Copying FIT from USB to RAM... && " \
e9d69c1c	225	"load usb 0 ${load_addr} ${fit_image} && " \
39bc1a8c	226	"bootm ${load_addr}; fi\0" \
87f3dbdf	227	DFU_ALT_INFO
c6024c8e	228
e83f61a6 JT	229	#define CONFIG_BOOTCOMMAND "run $modeboot"
	230	#define CONFIG_BOOTDELAY 3 /* -1 to Disable autoboot */
	231	#define CONFIG_SYS_LOAD_ADDR 0 /* default? */
f22651cf	232
36e0e197	233	/* Miscellaneous configurable options */
36e0e197 JT	234	#define CONFIG_SYS_HUSH_PARSER
	235
	236	#define CONFIG_CMDLINE_EDITING
	237	#define CONFIG_AUTO_COMPLETE
b3de9249	238	#define CONFIG_BOARD_LATE_INIT
5a82d53c	239	#define CONFIG_DISPLAY_BOARDINFO
36e0e197	240	#define CONFIG_SYS_LONGHELP
6c3e61de	241	#define CONFIG_CLOCKS
d6c9bbaa	242	#define CONFIG_CMD_CLK
841426ad	243	#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
36e0e197 JT	244	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
36e0e197 JT	245	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
f22651cf MS	246	sizeof(CONFIG_SYS_PROMPT) + 16)
f22651cf MS	247
7cd04192	248	/* Physical Memory map */
0f5c2156	249	#define CONFIG_SYS_TEXT_BASE 0x4000000
f22651cf	250
7cd04192 JT	251	#define CONFIG_NR_DRAM_BANKS 1
7cd04192 JT	252	#define CONFIG_SYS_SDRAM_BASE 0
7cd04192 JT	253
	254	#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
	255	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000)
	256
599807fc	257	#define CONFIG_SYS_MALLOC_LEN 0x1400000
7cd04192 JT	258	#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE
	259	#define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
	260	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
	261	CONFIG_SYS_INIT_RAM_SIZE - \
	262	GENERATED_GBL_DATA_SIZE)
53e49f74 JT	263
	264	/* Enable the PL to be downloaded */
	265	#define CONFIG_FPGA
	266	#define CONFIG_FPGA_XILINX
	267	#define CONFIG_FPGA_ZYNQPL
64e809af	268	#define CONFIG_CMD_FPGA_LOADMK
26ea9ce5 MS	269	#define CONFIG_CMD_FPGA_LOADP
26ea9ce5 MS	270	#define CONFIG_CMD_FPGA_LOADBP
1a897668	271	#define CONFIG_CMD_FPGA_LOADFS
53e49f74	272
53e49f74	273	/* FIT support */
21d29f7f	274	#define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */
f22651cf	275
f8f36c5d	276	/* FDT support */
f8f36c5d JT	277	#define CONFIG_DISPLAY_BOARDINFO_LATE
f8f36c5d JT	278
ae9f4899	279	/* Extend size of kernel image for uncompression */
3d456eec	280	#define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
ae9f4899	281
09ed635b	282	/* Boot FreeBSD/vxWorks from an ELF image */
d82d63cc	283	#define CONFIG_SYS_MMC_MAX_DEVICE 1
09ed635b	284
0107f240	285	#define CONFIG_SYS_LDSCRIPT "arch/arm/mach-zynq/u-boot.lds"
38716189	286
f22651cf	287	/* Commands */
f22651cf MS	288	#define CONFIG_CMD_PING
	289	#define CONFIG_CMD_DHCP
	290	#define CONFIG_CMD_MII
427b2d4e	291	#define CONFIG_CMD_TFTPPUT
f22651cf	292
d7e269cf	293	/* SPL part */
d7e269cf MS	294	#define CONFIG_CMD_SPL
	295	#define CONFIG_SPL_FRAMEWORK
	296	#define CONFIG_SPL_LIBCOMMON_SUPPORT
	297	#define CONFIG_SPL_LIBGENERIC_SUPPORT
	298	#define CONFIG_SPL_SERIAL_SUPPORT
1540fb72	299	#define CONFIG_SPL_BOARD_INIT
70bdf2f6	300	#define CONFIG_SPL_RAM_DEVICE
d7e269cf	301
0107f240	302	#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-zynq/u-boot-spl.lds"
d7e269cf	303
d7e269cf	304	/* MMC support */
ce0335f2	305	#ifdef CONFIG_ZYNQ_SDHCI
d7e269cf MS	306	#define CONFIG_SPL_MMC_SUPPORT
	307	#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
	308	#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
e2ccdf89	309	#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
d7e269cf MS	310	#define CONFIG_SPL_LIBDISK_SUPPORT
d7e269cf MS	311	#define CONFIG_SPL_FAT_SUPPORT
8741c490	312	#ifdef CONFIG_OF_SEPARATE
fa43f69e SG	313	# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img"
	314	#else
	315	# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
	316	#endif
0dfbcf02 MY	317	#endif
	318
	319	/* Disable dcache for SPL just for sure */
	320	#ifdef CONFIG_SPL_BUILD
	321	#define CONFIG_SYS_DCACHE_OFF
	322	#undef CONFIG_FPGA
d7e269cf MS	323	#endif
	324
	325	/* Address in RAM where the parameters must be copied by SPL. */
	326	#define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000
	327
205b4f33 GG	328	#define CONFIG_SPL_FS_LOAD_ARGS_NAME "system.dtb"
205b4f33 GG	329	#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
d7e269cf MS	330
	331	/* Not using MMC raw mode - just for compilation purpose */
	332	#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0
	333	#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0
	334	#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0
	335
	336	/* qspi mode is working fine */
	337	#ifdef CONFIG_ZYNQ_QSPI
	338	#define CONFIG_SPL_SPI_SUPPORT
	339	#define CONFIG_SPL_SPI_LOAD
	340	#define CONFIG_SPL_SPI_FLASH_SUPPORT
d7e269cf	341	#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000
8e0e01d3 SDPP	342	#define CONFIG_SYS_SPI_ARGS_OFFS 0x200000
	343	#define CONFIG_SYS_SPI_ARGS_SIZE 0x80000
	344	#define CONFIG_SYS_SPI_KERNEL_OFFS (CONFIG_SYS_SPI_ARGS_OFFS + \
	345	CONFIG_SYS_SPI_ARGS_SIZE)
d7e269cf MS	346	#endif
	347
	348	/* for booting directly linux */
	349	#define CONFIG_SPL_OS_BOOT
	350
	351	/* SP location before relocation, must use scratch RAM */
	352	#define CONFIG_SPL_TEXT_BASE 0x0
	353
	354	/* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
	355	#define CONFIG_SPL_MAX_SIZE 0x30000
	356
	357	/* The highest 64k OCM address */
	358	#define OCM_HIGH_ADDR 0xffff0000
	359
d7e269cf	360	/* On the top of OCM space */
83b6464d	361	#define CONFIG_SYS_SPL_MALLOC_START OCM_HIGH_ADDR
ec016a17	362	#define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000
d7e269cf	363
83b6464d MS	364	/*
	365	* SPL stack position - and stack goes down
	366	* 0xfffffe00 is used for putting wfi loop.
	367	* Set it up as limit for now.
	368	*/
	369	#define CONFIG_SPL_STACK 0xfffffe00
	370
d7e269cf MS	371	/* BSS setup */
	372	#define CONFIG_SPL_BSS_START_ADDR 0x100000
	373	#define CONFIG_SPL_BSS_MAX_SIZE 0x100000
	374
	375	#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
f22651cf	376
2b257216	377
06fe8dae	378	#endif /* __CONFIG_ZYNQ_COMMON_H */