]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - gas/ChangeLog
[PATCH 2/4]: moxie: use generic pcrel support
[thirdparty/binutils-gdb.git] / gas / ChangeLog
CommitLineData
6a3ab923
GN
12020-04-08 Gunther Nikl <gnikl@justmail.de>
2
3 * config/tc-moxie.h (MD_PCREL_FROM_SECTION): Delete define.
4 (md_pcrel_from): Remove prototytpe.
5
6e0e8b45
L
62020-04-07 H.J. Lu <hongjiu.lu@intel.com>
7
8 * NEWS: Mention support for Intel SERIALIZE and TSXLDTRK
9 instructions.
10
266803a2
L
112020-04-07 H.J. Lu <hongjiu.lu@intel.com>
12
13 * doc/c-z80.texi: Fix @xref warnings.
14
bb651e8b
CL
152020-04-07 Lili Cui <lili.cui@intel.com>
16
17 * config/tc-i386.c (cpu_arch): Add .TSXLDTRK.
18 (cpu_noarch): Likewise.
19 * doc/c-i386.texi: Document TSXLDTRK.
20 * testsuite/gas/i386/i386.exp: Run TSXLDTRK tests.
21 * testsuite/gas/i386/tsxldtrk.d: Likewise.
22 * testsuite/gas/i386/tsxldtrk.s: Likewise.
23 * testsuite/gas/i386/x86-64-tsxldtrk.d: Likewise.
24
4b27d27c
L
252020-04-02 Lili Cui <lili.cui@intel.com>
26
27 * config/tc-i386.c (cpu_arch): Add .serialize.
28 (cpu_noarch): Likewise.
29 * doc/c-i386.texi: Document serialize.
30 * testsuite/gas/i386/i386.exp: Run serialize tests
31 * testsuite/gas/i386/serialize.d: Likewise.
32 * testsuite/gas/i386/x86-64-serialize.d: Likewise.
33 * testsuite/gas/i386/serialize.s: Likewise.
34
bb897477
RO
352020-04-02 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
36
37 * testsuite/gas/elf/section12a.d: Use notarget instead of xfail.
38 * testsuite/gas/elf/section12b.d: Likewise.
39 * testsuite/gas/elf/section16a.d: Likewise.
40 * testsuite/gas/elf/section16b.d: Likewise.
41
59e28a97
GN
422020-04-02 Gunther Nikl <gnikl@justmail.de>
43
44 * config/tc-m68k.c (m68k_ip): Fix range check for index register
45 with a suppressed address register.
46
efc3a950
L
472020-04-01 H.J. Lu <hongjiu.lu@intel.com>
48
49 PR gas/25756
50 * config/tc-i386.h (TC_FORCE_RELOCATION_ABS): New.
51 * testsuite/gas/i386/localpic.s: Add a test for relocation
52 against local absolute symbol.
53 * testsuite/gas/i386/x86-64-localpic.s: Likewise.
54 * testsuite/gas/i386/localpic.d: Updated.
55 * testsuite/gas/i386/x86-64-localpic.d: Likewise.
56 * testsuite/gas/i386/ilp32/x86-64-localpic.d: Likewise.
57
15d47c3a
RO
582020-04-01 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
59
60 PR gas/25732
61 * testsuite/gas/i386/solaris/x86-64-branch-2.d: New file.
62 * testsuite/gas/i386/solaris/x86-64-branch-3.d: New file.
63 * testsuite/gas/i386/solaris/x86-64-jump.d: Incorporate changes to
64 testsuite/gas/i386/x86-64-jump.d.
65 * gas/testsuite/gas/i386/solaris/x86-64-mpx-branch-1.d:
66 Incorporate changes to
67 gas/testsuite/gas/i386/x86-64-mpx-branch-1.d.
68 * testsuite/gas/i386/solaris/x86-64-mpx-branch-2.d : Incorporate
69 changes to testsuite/gas/i386/x86-64-mpx-branch-2.d.
70 * testsuite/gas/i386/x86-64-branch-2.d: Skip on *-*-solaris*.
71 * testsuite/gas/i386/x86-64-branch-3.d: Likewise.
72
876678f0
MR
732020-03-31 Maciej W. Rozycki <macro@linux-mips.org>
74
75 PR 25611
76 PR 25614
77 * dwarf2dbg.c: Do not include "bignum.h".
78
d1a89da5
NC
792020-03-30 Nelson Chu <nelson.chu@sifive.com>
80
81 * testsuite/gas/riscv/alias-csr.d: Move this to priv-reg-pseudo.
82 * testsuite/gas/riscv/alias-csr.s: Likewise.
83 * testsuite/gas/riscv/no-aliases-csr.d: Move this
84 to priv-reg-pseudo-noalias.
85 * testsuite/gas/riscv/bad-csr.d: Rename to priv-reg-fail-nonexistent.
86 * testsuite/gas/riscv/bad-csr.l: Likewise.
87 * testsuite/gas/riscv/bad-csr.s: Likewise.
88 * testsuite/gas/riscv/satp.d: Removed. Already included in priv-reg.
89 * testsuite/gas/riscv/satp.s: Likewise.
90 * testsuite/gas/riscv/priv-reg-pseudo.d: New testcase for all pseudo
91 csr instruction, including alias-csr testcase.
92 * testsuite/gas/riscv/priv-reg-pseudo.s: Likewise.
93 * testsuite/gas/riscv/priv-reg-pseudo-noalias.d: New testcase for all
94 pseudo instruction with objdump -Mno-aliases.
95 * testsuite/gas/riscv/priv-reg-fail-nonexistent.d: New testcase.
96 * testsuite/gas/riscv/priv-reg-fail-nonexistent.l: Likewise.
97 * testsuite/gas/riscv/priv-reg-fail-nonexistent.s: Likewise.
98 * testsuite/gas/riscv/priv-reg.d: Update CSR to 1.11.
99 * testsuite/gas/riscv/priv-reg.s: Likewise.
100 * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
101 * testsuite/gas/riscv/csr-dw-regnums.d: Likewise.
102 * testsuite/gas/riscv/csr-dw-regnums.s: Likewise.
103
b7780957
J
1042020-03-25 J.W. Jagersma <jwjagersma@gmail.com>
105
106 * config/obj-coff.c (obj_coff_section): Set the bss flag on
107 sections with the "b" attribute.
108
d1023b5d
AM
1092020-03-22 Alan Modra <amodra@gmail.com>
110
111 * testsuite/gas/s12z/truncated.d: Update expected output.
112
0d832e7f
SB
1132020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
114
115 PR 25690
116 * config/tc-z80.c (md_pseudo_table): Add xdef anf xref pseudo ops.
117 * doc/c-z80.texi: Update documentation.
118
327ef784
NC
1192020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
120
121 PR 25641
122 PR 25668
123 PR 25633
124 Fix disassembling ED+A4/AC/B4/BC opcodes.
125 Fix assembling lines containing colonless label and instruction
126 with first operand inside parentheses.
127 Fix registration of unsupported by target CPU registers.
128 * config/tc-z80.c: See above.
129 * config/tc-z80.h: See above.
130 * testsuite/gas/z80/colonless.d: Update test.
131 * testsuite/gas/z80/colonless.s: Likewise.
132 * testsuite/gas/z80/ez80_adl_all.d: Likewise.
133 * testsuite/gas/z80/ez80_unsup_regs.d: Likewise.
134 * testsuite/gas/z80/ez80_z80_all.d: Likewise.
135 * testsuite/gas/z80/gbz80_unsup_regs.d: Likewise.
136 * testsuite/gas/z80/r800_unsup_regs.d: Likewise.
137 * testsuite/gas/z80/unsup_regs.s: Likewise.
138 * testsuite/gas/z80/z180_unsup_regs.d: Likewise.
139 * testsuite/gas/z80/z80.exp: Likewise.
140 * testsuite/gas/z80/z80_strict_unsup_regs.d: Likewise.
141 * testsuite/gas/z80/z80_unsup_regs.d: Likewise.
142 * testsuite/gas/z80/z80n_unsup_regs.d: Likewise.
143
66d1f7cc
AV
1442020-03-13 Andre Vieira <andre.simoesdiasvieira@arm.com>
145
146 PR 25660
147 * config/tc-arm.c (operand_parse_code): Add OP_RNSDMQR and OP_oRNSDMQ.
148 (parse_operands): Handle new operand codes.
149 (do_neon_dyadic_long): Make shape check accept the scalar variants.
150 (asm_opcode_insns): Fix operand codes for vaddl and vsubl.
151 * testsuite/gas/arm/mve-vaddsub-it.s: New test.
152 * testsuite/gas/arm/mve-vaddsub-it.d: New test.
153 * testsuite/gas/arm/mve-vaddsub-it-bad.s: New test.
154 * testsuite/gas/arm/mve-vaddsub-it-bad.l: New test.
155 * testsuite/gas/arm/mve-vaddsub-it-bad.d: New test.
156 * testsuite/gas/arm/nomve-vaddsub-it.d: New test.
157
9e8f1c90
L
1582020-03-11 H.J. Lu <hongjiu.lu@intel.com>
159
160 * NEWS: Mention x86 assembler options for CVE-2020-0551.
161
97b4a8f7
L
1622020-03-11 H.J. Lu <hongjiu.lu@intel.com>
163
164 * testsuite/gas/i386/i386.exp: Run new tests.
165 * testsuite/gas/i386/lfence-byte.d: New file.
166 * testsuite/gas/i386/lfence-byte.e: Likewise.
167 * testsuite/gas/i386/lfence-byte.s: Likewise.
168 * testsuite/gas/i386/lfence-indbr-a.d: Likewise.
169 * testsuite/gas/i386/lfence-indbr-b.d: Likewise.
170 * testsuite/gas/i386/lfence-indbr-c.d: Likewise.
171 * testsuite/gas/i386/lfence-indbr.e: Likewise.
172 * testsuite/gas/i386/lfence-indbr.s: Likewise.
173 * testsuite/gas/i386/lfence-load.d: Likewise.
174 * testsuite/gas/i386/lfence-load.s: Likewise.
175 * testsuite/gas/i386/lfence-ret-a.d: Likewise.
176 * testsuite/gas/i386/lfence-ret-b.d: Likewise.
177 * testsuite/gas/i386/lfence-ret.s: Likewise.
178 * testsuite/gas/i386/x86-64-lfence-byte.d: Likewise.
179 * testsuite/gas/i386/x86-64-lfence-byte.e: Likewise.
180 * testsuite/gas/i386/x86-64-lfence-byte.s: Likewise.
181 * testsuite/gas/i386/x86-64-lfence-indbr-a.d: Likewise.
182 * testsuite/gas/i386/x86-64-lfence-indbr-b.d: Likewise.
183 * testsuite/gas/i386/x86-64-lfence-indbr-c.d: Likewise.
184 * testsuite/gas/i386/x86-64-lfence-indbr.e: Likewise.
185 * testsuite/gas/i386/x86-64-lfence-indbr.s: Likewise.
186 * testsuite/gas/i386/x86-64-lfence-load.d: Likewise.
187 * testsuite/gas/i386/x86-64-lfence-load.s: Likewise.
188 * testsuite/gas/i386/x86-64-lfence-ret-a.d: Likewise.
189 * testsuite/gas/i386/x86-64-lfence-ret-b.d: Likewise.
190
ae531041
L
1912020-03-11 H.J. Lu <hongjiu.lu@intel.com>
192
193 * config/tc-i386.c (lfence_after_load): New.
194 (lfence_before_indirect_branch_kind): New.
195 (lfence_before_indirect_branch): New.
196 (lfence_before_ret_kind): New.
197 (lfence_before_ret): New.
198 (last_insn): New.
199 (load_insn_p): New.
200 (insert_lfence_after): New.
201 (insert_lfence_before): New.
202 (md_assemble): Call insert_lfence_before and insert_lfence_after.
203 Set last_insn.
204 (OPTION_MLFENCE_AFTER_LOAD): New.
205 (OPTION_MLFENCE_BEFORE_INDIRECT_BRANCH): New.
206 (OPTION_MLFENCE_BEFORE_RET): New.
207 (md_longopts): Add -mlfence-after-load=,
208 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
209 (md_parse_option): Handle -mlfence-after-load=,
210 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
211 (md_show_usage): Display -mlfence-after-load=,
212 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
213 (i386_cons_align): New.
214 * config/tc-i386.h (i386_cons_align): New.
215 (md_cons_align): New.
216 * doc/c-i386.texi: Document -mlfence-after-load=,
217 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
218
5496f3c6
NC
2192020-03-11 Nick Clifton <nickc@redhat.com>
220
221 PR 25611
222 PR 25614
223 * dwarf2dbg.c (DWARF2_FILE_TIME_NAME): Default to -1.
224 (DWARF2_FILE_SIZE_NAME): Default to -1.
225 (DWARF2_LINE_VERSION): Default to the current dwarf level or 3,
226 whichever is higher.
227 (DWARF2_LINE_MAX_OPS_PER_INSN): Provide a default value of 1.
228 (NUM_MD5_BYTES): Define.
229 (struct file entry): Add md5 field.
230 (get_filenum): Delete and replace with...
231 (get_basename): New function.
232 (get_directory_table_entry): New function.
233 (allocate_filenum): New function.
234 (allocate_filename_to_slot): New function.
235 (dwarf2_where): Use new functions.
236 (dwarf2_directive_filename): Add support for extended .file
237 pseudo-op.
238 (dwarf2_directive_loc): Allow the use of file number zero with
239 DWARF 5 or higher.
240 (out_file_list): Rename to...
241 (out_dir_and_file_list): Add DWARF 5 support.
242 (out_debug_line): Emit extra values into the section header for
243 DWARF 5.
244 (out_debug_str): Allow for file 0 to be used with DWARF 5.
245 * doc/as.texi (.file): Update the description of this pseudo-op.
246 * testsuite/gas/elf-dwarf-5-file0.s: Add more lines.
247 * testsuite/gas/elf-dwarf-5-file0.d: Update expected dump output.
248 * testsuite/gas/lns/lns-diag-1.l: Update expected error message.
249 * NEWS: Mention the new feature.
250
a6a1f5e0
AM
2512020-03-10 Alan Modra <amodra@gmail.com>
252
253 * config/tc-csky.c (get_operand_value): Rewrite 1 << 31 expressions
254 to avoid signed overflow.
255 * config/tc-mcore.c (md_assemble): Likewise.
256 * config/tc-mips.c (gpr_read_mask, gpr_write_mask): Likewise.
257 * config/tc-nds32.c (SET_ADDEND): Likewise.
258 * config/tc-nios2.c (nios2_assemble_arg_R): Likewise.
259
3fabc179
JB
2602020-03-09 Jan Beulich <jbeulich@suse.com>
261
262 * testsuite/gas/i386/avx.s: Add long-form VCMP[PS][SD] pseudos.
263 * testsuite/gas/i386/avx.d, testsuite/gas/i386/avx-16bit.d,
264 testsuite/gas/i386/avx-intel.d: Adjust expectations.
265
190e5fc8
AM
2662020-03-07 Alan Modra <amodra@gmail.com>
267
268 * testsuite/gas/elf/dwarf-5-file0.s: Don't start directives in
269 first column.
270
84d9ab33
NC
2712020-03-06 Nick Clifton <nickc@redhat.com>
272
273 PR 25614
274 * dwarf2dbg.c (dwarf2_directive_filename): Allow a file number of
275 0 if the dwarf_level is 5 or more. Complain if a filename follows
276 a file 0.
277 * testsuite/gas/elf/dwarf-5-file0.s: New test.
278 * testsuite/gas/elf/dwarf-5-file0.d: New test driver.
279 * testsuite/gas/elf/elf.exp: Run the new test.
280
281 PR 25612
282 * config/tc-ia64.h (DWARF2_VERISION): Fix typo.
283 * doc/as.texi: Fix another typo.
284
31bf1864
NC
2852020-03-06 Nick Clifton <nickc@redhat.com>
286
287 PR 25612
288 * as.c (dwarf_level): Define.
289 (show_usage): Add --gdwarf-3, --gdwarf-4 and --gdwarf-5.
290 (parse_args): Add support for the new options.
291 as.h (dwarf_level): Prototype.
292 * dwarf2dbg.c (DWARF2_VERSION): Use dwarf_level as default version
293 value.
294 * config/tc-ia64.h (DWARF2_VERISION): Update definition.
295 (DWARF2_LINE_VERSION): Remove definition.
296 * doc/as.texi: Document the new options.
297
3c968de5
NC
2982020-03-06 Nick Clifton <nickc@redhat.com>
299
300 PR 25572
301 * as.c (main): Allow matching input and outputs when they are
302 not regular files.
303
bc49bfd8
JB
3042020-03-06 Jan Beulich <jbeulich@suse.com>
305
306 * config/tc-i386.c (match_mem_size): Generalize broadcast special
307 casing.
308 (check_VecOperands): Zap xmmword/ymmword/zmmword when more than
309 one of byte/word/dword/qword is set alongside a SIMD register in
310 a template's operand.
311
4873e243
JB
3122020-03-06 Jan Beulich <jbeulich@suse.com>
313
314 * config/tc-i386.c (match_template): Extend code in logic
315 rejecting certain suffixes in certain modes to also cover mask
316 register use and VecSIB. Drop special casing of broadcast. Skip
317 immediates in the check.
318
e365e234
JB
3192020-03-06 Jan Beulich <jbeulich@suse.com>
320
321 * config/tc-i386.c (match_template): Fold duplicate code in
322 logic rejecting certain suffixes in certain modes. Drop
323 pointless "else".
324
4ed21b58
JB
3252020-03-06 Jan Beulich <jbeulich@suse.com>
326
327 * config/tc-i386.c (process_suffix): Exlucde !vexw insns
328 alongside !norex64 ones.
329 * testsuite/gas/i386/x86-64-avx512bw.s: Test VPEXTR* and VPINSR*
330 with both 32- and 64-bit GPR operands.
331 * testsuite/gas/i386/x86-64-avx512f.s: Test VEXTRACTPS with both
332 32- and 64-bit GPR operands.
333 * testsuite/gas/i386/x86-64-avx512bw-intel.d,
334 testsuite/gas/i386/x86-64-avx512bw.d,
335 testsuite/gas/i386/x86-64-avx512f-intel.d,
336 testsuite/gas/i386/x86-64-avx512f.d: Adjust expectations.
337
643bb870
JB
3382020-03-06 Jan Beulich <jbeulich@suse.com>
339
340 * config/tc-i386.c (md_assemble): Drop use of rex64.
341 (process_suffix): For REX.W for 64-bit CRC32.
342
a23b33b3
JB
3432020-03-06 Jan Beulich <jbeulich@suse.com>
344
345 * config/tc-i386.c (i386_addressing_mode): For 32-bit
346 addressing for MPX insns without base/index.
347 * testsuite/gas/i386/mpx-16bit.s,
348 * testsuite/gas/i386/mpx-16bit.d: New.
349 * testsuite/gas/i386/i386.exp: Run new test.
350
a0497384
JB
3512020-03-06 Jan Beulich <jbeulich@suse.com>
352
353 * testsuite/gas/i386/adx.s, testsuite/gas/i386/cet.s,
354 testsuite/gas/i386/ept.s, testsuite/gas/i386/fsgs.s,
355 testsuite/gas/i386/invpcid.s, testsuite/gas/i386/movdir.s,
356 testsuite/gas/i386/ptwrite.s, testsuite/gas/i386/vmx.s,
357 * testsuite/gas/i386/code16.s: Add CR, DR, and TR access cases
358 as well as a BSWAP one.
359 * testsuite/gas/i386/rdpid.s: Add 16-bit case.
360 * testsuite/gas/i386/sse2-16bit.s: Cover more insns.
361 * testsuite/gas/i386/adx-intel.d, testsuite/gas/i386/adx.d,
362 testsuite/gas/i386/cet-intel.d, testsuite/gas/i386/cet.d,
363 testsuite/gas/i386/code16.d, testsuite/gas/i386/ept-intel.d,
364 testsuite/gas/i386/ept.d, testsuite/gas/i386/fsgs-intel.d,
365 testsuite/gas/i386/fsgs.d, testsuite/gas/i386/invpcid-intel.d,
366 testsuite/gas/i386/invpcid.d, testsuite/gas/i386/movdir-intel.d,
367 testsuite/gas/i386/movdir.d, testsuite/gas/i386/ptwrite-intel.d,
368 testsuite/gas/i386/ptwrite.d, testsuite/gas/i386/rdpid-intel.d,
369 testsuite/gas/i386/rdpid.d, testsuite/gas/i386/sse2-16bit.d,
370 testsuite/gas/i386/vmx.d: Adjust expectations.
371
b630c145
JB
3722020-03-06 Jan Beulich <jbeulich@suse.com>
373
374 * config/tc-i386.c (md_assemble): Also exclude tpause and umwait
375 from having their operands swapped.
376 * testsuite/gas/i386/waitpkg.s,
377 testsuite/gas/i386/x86-64-waitpkg.s: Add tpause and umwait
378 3-operand cases as well as testing of 16-bit code generation.
379 * testsuite/gas/i386/waitpkg.d,
380 testsuite/gas/i386/waitpkg-intel.d,
381 testsuite/gas/i386/x86-64-waitpkg.d,
382 testsuite/gas/i386/x86-64-waitpkg-intel.d: Adjust expectations.
383
de48783e
NC
3842020-03-04 Nelson Chu <nelson.chu@sifive.com>
385
dee35d02
NC
386 * config/tc-riscv.c (percent_op_utype): Support the modifier
387 %got_pcrel_hi.
388 * doc/c-riscv.texi: Add documentation.
389 * testsuite/gas/riscv/no-relax-reloc.d: Add test case for the new
390 modifier %got_pcrel_hi.
391 * testsuite/gas/riscv/no-relax-reloc.s: Likewise.
392 * testsuite/gas/riscv/relax-reloc.d: Likewise.
393 * testsuite/gas/riscv/relax-reloc.s: Likewise.
394
de48783e
NC
395 * doc/c-riscv.texi (relocation modifiers): Add documentation.
396 (RISC-V-Formats): Update the section name from "Instruction Formats"
397 to "RISC-V Instruction Formats".
398
749479c8
AO
3992020-03-04 Alexandre Oliva <oliva@adacore.com>
400
401 * config/tc-arm.c (md_apply_fix): Warn if a PC-relative load is
402 detected in a section which does not have at least 4 byte
403 alignment.
404 * testsuite/gas/arm/armv8-ar-it-bad.s: Add alignment directive.
405 * testsuite/gas/arm/ldr-t.s: Likewise.
406 * testsuite/gas/arm/sp-pc-usage-t.s: Likewise.
407 * testsuite/gas/arm/sp-pc-usage-t.d: Finish test at end of
408 disassembly, ignoring any NOPs that may have been inserted because
409 of section alignment.
410 * testsuite/gas/arm/ldr-t.d: Likewise.
411
a847e322
JB
4122020-03-04 Jan Beulich <jbeulich@suse.com>
413
414 * config/tc-i386.c (cpu_arch): Add .sev_es entry.
415 * doc/c-i386.texi: Mention sev_es.
416 * testsuite/gas/i386/arch-13.s: Add SEV-ES case.
417 * testsuite/gas/i386/arch-13.d: Extend -march=. Adjust
418 expectations.
419 * testsuite/gas/i386/arch-13-znver1.d,
420 testsuite/gas/i386/arch-13-znver2.d: Extend -march=.
421
3cd7f3e3
L
4222020-03-03 H.J. Lu <hongjiu.lu@intel.com>
423
424 * config/tc-i386.c (match_template): Replace ignoresize and
425 defaultsize with mnemonicsize.
426 (process_suffix): Likewise.
427
b8ba1385
SB
4282020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
429
430 PR 25627
431 * config/tc-z80.c (emit_ld_rr_m): Fix invalid compilation of
432 instruction LD IY,(HL).
433 * testsuite/gas/z80/ez80_adl_all.d: Update expected disassembly.
434 * testsuite/gas/z80/ez80_adl_all.s: Add tests of the instruction.
435 * testsuite/gas/z80/ez80_z80_all.d: Update expected disassembly.
436 * testsuite/gas/z80/ez80_z80_all.s: Add tests of the instruction.
437
10d97a0f
L
4382020-03-03 H.J. Lu <hongjiu.lu@intel.com>
439
440 PR gas/25622
441 * testsuite/gas/i386/i386.exp: Run x86-64-default-suffix and
442 x86-64-default-suffix-avx.
443 * testsuite/gas/i386/noreg64.s: Remove cvtsi2sd, cvtsi2ss,
444 vcvtsi2sd, vcvtsi2ss, vcvtusi2sd and vcvtusi2ss entries.
445 * testsuite/gas/i386/noreg64.d: Updated.
446 * testsuite/gas/i386/noreg64.l: Likewise.
447 * testsuite/gas/i386/x86-64-default-suffix-avx.d: New file.
448 * testsuite/gas/i386/x86-64-default-suffix.d: Likewise.
449 * testsuite/gas/i386/x86-64-default-suffix.s: Likewise.
450
8326546e
SB
4512020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
452
453 PR 25604
454 * config/tc-z80.c (contains_register): Prevent an illegal memory
455 access when checking an expression for a register name.
456
e3e896e6
AM
4572020-03-03 Alan Modra <amodra@gmail.com>
458
459 * config/obj-coff.h: Remove vestiges of coff-m68k and pe-mips
460 support.
461
a4dd6c97
AM
4622020-03-02 Alan Modra <amodra@gmail.com>
463
464 * config/tc-m32r.c (md_begin): Set SEC_SMALL_DATA on .scommon section.
465 * config/tc-mips.c (s_change_sec): Set SEC_SMALL_DATA for .sdata
466 and .sbss sections.
467 * config/tc-score.c: Delete !BFD_ASSEMBLER code throughout.
468 (s3_s_change_sec): Set SEC_SMALL_DATA for .sbss section.
469 (s3_s_score_lcomm): Likewise.
470 * config/tc-score7.c: Similarly.
471 * read.c (bss_alloc): Set SEC_SMALL_DATA for .sbss section.
472
dec7b24b
YS
4732020-02-28 YunQiang Su <syq@debian.org>
474
475 PR gas/25539
476 * config/tc-mips.c (fix_loongson3_llsc): Compare label value
477 to handle multi-labels.
478 (has_label_name): New.
479
cceb53b8
MM
4802020-02-26 Matthew Malcomson <matthew.malcomson@arm.com>
481
482 * config/tc-arm.c (enum pred_instruction_type): Remove
483 NEUTRAL_IT_NO_VPT_INSN predication type.
484 (cxn_handle_predication): Modify to require condition suffixes.
485 (handle_pred_state): Remove NEUTRAL_IT_NO_VPT_INSN cases.
486 * testsuite/gas/arm/cde-scalar.s: Update test.
487 * testsuite/gas/arm/cde-warnings.l: Update test.
488 * testsuite/gas/arm/cde-warnings.s: Update test.
489
da3ec71f
AM
4902020-02-26 Alan Modra <amodra@gmail.com>
491
492 * config/tc-arm.c (reg_expected_msgs[REG_TYPE_RNB]): Don't use
493 N_() on empty string.
494
42135cad
AM
4952020-02-26 Alan Modra <amodra@gmail.com>
496
497 * read.c (read_a_source_file): Call strncpy with length one
498 less than size of original_case_string.
499
dc1e8a47
AM
5002020-02-26 Alan Modra <amodra@gmail.com>
501
502 * config/obj-elf.c: Indent labels correctly.
503 * config/obj-macho.c: Likewise.
504 * config/tc-aarch64.c: Likewise.
505 * config/tc-alpha.c: Likewise.
506 * config/tc-arm.c: Likewise.
507 * config/tc-cr16.c: Likewise.
508 * config/tc-crx.c: Likewise.
509 * config/tc-frv.c: Likewise.
510 * config/tc-i386-intel.c: Likewise.
511 * config/tc-i386.c: Likewise.
512 * config/tc-ia64.c: Likewise.
513 * config/tc-mn10200.c: Likewise.
514 * config/tc-mn10300.c: Likewise.
515 * config/tc-nds32.c: Likewise.
516 * config/tc-riscv.c: Likewise.
517 * config/tc-s12z.c: Likewise.
518 * config/tc-xtensa.c: Likewise.
519 * config/tc-z80.c: Likewise.
520 * read.c: Likewise.
521 * symbols.c: Likewise.
522 * write.c: Likewise.
523
bd0cf5a6
NC
5242020-02-20 Nelson Chu <nelson.chu@sifive.com>
525
54b2aec1
NC
526 * config/tc-riscv.c (riscv_ip): New boolean insn_with_csr to indicate
527 we are assembling instruction with CSR. Call riscv_csr_read_only_check
528 after parsing all arguments.
529 (enum csr_insn_type): New enum is used to classify the CSR instruction.
530 (riscv_csr_insn_type, riscv_csr_read_only_check): New functions. These
531 are used to check if we write a read-only CSR by the CSR instruction.
532 * testsuite/gas/riscv/priv-reg-fail-read-only-01.s: New testcase. Test
533 all CSR for the read-only CSR checking.
534 * testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise.
535 * testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
536 * testsuite/gas/riscv/priv-reg-fail-read-only-02.s: New testcase. Test
537 all CSR instructions for the read-only CSR checking.
538 * testsuite/gas/riscv/priv-reg-fail-read-only-02.d: Likewise.
539 * testsuite/gas/riscv/priv-reg-fail-read-only-02.l: Likewise.
540
2ca89224
NC
541 * config/tc-riscv.c (struct riscv_set_options): New field csr_check.
542 (riscv_opts): Initialize it.
543 (reg_lookup_internal): Check the `riscv_opts.csr_check`
544 before doing the CSR checking.
545 (enum options): Add OPTION_CSR_CHECK and OPTION_NO_CSR_CHECK.
546 (md_longopts): Add mcsr-check and mno-csr-check.
547 (md_parse_option): Handle new enum option values.
548 (s_riscv_option): Handle new long options.
549 * doc/c-riscv.texi: Add description for the new .option and assembler
550 options.
551 * testsuite/gas/riscv/priv-reg-fail-fext.d: Add `-mcsr-check` to enable
552 the CSR checking.
553 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.
554
bd0cf5a6
NC
555 * config/tc-riscv.c (csr_extra_hash): New.
556 (enum riscv_csr_class): New enum. Used to decide
557 whether or not this CSR is legal in the current ISA string.
558 (struct riscv_csr_extra): New structure to hold all extra information
559 of CSR.
560 (riscv_init_csr_hashes): New. According to the DECLARE_CSR and
561 DECLARE_CSR_ALIAS, insert CSR extra information into csr_extra_hash.
562 Call hash_reg_name to insert CSR address into reg_names_hash.
563 (reg_csr_lookup_internal, riscv_csr_class_check): New functions.
564 Decide whether the CSR is valid according to the csr_extra_hash.
565 (reg_lookup_internal): Call reg_csr_lookup_internal for CSRs.
566 (init_opcode_hash): Update 'if (hash_error != NULL)' as hash_error is
567 not a boolean. This is same as riscv_init_csr_hash, so keep the
568 consistent usage.
569 (md_begin): Call riscv_init_csr_hashes for each DECLARE_CSR.
570 * testsuite/gas/riscv/csr-dw-regnums.d: Add -march=rv32if option.
571 * testsuite/gas/riscv/priv-reg.d: Add f-ext by -march option.
572 * testsuite/gas/riscv/priv-reg-fail-fext.d: New testcase. The source
573 file is `priv-reg.s`, and the ISA is rv32i without f-ext, so the
574 f-ext CSR are not allowed.
575 * testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise.
576 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: New testcase. The
577 source file is `priv-reg.s`, and the ISA is rv64if, so the
578 rv32-only CSR are not allowed.
579 * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
580
10a95fcc
AM
5812020-02-21 Alan Modra <amodra@gmail.com>
582
583 * config/tc-pdp11.c (md_apply_fix): Handle BFD_RELOC_32.
584 (tc_gen_reloc): Only give a BAD_CASE assertion on pcrel relocs.
585
dda2980f
AM
5862020-02-21 Alan Modra <amodra@gmail.com>
587
588 PR 25569
589 * config/obj-aout.c (obj_aout_frob_file_before_fix): Don't loop
590 on section size adjustment, instead perform another write if
591 exec header size is larger than section size.
592
bd3380bc
NC
5932020-02-19 Nelson Chu <nelson.chu@sifive.com>
594
595 * doc/c-riscv.texi: Add the doc entries for -march-attr/
596 -mno-arch-attr command line options.
597
fa164239
JW
5982020-02-19 Nelson Chu <nelson.chu@sifive.com>
599
600 * testsuite/gas/riscv/c-add-addi.d: New testcase.
601 * testsuite/gas/riscv/c-add-addi.s: Likewise.
602
fcaaac0a
SB
6032020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
604
605 PR 25576
606 * config/tc-z80.c (md_parse_option): Do not use an underscore
607 prefix for local labels in SDCC compatability mode.
608 (z80_start_line_hook): Remove SDCC dollar label support.
609 * testsuite/gas/z80/sdcc.d: Update expected disassembly.
610 * testsuite/gas/z80/sdcc.s: Likewise.
611
6122020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
613
614 PR 25517
615 * config/tc-z80.c: Add -march option.
616 * doc/as.texi: Update Z80 documentation.
617 * doc/c-z80.texi: Likewise.
618 * testsuite/gas/z80/ez80_adl_all.d: Update command line.
619 * testsuite/gas/z80/ez80_adl_suf.d: Likewise.
620 * testsuite/gas/z80/ez80_pref_dis.d: Likewise.
621 * testsuite/gas/z80/ez80_z80_all.d: Likewise.
622 * testsuite/gas/z80/ez80_z80_suf.d: Likewise.
623 * testsuite/gas/z80/gbz80_all.d: Likewise.
624 * testsuite/gas/z80/r800_extra.d: Likewise.
625 * testsuite/gas/z80/r800_ii8.d: Likewise.
626 * testsuite/gas/z80/r800_z80_doc.d: Likewise.
627 * testsuite/gas/z80/sdcc.d: Likewise.
628 * testsuite/gas/z80/z180.d: Likewise.
629 * testsuite/gas/z80/z180_z80_doc.d: Likewise.
630 * testsuite/gas/z80/z80_doc.d: Likewise.
631 * testsuite/gas/z80/z80_ii8.d: Likewise.
632 * testsuite/gas/z80/z80_in_f_c.d: Likewise.
633 * testsuite/gas/z80/z80_op_ii_ld.d: Likewise.
634 * testsuite/gas/z80/z80_out_c_0.d: Likewise.
635 * testsuite/gas/z80/z80_sli.d: Likewise.
636 * testsuite/gas/z80/z80n_all.d: Likewise.
637 * testsuite/gas/z80/z80n_reloc.d: Likewise.
638
a7e12755
L
6392020-02-19 H.J. Lu <hongjiu.lu@intel.com>
640
641 * config/tc-i386.c (output_insn): Mark cvtpi2ps and cvtpi2pd
642 with GNU_PROPERTY_X86_FEATURE_2_MMX.
643 * testsuite/gas/i386/i386.exp: Run property-3 and
644 x86-64-property-3.
645 * testsuite/gas/i386/property-3.d: New file.
646 * testsuite/gas/i386/property-3.s: Likewise.
647 * testsuite/gas/i386/x86-64-property-3.d: Likewise.
648
272a84b1
L
6492020-02-17 H.J. Lu <hongjiu.lu@intel.com>
650
651 * config/tc-i386.c (cpu_arch): Add .popcnt.
652 * doc/c-i386.texi: Remove abm and .abm. Add popcnt and .popcnt.
653 Add a tab before @samp{.sse4a}.
654
c8f8eebc
JB
6552020-02-17 Jan Beulich <jbeulich@suse.com>
656
657 * config/tc-i386.c (process_suffix): Don't try to guess a suffix
658 for AddrPrefixOpReg templates. Combine the two pieces of
659 addrprefixopreg handling. Reject 16-bit address reg in 64-bit
660 mode.
661
eedb0f2c
JB
6622020-02-17 Jan Beulich <jbeulich@suse.com>
663
664 PR gas/14439
665 * config/tc-i386.c (md_assemble): Also suppress operand
666 swapping for MONITOR{,X} and MWAIT{,X}.
667 * testsuite/gas/i386/sse3.s, testsuite/gas/i386/x86-64-sse3.s:
668 Add Intel syntax monitor/mwait tests.
669 * testsuite/gas/i386/sse3.d, testsuite/gas/i386/x86-64-sse3.d:
670 Adjust expectations.
671 *testsuite/gas/i386/sse3-intel.d,
672 testsuite/gas/i386/x86-64-sse3-intel.d: New.
673 * testsuite/gas/i386/i386.exp: Run new tests.
674
b9915cbc
JB
6752020-02-17 Jan Beulich <jbeulich@suse.com>
676
677 PR gas/6518
678 * config/tc-i386.c (process_suffix): Re-work Intel-syntax
679 [XYZ]MMWord memory operand ambiguity recognition logic (largely
680 re-indentation).
681 * testsuite/gas/i386/avx512dq-inval.s: Add vcvtqq2ps/vcvtuqq2ps
682 cases.
683 * testsuite/gas/i386/inval-avx512f.s: Also test vcvtneps2bf16.
684 * testsuite/gas/i386/avx512dq-inval.l,
685 testsuite/gas/i386/inval-avx.l,
686 testsuite/gas/i386/inval-avx512f.l: Adjust expectations.
687 * testsuite/gas/i386/avx512vl-ambig.s,
688 testsuite/gas/i386/avx512vl-ambig.l: New.
689 * testsuite/gas/i386/i386.exp: Run new test.
690
af5c13b0
L
6912020-02-16 H.J. Lu <hongjiu.lu@intel.com>
692
693 * config/tc-i386.c (cpu_arch): Add .sse4a and nosse4a. Restore
694 nosse4.
695 * doc/c-i386.texi: Document sse4a and nosse4a.
696
07d98387
L
6972020-02-14 H.J. Lu <hongjiu.lu@intel.com>
698
699 * doc/c-i386.texi: Remove the old movsx and movzx documentation
700 for AT&T syntax.
701
65fca059
JB
7022020-02-14 Jan Beulich <jbeulich@suse.com>
703
704 PR gas/25438
705 * config/tc-i386.c (md_assemble): Move movsx/movzx special
706 casing ...
707 (process_suffix): ... here. Consider just the first operand
708 initially.
709 (check_long_reg): Drop opcode 0x63 special case again.
710 * testsuite/gas/i386/i386.s, testsuite/gas/i386/iamcu-1.s,
711 testsuite/gas/i386/ilp32/x86-64.s, testsuite/gas/i386/x86_64.s:
712 Move ambiguous operand size tests ...
713 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
714 testsuite/gas/i386/noreg64.s: ... here.
715 * testsuite/gas/i386/i386.d, testsuite/gas/i386/i386-intel.d
716 testsuite/gas/i386/iamcu-1.d, testsuite/gas/i386/ilp32/x86-64.d,
717 testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
718 testsuite/gas/i386/movx16.l, testsuite/gas/i386/movx32.l,
719 testsuite/gas/i386/movx64.l, testsuite/gas/i386/noreg16.d,
720 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
721 testsuite/gas/i386/x86-64-movsxd.d,
722 testsuite/gas/i386/x86-64-movsxd-intel.d,
723 testsuite/gas/i386/x86_64.d, testsuite/gas/i386/x86_64-intel.d:
724 Adjust expectations.
725 * testsuite/gas/i386/movx16.s, testsuite/gas/i386/movx16.l,
726 testsuite/gas/i386/movx32.s, testsuite/gas/i386/movx32.l,
727 testsuite/gas/i386/movx64.s, testsuite/gas/i386/movx64.l: New.
728 * testsuite/gas/i386/i386.exp: Run new tests.
729
b6773884
JB
7302020-02-14 Jan Beulich <jbeulich@suse.com>
731
732 * config/tc-i386.c (process_operands): Also skip segment
733 override prefix emission if it matches an already present one.
734 * testsuite/gas/i386/prefix32.s: Add double segment override
735 cases.
736 * testsuite/gas/i386/prefix32.l: Adjust expectations.
737
92334ad2
JB
7382020-02-14 Jan Beulich <jbeulich@suse.com>
739
740 * config/tc-i386.c (process_operands): Drop ineffectual segment
741 overrides when optimizing.
742 * testsuite/gas/i386/lea-optimize.d: New.
743 * testsuite/gas/i386/i386.exp: Run new test.
744
7452020-02-14 Jan Beulich <jbeulich@suse.com>
514a8bb0
JB
746
747 * config/tc-i386.c (process_operands): Also check insn prefix
748 for ineffectual segment override warning. Don't cover possible
749 VEX/EVEX encoded insns there.
750 * testsuite/gas/i386/lea.s, testsuite/gas/i386/lea.d,
751 testsuite/gas/i386/lea.e: New.
752 * testsuite/gas/i386/i386.exp: Run new test.
753
0e6724de
L
7542020-02-14 H.J. Lu <hongjiu.lu@intel.com>
755
756 PR gas/25438
757 * doc/c-i386.texi: Document movsx, movsxd and movzx for AT&T
758 syntax.
759
292676c1
L
7602020-02-13 Fangrui Song <maskray@google.com>
761 H.J. Lu <hongjiu.lu@intel.com>
762
763 PR gas/25551
764 * config/tc-i386.c (tc_i386_fix_adjustable): Don't check
765 BFD_RELOC_386_PLT32 nor BFD_RELOC_X86_64_PLT32.
766 * testsuite/gas/i386/i386.exp: Run relax-5 and x86-64-relax-4.
767 * testsuite/gas/i386/relax-5.d: New file.
768 * testsuite/gas/i386/relax-5.s: Likewise.
769 * testsuite/gas/i386/x86-64-relax-4.d: Likewise.
770 * testsuite/gas/i386/x86-64-relax-4.s: Likewise.
771
7deea9aa
JB
7722020-02-13 Jan Beulich <jbeulich@suse.com>
773
774 * config/tc-i386.c (cpu_noarch): Use CPU_ANY_SSE4_FLAGS in
775 "nosse4" entry.
776
6c0946d0
JB
7772020-02-12 Jan Beulich <jbeulich@suse.com>
778
779 * config/tc-i386.c (avx512): New (at file scope), moved from
780 (check_VecOperands): ... here.
781 (process_suffix): Add [XYZ]MMword operand size handling.
782 * testsuite/gas/i386/avx512dq-inval.s: Add VFPCLASS tests.
783 * testsuite/gas/i386/noavx512-2.s: Add Intel syntax VFPCLASS
784 tests.
785 * testsuite/gas/i386/avx512dq-inval.l,
786 testsuite/gas/i386/noavx512-2.l: Adjust expectations.
787
5990e377
JB
7882020-02-12 Jan Beulich <jbeulich@suse.com>
789
790 PR gas/24546
791 * config/tc-i386.c (match_template): Apply AMD64 check to 64-bit
792 code only.
793 * config/tc-i386-intel.c (i386_intel_operand): Also handle
794 CALL/JMP in O_tbyte_ptr case.
795 * doc/c-i386.texi: Mention far call and full pointer load ISA
796 differences.
797 * testsuite/gas/i386/x86-64-branch-3.s,
798 testsuite/gas/i386/x86-64-intel64.s: Add 64-bit far call cases.
799 * testsuite/gas/i386/x86-64-branch-3.d,
800 testsuite/gas/i386/x86-64-intel64.d: Adjust expectations.
801 * testsuite/gas/i386/x86-64-branch-5.l,
802 testsuite/gas/i386/x86-64-branch-5.s: New.
803 * testsuite/gas/i386/i386.exp: Run new test.
804
9706160a
JB
8052020-02-12 Jan Beulich <jbeulich@suse.com>
806
807 PR gas/25438
808 * config/tc-i386.c (REGISTER_WARNINGS): Delete.
809 (check_byte_reg): Skip only source operand of CRC32. Drop Non-
810 64-bit-only warning.
811 (check_word_reg): Consistently error on mismatching register
812 size and suffix.
813 * testsuite/gas/i386/general.s: Replace dword GPR with word one
814 for movw. Replace suffix / GPR for orb.
815 * testsuite/gas/i386/inval.s: Add tests for movw with dword and
816 byte GPRs as well as ones for inb/outb with a word accumulator.
817 * testsuite/gas/i386/general.l, testsuite/gas/i386/intelbad.l,
818 testsuite/gas/i386/inval.l: Adjust expectations.
819
5de4d9ef
JB
8202020-02-12 Jan Beulich <jbeulich@suse.com>
821
822 * config/tc-i386.c (operand_type_register_match): Also fall
823 through initial two if()-s when the template allows for a GPR
824 operand. Adjust comment.
825
50128d0c
JB
8262020-02-11 Jan Beulich <jbeulich@suse.com>
827
828 (struct _i386_insn): New field "short_form".
829 (optimize_encoding): Drop setting of shortform field.
830 (process_suffix): Set i.short_form. Replace shortform use.
831 (process_operands): Replace shortform use.
832
1ed818b4
MM
8332020-02-11 Matthew Malcomson <matthew.malcomson@arm.com>
834
835 * config/tc-arm.c (vcx_handle_register_arguments): Remove `for`
836 loop initial declaration.
837
5aae9ae9
MM
8382020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
839
840 * config/tc-arm.c (NEON_MAX_TYPE_ELS): Increment to account for
841 instructions that can have 5 arguments.
842 (enum operand_parse_code): Add new operands.
843 (parse_operands): Account for new operands.
844 (S5): New macro.
845 (enum neon_shape_el): Introduce P suffixes for coprocessor.
846 (neon_select_shape): Account for P suffix.
847 (LOW1): Move macro to global position.
848 (HI4): Move macro to global position.
849 (vcx_assign_vec_d): New.
850 (vcx_assign_vec_m): New.
851 (vcx_assign_vec_n): New.
852 (enum vcx_reg_type): New.
853 (vcx_get_reg_type): New.
854 (vcx_size_pos): New.
855 (vcx_vec_pos): New.
856 (vcx_handle_shape): New.
857 (vcx_ensure_register_in_range): New.
858 (vcx_handle_register_arguments): New.
859 (vcx_handle_insn_block): New.
860 (vcx_handle_common_checks): New.
861 (do_vcx1): New.
862 (do_vcx2): New.
863 (do_vcx3): New.
864 * testsuite/gas/arm/cde-missing-fp.d: New test.
865 * testsuite/gas/arm/cde-missing-fp.l: New test.
866 * testsuite/gas/arm/cde-missing-mve.d: New test.
867 * testsuite/gas/arm/cde-missing-mve.l: New test.
868 * testsuite/gas/arm/cde-mve-or-neon.d: New test.
869 * testsuite/gas/arm/cde-mve-or-neon.s: New test.
870 * testsuite/gas/arm/cde-mve.s: New test.
871 * testsuite/gas/arm/cde-warnings.l:
872 * testsuite/gas/arm/cde-warnings.s:
873 * testsuite/gas/arm/cde.d:
874 * testsuite/gas/arm/cde.s:
875
4934a27c
MM
8762020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
877 Matthew Malcomson <matthew.malcomson@arm.com>
878
879 * config/tc-arm.c (arm_ext_cde*): New feature sets for each
880 CDE coprocessor that can be enabled.
881 (enum pred_instruction_type): New pred type.
882 (BAD_NO_VPT): New error message.
883 (BAD_CDE): New error message.
884 (BAD_CDE_COPROC): New error message.
885 (enum operand_parse_code): Add new immediate operands.
886 (parse_operands): Account for new immediate operands.
887 (check_cde_operand): New.
888 (cde_coproc_enabled): New.
889 (cde_coproc_pos): New.
890 (cde_handle_coproc): New.
891 (cxn_handle_predication): New.
892 (do_custom_instruction_1): New.
893 (do_custom_instruction_2): New.
894 (do_custom_instruction_3): New.
895 (do_cx1): New.
896 (do_cx1a): New.
897 (do_cx1d): New.
898 (do_cx1da): New.
899 (do_cx2): New.
900 (do_cx2a): New.
901 (do_cx2d): New.
902 (do_cx2da): New.
903 (do_cx3): New.
904 (do_cx3a): New.
905 (do_cx3d): New.
906 (do_cx3da): New.
907 (handle_pred_state): Define new IT block behaviour.
908 (insns): Add newn CX*{,d}{,a} instructions.
909 (CDE_EXTENSIONS,armv8m_main_ext_table,armv8_1m_main_ext_table):
910 Define new cdecp extension strings.
911 * doc/c-arm.texi: Document new cdecp extension arguments.
912 * testsuite/gas/arm/cde-scalar.d: New test.
913 * testsuite/gas/arm/cde-scalar.s: New test.
914 * testsuite/gas/arm/cde-warnings.d: New test.
915 * testsuite/gas/arm/cde-warnings.l: New test.
916 * testsuite/gas/arm/cde-warnings.s: New test.
917 * testsuite/gas/arm/cde.d: New test.
918 * testsuite/gas/arm/cde.s: New test.
919
4b5aaf5f
L
9202020-02-10 H.J. Lu <hongjiu.lu@intel.com>
921
922 PR gas/25516
923 * config/tc-i386.c (intel64): Renamed to ...
924 (isa64): This.
925 (match_template): Accept Intel64 only instruction by default.
926 (i386_displacement): Updated.
927 (md_parse_option): Updated.
928 * c-i386.texi: Update -mamd64/-mintel64 documentation.
929 * testsuite/gas/i386/i386.exp: Run x86-64-sysenter. Pass
930 -mamd64 to x86-64-sysenter-amd.
931 * testsuite/gas/i386/x86-64-sysenter.d: New file.
932
33176d91
AM
9332020-02-10 Alan Modra <amodra@gmail.com>
934
935 * config/obj-elf.c (obj_elf_change_section): Error for section
936 type, attr or entsize changes in assembly.
937 * testsuite/gas/elf/elf.exp: Pass -Z to gas for section5 test.
938 * testsuite/gas/elf/section5.l: Update.
939
82194874
AM
9402020-02-10 Alan Modra <amodra@gmail.com>
941
942 * output-file.c (output_file_close): Do a normal close when
943 flag_always_generate_output.
944 * write.c (write_object_file): Don't stop output when
945 flag_always_generate_output.
946
9fc0b501
SB
9472020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
948
949 PR 25469
950 * config/tc-z80.c: Add -gbz80 command line option to generate code
951 for the GameBoy Z80. Add support for generating DWARF.
952 * config/tc-z80.h: Add support for DWARF debug information
953 generation.
954 * doc/c-z80.texi: Document new command line option.
955 * testsuite/gas/z80/gbz80_all.d: New file.
956 * testsuite/gas/z80/gbz80_all.s: New file.
957 * testsuite/gas/z80/z80.exp: Run the new tests.
958 * testsuite/gas/z80/z80n_all.d: New file.
959 * testsuite/gas/z80/z80n_all.s: New file.
960 * testsuite/gas/z80/z80n_reloc.d: New file.
961
b7d07216
L
9622020-02-06 H.J. Lu <hongjiu.lu@intel.com>
963
964 PR gas/25381
965 * config/obj-elf.c (get_section): Also check
966 linked_to_symbol_name.
967 (obj_elf_change_section): Also set map_head.linked_to_symbol_name.
968 (obj_elf_parse_section_letters): Handle the 'o' flag.
969 (build_group_lists): Renamed to ...
970 (build_additional_section_info): This. Set elf_linked_to_section
971 from map_head.linked_to_symbol_name.
972 (elf_adjust_symtab): Updated.
973 * config/obj-elf.h (elf_section_match): Add linked_to_symbol_name.
974 * doc/as.texi: Document the 'o' flag.
975 * testsuite/gas/elf/elf.exp: Run PR gas/25381 tests.
976 * testsuite/gas/elf/section18.d: New file.
977 * testsuite/gas/elf/section18.s: Likewise.
978 * testsuite/gas/elf/section19.d: Likewise.
979 * testsuite/gas/elf/section19.s: Likewise.
980 * testsuite/gas/elf/section20.d: Likewise.
981 * testsuite/gas/elf/section20.s: Likewise.
982 * testsuite/gas/elf/section21.d: Likewise.
983 * testsuite/gas/elf/section21.l: Likewise.
984 * testsuite/gas/elf/section21.s: Likewise.
985
5eb617a7
L
9862020-02-06 H.J. Lu <hongjiu.lu@intel.com>
987
988 * NEWS: Mention x86 assembler options to align branches for
989 binutils 2.34.
990
986ac314
L
9912020-02-06 H.J. Lu <hongjiu.lu@intel.com>
992
993 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique
994 only for ELF targets.
995 * testsuite/gas/i386/unique.d: Don't xfail.
996 * testsuite/gas/i386/x86-64-unique.d: Likewise.
997
19234a6d
AM
9982020-02-06 Alan Modra <amodra@gmail.com>
999
1000 * testsuite/gas/i386/unique.d: xfail for non-elf targets.
1001 * testsuite/gas/i386/x86-64-unique.d: Likewise.
1002
02e0be69
AM
10032020-02-06 Alan Modra <amodra@gmail.com>
1004
1005 * testsuite/gas/elf/section12a.d: Use supports_gnu_osabi in
1006 xfail, and rename test.
1007 * testsuite/gas/elf/section12b.d: Likewise.
1008 * testsuite/gas/elf/section16a.d: Likewise.
1009 * testsuite/gas/elf/section16b.d: Likewise.
1010
a8c4d40b
L
10112020-02-02 H.J. Lu <hongjiu.lu@intel.com>
1012
1013 PR gas/25380
1014 * config/obj-elf.c (section_match): Removed.
1015 (get_section): Also match SEC_ASSEMBLER_SECTION_ID and
1016 section_id.
1017 (obj_elf_change_section): Replace info and group_name arguments
1018 with match_p. Also update the section ID and flags from match_p.
1019 (obj_elf_section): Handle "unique,N". Update call to
1020 obj_elf_change_section.
1021 * config/obj-elf.h (elf_section_match): New.
1022 (obj_elf_change_section): Updated.
1023 * config/tc-arm.c (start_unwind_section): Update call to
1024 obj_elf_change_section.
1025 * config/tc-ia64.c (obj_elf_vms_common): Likewise.
1026 * config/tc-microblaze.c (microblaze_s_data): Likewise.
1027 (microblaze_s_sdata): Likewise.
1028 (microblaze_s_rdata): Likewise.
1029 (microblaze_s_bss): Likewise.
1030 * config/tc-mips.c (s_change_section): Likewise.
1031 * config/tc-msp430.c (msp430_profiler): Likewise.
1032 * config/tc-rx.c (parse_rx_section): Likewise.
1033 * config/tc-tic6x.c (tic6x_start_unwind_section): Likewise.
1034 * doc/as.texi: Document "unique,N" in .section directive.
1035 * testsuite/gas/elf/elf.exp: Run "unique,N" tests.
1036 * testsuite/gas/elf/section15.d: New file.
1037 * testsuite/gas/elf/section15.s: Likewise.
1038 * testsuite/gas/elf/section16.s: Likewise.
1039 * testsuite/gas/elf/section16a.d: Likewise.
1040 * testsuite/gas/elf/section16b.d: Likewise.
1041 * testsuite/gas/elf/section17.d: Likewise.
1042 * testsuite/gas/elf/section17.l: Likewise.
1043 * testsuite/gas/elf/section17.s: Likewise.
1044 * testsuite/gas/i386/unique.d: Likewise.
1045 * testsuite/gas/i386/unique.s: Likewise.
1046 * testsuite/gas/i386/x86-64-unique.d: Likewise.
1047 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique.
1048
575d37ae
L
10492020-02-02 H.J. Lu <hongjiu.lu@intel.com>
1050
1051 * testsuite/gas/elf/section13.s: Replace @nobits with %nobits.
1052
2384096c
G
10532020-02-01 Anthony Green <green@moxielogic.com>
1054
1055 * config/tc-moxie.c (md_begin): Don't force big-endian mode.
1056
95441c43
SL
10572020-01-31 Sandra Loosemore <sandra@codesourcery.com>
1058
1059 * config/tc-nios2.c (nios2_cons): Handle %gotoff as well as
1060 %tls_ldo.
1061
d465d695
AV
10622020-01-31 Andre Vieira <andre.simoesdiasvieira@arm.com>
1063
1064 PR gas/25472
1065 * config/tc-arm.c (armv8m_main_ext_table): Refactored +dsp adding.
1066 (armv8_1m_main_ext_table): Refactored +dsp adding and enabled dsp for
1067 +mve.
1068 * testsuite/gas/arm/mve_dsp.d: New test.
1069
d26cc8a9
NC
10702020-01-31 Nick Clifton <nickc@redhat.com>
1071
1072 * config/tc-s390.c (s390_elf_suffix): Return ELF_SUFFIX_NONE
1073 rather than BFD_RELOC_NONE.
1074
90e9955a
SP
10752020-01-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
1076
1077 * config/tc-arm.c (fldmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2"
1078 to support VLDMIA instruction for MVE.
1079 (fldmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VLDMDB
1080 instruction for MVE.
1081 (fstmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMIA
1082 instruction for MVE.
1083 (fstmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMDB
1084 instruction for MVE.
1085 * testsuite/gas/arm/mve-ldst.d: New test.
1086 * testsuite/gas/arm/mve-ldst.s: Likewise.
1087
53943f32
NC
10882020-01-31 Nick Clifton <nickc@redhat.com>
1089
1090 * po/fr.po: Updated French translation.
1091 * po/ru.po: Updated Russian translation.
1092
c3036ed0
RS
10932020-01-31 Richard Sandiford <richard.sandiford@arm.com>
1094
1095 * testsuite/gas/aarch64/sve-bfloat-movprfx.s: Use .h rather than
1096 .s for the movprfx.
1097 * testsuite/gas/aarch64/sve-bfloat-movprfx.d: Update accordingly.
1098 * testsuite/gas/aarch64/sve-movprfx_28.d,
1099 * testsuite/gas/aarch64/sve-movprfx_28.l,
1100 * testsuite/gas/aarch64/sve-movprfx_28.s: New test.
1101
2ae4c703
JB
11022020-01-30 Jan Beulich <jbeulich@suse.com>
1103
1104 * config/tc-i386.c (output_disp): Tighten base_opcode check.
1105 * testsuite/gas/i386/got.s: Add LSL, MOVLPS, and BNDCN cases.
1106 * testsuite/gas/i386/got-no-relax.d, testsuite/gas/i386/got.d:
1107 Adjust expectations.
1108
bd434cc4
JM
11092020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
1110
1111 * testsuite/gas/bpf/alu.d: Update expected opcode for `neg'.
1112 * testsuite/gas/bpf/alu-be.d: Likewise.
1113 * testsuite/gas/bpf/alu32.d: Likewise for `neg32'.
1114 * testsuite/gas/bpf/alu32-be.d: Likewise.
1115
aeab2b26
JB
11162020-01-30 Jan Beulich <jbeulich@suse.com>
1117
1118 * testsuite/gas/i386/x86-64-branch-2.s,
1119 testsuite/gas/i386/x86-64-branch-4.s,
1120 testsuite/gas/i386/x86-64-branch.s: Add RETW cases.
1121 * testsuite/gas/i386/ilp32/x86-64-branch.d,
1122 testsuite/gas/i386/x86-64-branch-2.d,
1123 testsuite/gas/i386/x86-64-branch-4.l,
1124 testsuite/gas/i386/x86-64-branch.d: Adjust expectations.
1125
873494c8
JB
11262020-01-30 Jan Beulich <jbeulich@suse.com>
1127
1128 * config/tc-i386.c (process_suffix): .
1129 testsuite/gas/i386/noreg64.s: Add IRET and LRET cases.
1130 testsuite/gas/i386/x86-64-opcode.s: Add suffix to IRET and LRET.
1131 Add LRETQ case.
1132 testsuite/gas/i386/x86-64-suffix.s: Drop IRET case without
1133 suffix.
1134 testsuite/gas/i386/x86_64.s: Add RETF cases.
1135 * testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
1136 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l,
1137 testsuite/gas/i386/x86-64-opcode.d,
1138 testsuite/gas/i386/x86-64-suffix-intel.d,
1139 testsuite/gas/i386/x86-64-suffix.d,
1140 testsuite/gas/i386/x86_64-intel.d
1141 testsuite/gas/i386/x86_64.d: Adjust expectations.
1142 * testsuite/gas/i386/x86-64-suffix.e,
1143 testsuite/gas/i386/x86_64.e: New.
1144
62b3f548
JB
11452020-01-30 Jan Beulich <jbeulich@suse.com>
1146
1147 * config/tc-i386.c (process_suffix): Redo and move FLDENV et al
1148 special case.
1149
bc31405e
L
11502020-01-27 H.J. Lu <hongjiu.lu@intel.com>
1151
1152 PR binutils/25445
1153 * config/tc-i386.c (check_long_reg): Also convert to QWORD for
1154 movsxd.
1155 * doc/c-i386.texi: Add a node for AMD64 vs. Intel64 ISA
1156 differences. Document movslq and movsxd.
1157 * testsuite/gas/i386/i386.exp: Run PR binutils/25445 tests.
1158 * testsuite/gas/i386/x86-64-movsxd-intel.d: New file.
1159 * testsuite/gas/i386/x86-64-movsxd-intel64-intel.d: Likewise.
1160 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.l: Likewise.
1161 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.s: Likewise.
1162 * testsuite/gas/i386/x86-64-movsxd-intel64.d: Likewise.
1163 * testsuite/gas/i386/x86-64-movsxd-intel64.s: Likewise.
1164 * testsuite/gas/i386/x86-64-movsxd-inval.l: Likewise.
1165 * testsuite/gas/i386/x86-64-movsxd-inval.s: Likewise.
1166 * testsuite/gas/i386/x86-64-movsxd.d: Likewise.
1167 * testsuite/gas/i386/x86-64-movsxd.s: Likewise.
1168
e3696f67
AM
11692020-01-27 Alan Modra <amodra@gmail.com>
1170
1171 * testsuite/gas/all/gas.exp: Replace case statements with switch
1172 statements.
1173 * testsuite/gas/elf/elf.exp: Likewise.
1174 * testsuite/gas/macros/macros.exp: Likewise.
1175 * testsuite/lib/gas-defs.exp: Likewise.
1176
7568c93b
TC
11772020-01-27 Tamar Christina <tamar.christina@arm.com>
1178
1179 PR 25403
1180 * testsuite/gas/aarch64/armv8_4-a.d: Add cfinv.
1181 * testsuite/gas/aarch64/armv8_4-a.s: Likewise.
1182
403d1bd9
JW
11832020-01-22 Maxim Blinov <maxim.blinov@embecosm.com>
1184
1185 * testsuite/gas/riscv/march-ok-s.d: sx is no longer valid and
1186 s exts must be known, so rename *ok* to *fail*.
1187 * testsuite/gas/riscv/march-ok-sx.d: Likewise.
1188 * testsuite/gas/riscv/march-ok-s-with-version: Likewise.
1189 * testsuite/gas/riscv/march-fail-s.l: Expected error messages for
1190 above change.
1191 * testsuite/gas/riscv/march-fail-sx.l: Likewise.
1192 * testsuite/gas/riscv/march-fail-sx-with-version.l: Likewise.
1193
be4c5e58
L
11942020-01-22 H.J. Lu <hongjiu.lu@intel.com>
1195
1196 PR gas/25438
1197 * config/tc-i386.c (check_long_reg): Always disallow double word
1198 suffix in mnemonic with word general register.
1199 * testsuite/gas/i386/general.s: Replace word general register
1200 with double word general register for movl.
1201 * testsuite/gas/i386/inval.s: Add tests for movl with word general
1202 register.
1203 * testsuite/gas/i386/general.l: Updated.
1204 * testsuite/gas/i386/inval.l: Likewise.
1205
9e7028aa
AM
12062020-01-22 Alan Modra <amodra@gmail.com>
1207
1208 * config/tc-ppc.c (parse_tls_arg): Handle tls arg for
1209 __tls_get_addr_desc and __tls_get_addr_opt.
1210
e3ed17f3
JB
12112020-01-21 Jan Beulich <jbeulich@suse.com>
1212
1213 * testsuite/gas/i386/inval-crc32.s,
1214 testsuite/gas/i386/x86-64-inval-crc32.s: Add alignment directive.
1215 * testsuite/gas/i386/inval-crc32.l,
1216 testsuite/gas/i386/x86-64-inval-crc32.l: Adjust expectations.
1217
1a035124
JB
12182020-01-21 Jan Beulich <jbeulich@suse.com>
1219
1220 * config/tc-i386.c (process_suffix): Merge CRC32 handling into
1221 generic code path. Deal with No_lSuf being set in a template.
1222 * testsuite/gas/i386/inval-crc32.l,
1223 testsuite/gas/i386/x86-64-inval-crc32.l: Expect warning(s)
1224 instead of error(s) when operand size is ambiguous.
1225 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
1226 testsuite/gas/i386/noreg64.s: Add CRC32 tests.
1227 * testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg16.l,
1228 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg32.l,
1229 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l:
1230 Adjust expectations.
1231
c006a730
JB
12322020-01-21 Jan Beulich <jbeulich@suse.com>
1233
1234 * config/tc-i386.c (process_suffix): Drop SYSRET special case
1235 and an intel_syntax check. Re-write lack-of-suffix processing
1236 logic.
1237 * doc/c-i386.texi: Document operand size defaults for suffix-
1238 less AT&T syntax insns.
1239 * testsuite/gas/i386/bundle.s, testsuite/gas/i386/lock-1.s,
1240 testsuite/gas/i386/opcode.s, testsuite/gas/i386/sse3.s,
1241 testsuite/gas/i386/x86-64-avx-scalar.s,
1242 testsuite/gas/i386/x86-64-avx.s,
1243 testsuite/gas/i386/x86-64-bundle.s,
1244 testsuite/gas/i386/x86-64-intel64.s,
1245 testsuite/gas/i386/x86-64-lock-1.s,
1246 testsuite/gas/i386/x86-64-opcode.s,
1247 testsuite/gas/i386/x86-64-sse2avx.s,
1248 testsuite/gas/i386/x86-64-sse3.s: Add missing suffixes.
1249 * testsuite/gas/i386/nops.s, testsuite/gas/i386/sse-noavx.s,
1250 testsuite/gas/i386/x86-64-nops.s,
1251 testsuite/gas/i386/x86-64-ptwrite.s,
1252 testsuite/gas/i386/x86-64-simd.s,
1253 testsuite/gas/i386/x86-64-sse-noavx.s,
1254 testsuite/gas/i386/x86-64-suffix.s: Drop bogus suffix-less
1255 insns.
1256 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
1257 testsuite/gas/i386/noreg64.s: Add further tests.
1258 * testsuite/gas/i386/ilp32/x86-64-nops.d,
1259 testsuite/gas/i386/nops.d, testsuite/gas/i386/noreg16.d,
1260 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
1261 testsuite/gas/i386/sse-noavx.d,
1262 testsuite/gas/i386/x86-64-intel64.d,
1263 testsuite/gas/i386/x86-64-nops.d,
1264 testsuite/gas/i386/x86-64-opcode.d,
1265 testsuite/gas/i386/x86-64-ptwrite-intel.d,
1266 testsuite/gas/i386/x86-64-ptwrite.d,
1267 testsuite/gas/i386/x86-64-simd-intel.d,
1268 testsuite/gas/i386/x86-64-simd-suffix.d,
1269 testsuite/gas/i386/x86-64-simd.d,
1270 testsuite/gas/i386/x86-64-sse-noavx.d
1271 testsuite/gas/i386/x86-64-suffix.d,
1272 testsuite/gas/i386/x86-64-suffix-intel.d: Adjust expectations.
1273 * testsuite/gas/i386/noreg16.l, testsuite/gas/i386/noreg32.l,
1274 testsuite/gas/i386/noreg64.l: New.
1275 * testsuite/gas/i386/i386.exp: Run new tests.
1276
c906a69a
JB
12772020-01-21 Jan Beulich <jbeulich@suse.com>
1278
1279 * testsuite/gas/i386/avx512_bf16_vl.s,
1280 testsuite/gas/i386/x86-64-avx512_bf16_vl.s: Add broadcast forms
1281 of VCVTNEPS2BF16{X,Y}. Add operand-size less Intel syntax
1282 broadcast forms of VCVTNEPS2BF16.
1283 * testsuite/gas/i386/avx512_bf16_vl.d,
1284 testsuite/gas/i386/x86-64-avx512_bf16_vl.d: Adjust expectations.
1285
26916852
NC
12862020-01-20 Nick Clifton <nickc@redhat.com>
1287
1288 * po/uk.po: Updated Ukranian translation.
1289
14470f07
L
12902020-01-20 H.J. Lu <hongjiu.lu@intel.com>
1291
1292 PR ld/25416
1293 * config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix
1294 for lea with R_X86_64_GOTPC32_TLSDESC relocation when generating
1295 x32 object.
1296 * testsuite/gas/i386/ilp32/x32-tls.d: Updated.
1297 * testsuite/gas/i386/ilp32/x32-tls.s: Add tests for lea with
1298 R_X86_64_GOTPC32_TLSDESC relocation.
1299
1b1bb2c6
NC
13002020-01-18 Nick Clifton <nickc@redhat.com>
1301
1302 * configure: Regenerate.
1303 * po/gas.pot: Regenerate.
1304
ae774686
NC
13052020-01-18 Nick Clifton <nickc@redhat.com>
1306
1307 Binutils 2.34 branch created.
1308
42e04b36
L
13092020-01-17 H.J. Lu <hongjiu.lu@intel.com>
1310
1311 * config/tc-i386.c (_i386_insn): Replace vex_encoding_vex2
1312 with vex_encoding_vex.
1313 (parse_insn): Likewise.
1314 * doc/c-i386.texi: Replace {vex2} with {vex}. Update {vex}
1315 and {vex3} documentation.
1316 * testsuite/gas/i386/pseudos.s: Replace 3 {vex2} tests with
1317 {vex}.
1318 * testsuite/gas/i386/x86-64-pseudos.s: Likewise.
1319
2da2eaf4
AV
13202020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
1321
1322 PR 25376
1323 * config/tc-arm.c (mve_ext, mve_fp_ext): Use CORE_HIGH.
1324 (armv8_1m_main_ext_table): Use CORE_HIGH for mve.
1325 * testsuite/arm/armv8_1-m-fpu-mve-1.s: New.
1326 * testsuite/arm/armv8_1-m-fpu-mve-1.d: New.
1327 * testsuite/arm/armv8_1-m-fpu-mve-2.s: New.
1328 * testsuite/arm/armv8_1-m-fpu-mve-2.d: New.
1329
45a4bb20
JB
13302020-01-16 Jan Beulich <jbeulich@suse.com>
1331
1332 * config/tc-i386.c (match_template): Drop found_cpu_match local
1333 variable.
1334
4814632e
JB
13352020-01-16 Jan Beulich <jbeulich@suse.com>
1336
1337 * testsuite/gas/i386/avx512dq-inval.l,
1338 testsuite/gas/i386/avx512dq-inval.s: New.
1339 * testsuite/gas/i386/i386.exp: Run new test.
1340
131cb553
JL
13412020-01-15 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1342
1343 * config/tc-msp430.c (CHECK_RELOC_MSP430): Always generate 430X
1344 relocations when the target is 430X, except when extracting part of an
1345 expression.
1346 (msp430_srcoperand): Adjust comment.
1347 Initialize the expp member of the msp430_operand_s struct as
1348 appropriate.
1349 (msp430_dstoperand): Likewise.
1350 * testsuite/gas/msp430/msp430.exp: Run new test.
1351 * testsuite/gas/msp430/reloc-lo-430x.d: New test.
1352 * testsuite/gas/msp430/reloc-lo-430x.s: New test.
1353
c24d0e8d
AM
13542020-01-15 Alan Modra <amodra@gmail.com>
1355
1356 * configure.tgt: Add sparc-*-freebsd case.
1357
e44925ae
LC
13582020-01-14 Lili Cui <lili.cui@intel.com>
1359
1360 * testsuite/gas/i386/align-branch-1a.d: Updated for Darwin.
1361 * testsuite/gas/i386/align-branch-1b.d: Likewise.
1362 * testsuite/gas/i386/align-branch-1c.d: Likewise.
1363 * testsuite/gas/i386/align-branch-1d.d: Likewise.
1364 * testsuite/gas/i386/align-branch-1e.d: Likewise.
1365 * testsuite/gas/i386/align-branch-1f.d: Likewise.
1366 * testsuite/gas/i386/align-branch-1g.d: Likewise.
1367 * testsuite/gas/i386/align-branch-1h.d: Likewise.
1368 * testsuite/gas/i386/align-branch-1i.d: Likewise.
1369 * testsuite/gas/i386/align-branch-5.d: Likewise.
1370 * testsuite/gas/i386/x86-64-align-branch-1a.d: Likewise.
1371 * testsuite/gas/i386/x86-64-align-branch-1b.d: Likewise.
1372 * testsuite/gas/i386/x86-64-align-branch-1c.d: Likewise.
1373 * testsuite/gas/i386/x86-64-align-branch-1d.d: Likewise.
1374 * testsuite/gas/i386/x86-64-align-branch-1e.d: Likewise.
1375 * testsuite/gas/i386/x86-64-align-branch-1f.d: Likewise.
1376 * testsuite/gas/i386/x86-64-align-branch-1g.d: Likewise.
1377 * testsuite/gas/i386/x86-64-align-branch-1h.d: Likewise.
1378 * testsuite/gas/i386/x86-64-align-branch-1i.d: Likewise.
1379 * testsuite/gas/i386/x86-64-align-branch-5.d: Likewise.
1380 * testsuite/gas/i386/i386.exp: Skip x86-64-align-branch-2a,
1381 x86-64-align-branch-2b and x86-64-align-branch-2c on Darwin.
1382
7a6bf3be
SB
13832020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
1384
1385 PR 25377
1386 * config/tc-z80.c: Add support for half precision, single
1387 precision and double precision floating point values.
1388 * config/tc-z80.h b/gas/config/tc-z80.h: Disable string escapes.
1389 * doc/as.texi: Add new z80 command line options.
1390 * doc/c-z80.texi: Document new z80 command line options.
1391 * testsuite/gas/z80/ez80_pref_dis.s: New test.
1392 * testsuite/gas/z80/ez80_pref_dis.d: New test driver.
1393 * testsuite/gas/z80/z80.exp: Run the new test.
1394 * testsuite/gas/z80/fp_math48.d: Use correct command line option.
1395 * testsuite/gas/z80/fp_zeda32.d: Likewise.
1396 * testsuite/gas/z80/strings.d: Update expected output.
1397
82e9597c
MM
13982020-01-13 Matthew Malcomson <matthew.malcomson@arm.com>
1399
1400 * config/tc-aarch64.c (f64mm, f32mm): Add sve as a feature
1401 dependency.
1402
5e4f7e05
CZ
14032020-01-13 Claudiu Zissulescu <claziss@gmail.com>
1404
1405 * config/tc-arc.c (arc_select_cpu): Re-init the bfd if we change
1406 the CPU.
1407 * config/tc-arc.h: Add header if/defs.
1408 * testsuite/gas/arc/pseudos.d: Improve matching pattern.
1409
febda64f
AM
14102020-01-13 Alan Modra <amodra@gmail.com>
1411
1412 * testsuite/gas/wasm32/allinsn.d: Update expected output.
1413
5496abe1
AM
14142020-01-13 Alan Modra <amodra@gmail.com>
1415
1416 * config/tc-tic4x.c (tic4x_operands_match): Correct tic3x trap
1417 insertion.
1418
ec4181f2
AM
14192020-01-10 Alan Modra <amodra@gmail.com>
1420
1421 * testsuite/gas/elf/pr14891.s: Don't start directives in first column.
1422 * testsuite/gas/elf/pr21661.d: Don't run on hpux.
1423
40c75bc8
SB
14242020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1425
1426 PR 25224
1427 * config/tc-z80.c (emit_ld_m_rr): Use integer types when checking
1428 opcode byte values.
1429 (emit_ld_r_r): Likewise.
1430 (emit_ld_rr_m): Likewise.
1431 (emit_ld_rr_nn): Likewise.
1432
72aea328
JB
14332020-01-09 Jan Beulich <jbeulich@suse.com>
1434
1435 * config/tc-i386.c (optimize_encoding): Add
1436 is_any_vex_encoding() invocations. Drop respective
1437 i.tm.extension_opcode == None checks.
1438
3f93af61
JB
14392020-01-09 Jan Beulich <jbeulich@suse.com>
1440
1441 * config/tc-i386.c (md_assemble): Check RegRex is clear during
1442 REX transformations. Correct comment indentation.
1443
7697afb6
JB
14442020-01-09 Jan Beulich <jbeulich@suse.com>
1445
1446 * config/tc-i386.c (optimize_encoding): Generalize register
1447 transformation for TEST optimization.
1448
d835a58b
JB
14492020-01-09 Jan Beulich <jbeulich@suse.com>
1450
1451 * testsuite/gas/i386/x86-64-sysenter-amd.s,
1452 testsuite/gas/i386/x86-64-sysenter-amd.d,
1453 testsuite/gas/i386/x86-64-sysenter-amd.l,
1454 testsuite/gas/i386/x86-64-sysenter-intel.d,
1455 testsuite/gas/i386/x86-64-sysenter-mixed.d: New.
1456 * testsuite/gas/i386/i386.exp: Run new tests.
1457
915808f6
NC
14582020-01-08 Nick Clifton <nickc@redhat.com>
1459
1460 PR 25284
1461 * doc/as.texi (Align): Document the fact that all arguments can be
1462 omitted.
1463 (Balign): Likewise.
1464 (P2align): Likewise.
1465
f1f28025
NC
14662020-01-08 Nick Clifton <nickc@redhat.com>
1467
1468 PR 14891
1469 * config/obj-elf.c (obj_elf_section): Fail if the section name is
1470 already defined as a different symbol type.
1471 * testsuite/gas/elf/pr14891.s: New test source file.
1472 * testsuite/gas/elf/pr14891.d: New test driver.
1473 * testsuite/gas/elf/pr14891.s: New test expected error output.
1474 * testsuite/gas/elf/elf.exp: Run the new test.
1475
030a2e78
AM
14762020-01-08 Alan Modra <amodra@gmail.com>
1477
1478 * config/tc-z8k.c (md_begin): Make idx unsigned.
1479 (get_specific): Likewise for this_index.
1480
2a1ebfb2
CZ
14812020-01-07 Claudiu Zissulescu <claziss@synopsys.com>
1482
1483 * onfig/tc-arc.c (parse_reloc_symbol): New function.
1484 (tokenize_arguments): Clean up, use parse_reloc_symbol function.
1485 (md_operand): Set X_md to absent.
1486 (arc_parse_name): Check for X_md.
1487
16d87673
SB
14882020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1489
1490 PR 25311
1491 * as.h (TC_STRING_ESCAPES): Provide a default definition.
1492 * app.c (do_scrub_chars): Use TC_STRING_ESCAPES instead of
1493 NO_STRING_ESCAPES.
1494 * read.c (next_char_of_string): Likewise.
1495 * config/tc-ppc.h (TC_STRING_ESCAPES): Define.
1496 * config/tc-z80.h (TC_STRING_ESCAPES): Define.
1497
a2322019
NC
14982020-01-03 Nick Clifton <nickc@redhat.com>
1499
1500 * po/sv.po: Updated Swedish translation.
1501
5437a02a
JB
15022020-01-03 Jan Beulich <jbeulich@suse.com>
1503
1504 * testsuite/gas/aarch64/f64mm.s: Scale index of LD1RO{H,W,D}.
1505 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1506
567dfba2
JB
15072020-01-03 Jan Beulich <jbeulich@suse.com>
1508
1509 * testsuite/gas/aarch64/i8mm.s: Add 128-bit form tests for
1510 by-element usdot. Add 64-bit form tests for by-element sudot.
1511 * testsuite/gas/aarch64/i8mm.d: Adjust expectations.
1512
8c45011a
JB
15132020-01-03 Jan Beulich <jbeulich@suse.com>
1514
1515 * testsuite/gas/aarch64/f64mm.s: Drop 'i' from uzip<n>.
1516 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1517
f4950f76
JB
15182020-01-03 Jan Beulich <jbeulich@suse.com>
1519
1520 * testsuite/gas/aarch64/f64mm.d,
1521 testsuite/gas/aarch64/sve-movprfx-mm.d: Adjust expectations.
1522
6655dba2
SB
15232020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
1524
1525 * config/tc-z80.c: Add new architectures: Z180 and eZ80. Add
1526 support for assembler code generated by SDCC. Add new relocation
1527 types. Add z80-elf target support.
1528 * config/tc-z80.h: Add z80-elf target support. Enable dollar local
1529 labels. Local labels starts from ".L".
1530 * NEWS: Mention the new support.
1531 * testsuite/gas/all/fwdexp.d: Fix failure due to symbol conflict.
1532 * testsuite/gas/all/fwdexp.s: Likewise.
1533 * testsuite/gas/all/cond.l: Likewise.
1534 * testsuite/gas/all/cond.s: Likewise.
1535 * testsuite/gas/all/fwdexp.d: Likewise.
1536 * testsuite/gas/all/fwdexp.s: Likewise.
1537 * testsuite/gas/elf/section2.e-mips: Likewise.
1538 * testsuite/gas/elf/section2.l: Likewise.
1539 * testsuite/gas/elf/section2.s: Likewise.
1540 * testsuite/gas/macros/app1.d: Likewise.
1541 * testsuite/gas/macros/app1.s: Likewise.
1542 * testsuite/gas/macros/app2.d: Likewise.
1543 * testsuite/gas/macros/app2.s: Likewise.
1544 * testsuite/gas/macros/app3.d: Likewise.
1545 * testsuite/gas/macros/app3.s: Likewise.
1546 * testsuite/gas/macros/app4.d: Likewise.
1547 * testsuite/gas/macros/app4.s: Likewise.
1548 * testsuite/gas/macros/app4b.s: Likewise.
1549 * testsuite/gas/z80/suffix.d: Fix failure on ELF target.
1550 * testsuite/gas/z80/z80.exp: Add new tests
1551 * testsuite/gas/z80/dollar.d: New file.
1552 * testsuite/gas/z80/dollar.s: New file.
1553 * testsuite/gas/z80/ez80_adl_all.d: New file.
1554 * testsuite/gas/z80/ez80_adl_all.s: New file.
1555 * testsuite/gas/z80/ez80_adl_suf.d: New file.
1556 * testsuite/gas/z80/ez80_isuf.s: New file.
1557 * testsuite/gas/z80/ez80_z80_all.d: New file.
1558 * testsuite/gas/z80/ez80_z80_all.s: New file.
1559 * testsuite/gas/z80/ez80_z80_suf.d: New file.
1560 * testsuite/gas/z80/r800_extra.d: New file.
1561 * testsuite/gas/z80/r800_extra.s: New file.
1562 * testsuite/gas/z80/r800_ii8.d: New file.
1563 * testsuite/gas/z80/r800_z80_doc.d: New file.
1564 * testsuite/gas/z80/z180.d: New file.
1565 * testsuite/gas/z80/z180.s: New file.
1566 * testsuite/gas/z80/z180_z80_doc.d: New file.
1567 * testsuite/gas/z80/z80_doc.d: New file.
1568 * testsuite/gas/z80/z80_doc.s: New file.
1569 * testsuite/gas/z80/z80_ii8.d: New file.
1570 * testsuite/gas/z80/z80_ii8.s: New file.
1571 * testsuite/gas/z80/z80_in_f_c.d: New file.
1572 * testsuite/gas/z80/z80_in_f_c.s: New file.
1573 * testsuite/gas/z80/z80_op_ii_ld.d: New file.
1574 * testsuite/gas/z80/z80_op_ii_ld.s: New file.
1575 * testsuite/gas/z80/z80_out_c_0.d: New file.
1576 * testsuite/gas/z80/z80_out_c_0.s: New file.
1577 * testsuite/gas/z80/z80_reloc.d: New file.
1578 * testsuite/gas/z80/z80_reloc.s: New file.
1579 * testsuite/gas/z80/z80_sli.d: New file.
1580 * testsuite/gas/z80/z80_sli.s: New file.
1581
a65b5de6
SN
15822020-01-02 Szabolcs Nagy <szabolcs.nagy@arm.com>
1583
1584 * config/tc-arm.c (parse_reg_list): Use REG_TYPE_RN instead of
1585 REGLIST_RN.
1586
b14ce8bf
AM
15872020-01-01 Alan Modra <amodra@gmail.com>
1588
1589 Update year range in copyright notice of all files.
1590
0b114740 1591For older changes see ChangeLog-2019
3499769a 1592\f
0b114740 1593Copyright (C) 2020 Free Software Foundation, Inc.
3499769a
AM
1594
1595Copying and distribution of this file, with or without modification,
1596are permitted in any medium without royalty provided the copyright
1597notice and this notice are preserved.
1598
1599Local Variables:
1600mode: change-log
1601left-margin: 8
1602fill-column: 74
1603version-control: never
1604End: