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5894ca00 | 1 | /* |
e8a92932 MY |
2 | * Copyright (C) 2012-2015 Panasonic Corporation |
3 | * Copyright (C) 2015-2016 Socionext Inc. | |
4 | * Author: Masahiro Yamada <yamada.masahiro@socionext.com> | |
5894ca00 MY |
5 | * |
6 | * SPDX-License-Identifier: GPL-2.0+ | |
7 | */ | |
8 | ||
a187559e | 9 | /* U-Boot - Common settings for UniPhier Family */ |
5894ca00 MY |
10 | |
11 | #ifndef __CONFIG_UNIPHIER_COMMON_H__ | |
12 | #define __CONFIG_UNIPHIER_COMMON_H__ | |
13 | ||
928f3248 | 14 | #define CONFIG_ARMV7_PSCI_1_0 |
e8a92932 | 15 | |
233e42a9 MY |
16 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 |
17 | ||
5894ca00 MY |
18 | /*----------------------------------------------------------------------- |
19 | * MMU and Cache Setting | |
20 | *----------------------------------------------------------------------*/ | |
21 | ||
22 | /* Comment out the following to enable L1 cache */ | |
23 | /* #define CONFIG_SYS_ICACHE_OFF */ | |
24 | /* #define CONFIG_SYS_DCACHE_OFF */ | |
25 | ||
5894ca00 MY |
26 | #define CONFIG_BOARD_LATE_INIT |
27 | ||
28 | #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) | |
29 | ||
30 | #define CONFIG_TIMESTAMP | |
31 | ||
32 | /* FLASH related */ | |
33 | #define CONFIG_MTD_DEVICE | |
34 | ||
f1d9a9ed MY |
35 | #define CONFIG_SMC911X_32_BIT |
36 | /* dummy: referenced by examples/standalone/smc911x_eeprom.c */ | |
37 | #define CONFIG_SMC911X_BASE 0 | |
38 | ||
39 | #ifdef CONFIG_MICRO_SUPPORT_CARD | |
40 | #define CONFIG_SMC911X | |
41 | #else | |
f4c93a4f MY |
42 | #define CONFIG_SYS_NO_FLASH |
43 | #endif | |
5894ca00 MY |
44 | |
45 | #define CONFIG_FLASH_CFI_DRIVER | |
46 | #define CONFIG_SYS_FLASH_CFI | |
47 | ||
48 | #define CONFIG_SYS_MAX_FLASH_SECT 256 | |
49 | #define CONFIG_SYS_MONITOR_BASE 0 | |
d085ecd6 | 50 | #define CONFIG_SYS_MONITOR_LEN 0x00080000 /* 512KB */ |
5894ca00 MY |
51 | #define CONFIG_SYS_FLASH_BASE 0 |
52 | ||
53 | /* | |
66deb91e | 54 | * flash_toggle does not work for our support card. |
5894ca00 MY |
55 | * We need to use flash_status_poll. |
56 | */ | |
57 | #define CONFIG_SYS_CFI_FLASH_STATUS_POLL | |
58 | ||
59 | #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ | |
60 | ||
9879842c | 61 | #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 |
5894ca00 MY |
62 | |
63 | /* serial console configuration */ | |
64 | #define CONFIG_BAUDRATE 115200 | |
65 | ||
5894ca00 MY |
66 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
67 | ||
68 | #define CONFIG_CMDLINE_EDITING /* add command line history */ | |
5894ca00 MY |
69 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
70 | /* Print Buffer Size */ | |
71 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) | |
72 | #define CONFIG_SYS_MAXARGS 16 /* max number of command */ | |
73 | /* Boot Argument Buffer Size */ | |
74 | #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) | |
75 | ||
76 | #define CONFIG_CONS_INDEX 1 | |
77 | ||
aa8a9348 | 78 | /* #define CONFIG_ENV_IS_NOWHERE */ |
5894ca00 | 79 | /* #define CONFIG_ENV_IS_IN_NAND */ |
aa8a9348 MY |
80 | #define CONFIG_ENV_IS_IN_MMC |
81 | #define CONFIG_ENV_OFFSET 0x80000 | |
5894ca00 | 82 | #define CONFIG_ENV_SIZE 0x2000 |
5894ca00 MY |
83 | /* #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */ |
84 | ||
aa8a9348 MY |
85 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
86 | #define CONFIG_SYS_MMC_ENV_PART 1 | |
87 | ||
9d0c2ceb | 88 | #ifdef CONFIG_ARM64 |
50862a51 | 89 | #define CPU_RELEASE_ADDR 0x80000000 |
9d0c2ceb MY |
90 | #define COUNTER_FREQUENCY 50000000 |
91 | #define CONFIG_GICV3 | |
92 | #define GICD_BASE 0x5fe00000 | |
667dbcd0 MY |
93 | #if defined(CONFIG_ARCH_UNIPHIER_LD11) |
94 | #define GICR_BASE 0x5fe40000 | |
95 | #elif defined(CONFIG_ARCH_UNIPHIER_LD20) | |
9d0c2ceb | 96 | #define GICR_BASE 0x5fe80000 |
667dbcd0 | 97 | #endif |
9d0c2ceb | 98 | #else |
5894ca00 MY |
99 | /* Time clock 1MHz */ |
100 | #define CONFIG_SYS_TIMER_RATE 1000000 | |
9d0c2ceb MY |
101 | #endif |
102 | ||
5894ca00 | 103 | |
5894ca00 MY |
104 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
105 | #define CONFIG_SYS_NAND_MAX_CHIPS 2 | |
106 | #define CONFIG_SYS_NAND_ONFI_DETECTION | |
107 | ||
108 | #define CONFIG_NAND_DENALI_ECC_SIZE 1024 | |
109 | ||
ea65c980 | 110 | #ifdef CONFIG_ARCH_UNIPHIER_SLD3 |
3365b4eb MY |
111 | #define CONFIG_SYS_NAND_REGS_BASE 0xf8100000 |
112 | #define CONFIG_SYS_NAND_DATA_BASE 0xf8000000 | |
113 | #else | |
5894ca00 MY |
114 | #define CONFIG_SYS_NAND_REGS_BASE 0x68100000 |
115 | #define CONFIG_SYS_NAND_DATA_BASE 0x68000000 | |
3365b4eb | 116 | #endif |
5894ca00 MY |
117 | |
118 | #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_DATA_BASE + 0x10) | |
119 | ||
120 | #define CONFIG_SYS_NAND_USE_FLASH_BBT | |
121 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 | |
122 | ||
495deb44 | 123 | /* USB */ |
53c45d4e | 124 | #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 4 |
495deb44 MY |
125 | #define CONFIG_FAT_WRITE |
126 | #define CONFIG_DOS_PARTITION | |
127 | ||
4aceb3f8 | 128 | /* SD/MMC */ |
a55d9fee | 129 | #define CONFIG_SUPPORT_EMMC_BOOT |
4aceb3f8 MY |
130 | #define CONFIG_GENERIC_MMC |
131 | ||
5894ca00 MY |
132 | /* memtest works on */ |
133 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE | |
134 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01000000) | |
135 | ||
5894ca00 MY |
136 | /* |
137 | * Network Configuration | |
138 | */ | |
5894ca00 MY |
139 | #define CONFIG_SERVERIP 192.168.11.1 |
140 | #define CONFIG_IPADDR 192.168.11.10 | |
141 | #define CONFIG_GATEWAYIP 192.168.11.1 | |
142 | #define CONFIG_NETMASK 255.255.255.0 | |
143 | ||
144 | #define CONFIG_LOADADDR 0x84000000 | |
145 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR | |
5894ca00 MY |
146 | |
147 | #define CONFIG_CMDLINE_EDITING /* add command line history */ | |
148 | ||
149 | #define CONFIG_BOOTCOMMAND "run $bootmode" | |
150 | ||
151 | #define CONFIG_ROOTPATH "/nfs/root/path" | |
152 | #define CONFIG_NFSBOOTCOMMAND \ | |
153 | "setenv bootargs $bootargs root=/dev/nfs rw " \ | |
154 | "nfsroot=$serverip:$rootpath " \ | |
155 | "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \ | |
d566f754 | 156 | "run __nfsboot" |
5894ca00 | 157 | |
421376ae MY |
158 | #ifdef CONFIG_FIT |
159 | #define CONFIG_BOOTFILE "fitImage" | |
160 | #define LINUXBOOT_ENV_SETTINGS \ | |
161 | "fit_addr=0x00100000\0" \ | |
162 | "fit_addr_r=0x84100000\0" \ | |
163 | "fit_size=0x00f00000\0" \ | |
5451b777 | 164 | "norboot=setexpr fit_addr $nor_base + $fit_addr &&" \ |
421376ae | 165 | "bootm $fit_addr\0" \ |
5451b777 | 166 | "nandboot=nand read $fit_addr_r $fit_addr $fit_size &&" \ |
e037db0c | 167 | "bootm $fit_addr_r\0" \ |
5451b777 | 168 | "tftpboot=tftpboot $fit_addr_r $bootfile &&" \ |
d566f754 MY |
169 | "bootm $fit_addr_r\0" \ |
170 | "__nfsboot=run tftpboot\0" | |
421376ae | 171 | #else |
9d0c2ceb | 172 | #ifdef CONFIG_ARM64 |
9d0c2ceb MY |
173 | #define CONFIG_BOOTFILE "Image" |
174 | #define LINUXBOOT_CMD "booti" | |
175 | #define KERNEL_ADDR_R "kernel_addr_r=0x80080000\0" | |
176 | #define KERNEL_SIZE "kernel_size=0x00c00000\0" | |
177 | #define RAMDISK_ADDR "ramdisk_addr=0x00e00000\0" | |
178 | #else | |
89835b35 | 179 | #define CONFIG_BOOTFILE "zImage" |
9d0c2ceb MY |
180 | #define LINUXBOOT_CMD "bootz" |
181 | #define KERNEL_ADDR_R "kernel_addr_r=0x80208000\0" | |
182 | #define KERNEL_SIZE "kernel_size=0x00800000\0" | |
183 | #define RAMDISK_ADDR "ramdisk_addr=0x00a00000\0" | |
184 | #endif | |
421376ae MY |
185 | #define LINUXBOOT_ENV_SETTINGS \ |
186 | "fdt_addr=0x00100000\0" \ | |
187 | "fdt_addr_r=0x84100000\0" \ | |
188 | "fdt_size=0x00008000\0" \ | |
189 | "kernel_addr=0x00200000\0" \ | |
9d0c2ceb MY |
190 | KERNEL_ADDR_R \ |
191 | KERNEL_SIZE \ | |
192 | RAMDISK_ADDR \ | |
421376ae MY |
193 | "ramdisk_addr_r=0x84a00000\0" \ |
194 | "ramdisk_size=0x00600000\0" \ | |
e037db0c | 195 | "ramdisk_file=rootfs.cpio.uboot\0" \ |
cd5d9565 | 196 | "boot_common=setexpr bootm_low $kernel_addr_r '&' fe000000 &&" \ |
9d0c2ceb | 197 | LINUXBOOT_CMD " $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \ |
cd5d9565 | 198 | "norboot=setexpr kernel_addr $nor_base + $kernel_addr &&" \ |
b75e072c MY |
199 | "setexpr kernel_size $kernel_size / 4 &&" \ |
200 | "cp $kernel_addr $kernel_addr_r $kernel_size &&" \ | |
cd5d9565 MY |
201 | "setexpr ramdisk_addr_r $nor_base + $ramdisk_addr &&" \ |
202 | "setexpr fdt_addr_r $nor_base + $fdt_addr &&" \ | |
203 | "run boot_common\0" \ | |
204 | "nandboot=nand read $kernel_addr_r $kernel_addr $kernel_size &&" \ | |
421376ae MY |
205 | "nand read $ramdisk_addr_r $ramdisk_addr $ramdisk_size &&" \ |
206 | "nand read $fdt_addr_r $fdt_addr $fdt_size &&" \ | |
cd5d9565 MY |
207 | "run boot_common\0" \ |
208 | "tftpboot=tftpboot $kernel_addr_r $bootfile &&" \ | |
e037db0c MY |
209 | "tftpboot $ramdisk_addr_r $ramdisk_file &&" \ |
210 | "tftpboot $fdt_addr_r $fdt_file &&" \ | |
d566f754 MY |
211 | "run boot_common\0" \ |
212 | "__nfsboot=tftpboot $kernel_addr_r $bootfile &&" \ | |
d566f754 MY |
213 | "tftpboot $fdt_addr_r $fdt_file &&" \ |
214 | "setenv ramdisk_addr_r - &&" \ | |
cd5d9565 | 215 | "run boot_common\0" |
421376ae MY |
216 | #endif |
217 | ||
218 | #define CONFIG_EXTRA_ENV_SETTINGS \ | |
219 | "netdev=eth0\0" \ | |
220 | "verify=n\0" \ | |
90a6e929 | 221 | "nor_base=0x42000000\0" \ |
61a4f5bd MY |
222 | "sramupdate=setexpr tmp_addr $nor_base + 0x50000 &&" \ |
223 | "tftpboot $tmp_addr u-boot-spl.bin &&" \ | |
224 | "setexpr tmp_addr $nor_base + 0x60000 &&" \ | |
225 | "tftpboot $tmp_addr u-boot.bin\0" \ | |
c231c436 MY |
226 | "emmcupdate=mmcsetn &&" \ |
227 | "mmc partconf $mmc_first_dev 0 1 1 &&" \ | |
c231c436 MY |
228 | "tftpboot u-boot-spl.bin &&" \ |
229 | "mmc write $loadaddr 0 80 &&" \ | |
d085ecd6 | 230 | "tftpboot u-boot.bin &&" \ |
c231c436 | 231 | "mmc write $loadaddr 80 780\0" \ |
421376ae | 232 | "nandupdate=nand erase 0 0x00100000 &&" \ |
3cb9abc9 | 233 | "tftpboot u-boot-spl.bin &&" \ |
421376ae | 234 | "nand write $loadaddr 0 0x00010000 &&" \ |
d085ecd6 | 235 | "tftpboot u-boot.bin &&" \ |
421376ae | 236 | "nand write $loadaddr 0x00010000 0x000f0000\0" \ |
421376ae | 237 | LINUXBOOT_ENV_SETTINGS |
5894ca00 | 238 | |
17bd4a21 MY |
239 | #define CONFIG_SYS_BOOTMAPSZ 0x20000000 |
240 | ||
cf88affa | 241 | #define CONFIG_SYS_SDRAM_BASE 0x80000000 |
5894ca00 | 242 | #define CONFIG_NR_DRAM_BANKS 2 |
23869698 MY |
243 | /* for LD20; the last 64 byte is used for dynamic DDR PHY training */ |
244 | #define CONFIG_SYS_MEM_TOP_HIDE 64 | |
5894ca00 | 245 | |
9d0c2ceb MY |
246 | #if defined(CONFIG_ARM64) |
247 | #define CONFIG_SPL_TEXT_BASE 0x30000000 | |
248 | #elif defined(CONFIG_ARCH_UNIPHIER_SLD3) || \ | |
249 | defined(CONFIG_ARCH_UNIPHIER_LD4) || \ | |
ea65c980 | 250 | defined(CONFIG_ARCH_UNIPHIER_SLD8) |
f5d0b9b2 | 251 | #define CONFIG_SPL_TEXT_BASE 0x00040000 |
323d1f9d | 252 | #else |
f5d0b9b2 MY |
253 | #define CONFIG_SPL_TEXT_BASE 0x00100000 |
254 | #endif | |
255 | ||
667dbcd0 MY |
256 | #if defined(CONFIG_ARCH_UNIPHIER_LD11) |
257 | #define CONFIG_SPL_STACK (0x30014c00) | |
258 | #elif defined(CONFIG_ARCH_UNIPHIER_LD20) | |
9d0c2ceb MY |
259 | #define CONFIG_SPL_STACK (0x3001c000) |
260 | #else | |
755c7d9a | 261 | #define CONFIG_SPL_STACK (0x00100000) |
9d0c2ceb | 262 | #endif |
8cddc279 | 263 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE) |
5894ca00 | 264 | |
a286039b MY |
265 | #define CONFIG_PANIC_HANG |
266 | ||
5894ca00 | 267 | #define CONFIG_SPL_FRAMEWORK |
adb3928f MY |
268 | #ifdef CONFIG_ARM64 |
269 | #define CONFIG_SPL_BOARD_LOAD_IMAGE | |
9d0c2ceb | 270 | #endif |
5894ca00 | 271 | |
5894ca00 MY |
272 | #define CONFIG_SPL_BOARD_INIT |
273 | ||
274 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x10000 | |
cbbc2d80 | 275 | |
d085ecd6 MY |
276 | /* subtract sizeof(struct image_header) */ |
277 | #define CONFIG_SYS_UBOOT_BASE (0x60000 - 0x40) | |
5894ca00 | 278 | |
d085ecd6 | 279 | #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" |
6a3cffe8 | 280 | #define CONFIG_SPL_MAX_FOOTPRINT 0x10000 |
86c3345a | 281 | #define CONFIG_SPL_MAX_SIZE 0x10000 |
667dbcd0 MY |
282 | #if defined(CONFIG_ARCH_UNIPHIER_LD11) |
283 | #define CONFIG_SPL_BSS_START_ADDR 0x30012000 | |
284 | #elif defined(CONFIG_ARCH_UNIPHIER_LD20) | |
9d0c2ceb | 285 | #define CONFIG_SPL_BSS_START_ADDR 0x30016000 |
667dbcd0 | 286 | #endif |
9d0c2ceb | 287 | #define CONFIG_SPL_BSS_MAX_SIZE 0x2000 |
6a3cffe8 | 288 | |
5894ca00 | 289 | #endif /* __CONFIG_UNIPHIER_COMMON_H__ */ |