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3863585b WD |
1 | /* |
2 | * (C) Copyright 2000, 2001 | |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | * | |
1a459660 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
3863585b WD |
6 | */ |
7 | ||
d4f5c728 | 8 | /* |
9 | * Support for read and write access to EEPROM like memory devices. This | |
10 | * includes regular EEPROM as well as FRAM (ferroelectic nonvolaile RAM). | |
11 | * FRAM devices read and write data at bus speed. In particular, there is no | |
e506a006 | 12 | * write delay. Also, there is no limit imposed on the number of bytes that can |
d4f5c728 | 13 | * be transferred with a single read or write. |
6617aae9 | 14 | * |
d4f5c728 | 15 | * Use the following configuration options to ensure no unneeded performance |
16 | * degradation (typical for EEPROM) is incured for FRAM memory: | |
6617aae9 | 17 | * |
6d0f6bcf JCPV |
18 | * #define CONFIG_SYS_I2C_FRAM |
19 | * #undef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS | |
d4f5c728 | 20 | * |
21 | */ | |
22 | ||
3863585b WD |
23 | #include <common.h> |
24 | #include <config.h> | |
25 | #include <command.h> | |
26 | #include <i2c.h> | |
27 | ||
4f296d09 MV |
28 | #ifndef CONFIG_SYS_I2C_SPEED |
29 | #define CONFIG_SYS_I2C_SPEED 50000 | |
98f4a3df | 30 | #endif |
3863585b | 31 | |
d738746c MV |
32 | #ifndef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS |
33 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 0 | |
34 | #endif | |
35 | ||
6717e3c8 MV |
36 | #ifndef CONFIG_SYS_EEPROM_PAGE_WRITE_BITS |
37 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 8 | |
38 | #endif | |
39 | ||
40 | #define EEPROM_PAGE_SIZE (1 << CONFIG_SYS_EEPROM_PAGE_WRITE_BITS) | |
41 | #define EEPROM_PAGE_OFFSET(x) ((x) & (EEPROM_PAGE_SIZE - 1)) | |
42 | ||
4f296d09 | 43 | /* |
6d0f6bcf | 44 | * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 2 (16-bit EEPROM address) offset is |
3863585b WD |
45 | * 0x000nxxxx for EEPROM address selectors at n, offset xxxx in EEPROM. |
46 | * | |
6d0f6bcf | 47 | * for CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 (8-bit EEPROM page address) offset is |
3863585b WD |
48 | * 0x00000nxx for EEPROM address selectors and page number at n. |
49 | */ | |
548738b4 | 50 | #if !defined(CONFIG_SPI) || defined(CONFIG_ENV_EEPROM_IS_ON_I2C) |
4f296d09 MV |
51 | #if !defined(CONFIG_SYS_I2C_EEPROM_ADDR_LEN) || \ |
52 | (CONFIG_SYS_I2C_EEPROM_ADDR_LEN < 1) || \ | |
53 | (CONFIG_SYS_I2C_EEPROM_ADDR_LEN > 2) | |
6d0f6bcf | 54 | #error CONFIG_SYS_I2C_EEPROM_ADDR_LEN must be 1 or 2 |
3863585b WD |
55 | #endif |
56 | #endif | |
57 | ||
52cd47c9 MV |
58 | __weak int eeprom_write_enable(unsigned dev_addr, int state) |
59 | { | |
60 | return 0; | |
61 | } | |
4f296d09 MV |
62 | |
63 | void eeprom_init(void) | |
64 | { | |
65 | /* SPI EEPROM */ | |
66 | #if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C) | |
8eee40a6 | 67 | spi_init_f(); |
4f296d09 MV |
68 | #endif |
69 | ||
70 | /* I2C EEPROM */ | |
71 | #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT) | |
72 | i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); | |
73 | #endif | |
74 | } | |
75 | ||
02c321cf MV |
76 | static int eeprom_addr(unsigned dev_addr, unsigned offset, uchar *addr) |
77 | { | |
78 | unsigned blk_off; | |
79 | int alen; | |
80 | ||
81 | blk_off = offset & 0xff; /* block offset */ | |
82 | #if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 | |
83 | addr[0] = offset >> 8; /* block number */ | |
84 | addr[1] = blk_off; /* block offset */ | |
85 | alen = 2; | |
86 | #else | |
87 | addr[0] = offset >> 16; /* block number */ | |
88 | addr[1] = offset >> 8; /* upper address octet */ | |
89 | addr[2] = blk_off; /* lower address octet */ | |
90 | alen = 3; | |
91 | #endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN */ | |
92 | ||
93 | addr[0] |= dev_addr; /* insert device address */ | |
94 | ||
95 | return alen; | |
96 | } | |
97 | ||
9132088b MV |
98 | static int eeprom_rw_block(unsigned offset, uchar *addr, unsigned alen, |
99 | uchar *buffer, unsigned len, bool read) | |
100 | { | |
101 | int ret = 0; | |
102 | ||
103 | /* SPI */ | |
104 | #if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C) | |
105 | if (read) | |
106 | spi_read(addr, alen, buffer, len); | |
107 | else | |
108 | spi_write(addr, alen, buffer, len); | |
109 | #else /* I2C */ | |
110 | ||
111 | #if defined(CONFIG_SYS_I2C_EEPROM_BUS) | |
112 | i2c_set_bus_num(CONFIG_SYS_I2C_EEPROM_BUS); | |
113 | #endif | |
114 | ||
115 | if (read) | |
116 | ret = i2c_read(addr[0], offset, alen - 1, buffer, len); | |
117 | else | |
118 | ret = i2c_write(addr[0], offset, alen - 1, buffer, len); | |
119 | ||
120 | if (ret) | |
121 | ret = 1; | |
122 | #endif | |
123 | return ret; | |
124 | } | |
125 | ||
3863585b WD |
126 | int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt) |
127 | { | |
128 | unsigned end = offset + cnt; | |
129 | unsigned blk_off; | |
130 | int rcode = 0; | |
02c321cf | 131 | uchar addr[3]; |
3863585b | 132 | |
4f296d09 MV |
133 | /* |
134 | * Read data until done or would cross a page boundary. | |
3863585b WD |
135 | * We must write the address again when changing pages |
136 | * because the next page may be in a different device. | |
137 | */ | |
138 | while (offset < end) { | |
d4f5c728 | 139 | unsigned alen, len; |
6d0f6bcf | 140 | #if !defined(CONFIG_SYS_I2C_FRAM) |
d4f5c728 | 141 | unsigned maxlen; |
142 | #endif | |
143 | ||
3863585b | 144 | blk_off = offset & 0xFF; /* block offset */ |
02c321cf | 145 | alen = eeprom_addr(dev_addr, offset, addr); |
3863585b | 146 | |
d4f5c728 | 147 | len = end - offset; |
148 | ||
149 | /* | |
150 | * For a FRAM device there is no limit on the number of the | |
151 | * bytes that can be ccessed with the single read or write | |
152 | * operation. | |
153 | */ | |
6d0f6bcf | 154 | #if !defined(CONFIG_SYS_I2C_FRAM) |
3863585b WD |
155 | maxlen = 0x100 - blk_off; |
156 | if (maxlen > I2C_RXTX_LEN) | |
157 | maxlen = I2C_RXTX_LEN; | |
3863585b WD |
158 | if (len > maxlen) |
159 | len = maxlen; | |
d4f5c728 | 160 | #endif |
161 | ||
9132088b MV |
162 | rcode = eeprom_rw_block(offset, addr, alen, buffer, len, 1); |
163 | ||
3863585b WD |
164 | buffer += len; |
165 | offset += len; | |
166 | } | |
d4f5c728 | 167 | |
3863585b WD |
168 | return rcode; |
169 | } | |
170 | ||
3863585b WD |
171 | int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt) |
172 | { | |
173 | unsigned end = offset + cnt; | |
174 | unsigned blk_off; | |
175 | int rcode = 0; | |
02c321cf | 176 | uchar addr[3]; |
3863585b | 177 | |
52cd47c9 MV |
178 | eeprom_write_enable(dev_addr, 1); |
179 | ||
4f296d09 MV |
180 | /* |
181 | * Write data until done or would cross a write page boundary. | |
3863585b WD |
182 | * We must write the address again when changing pages |
183 | * because the address counter only increments within a page. | |
184 | */ | |
185 | ||
186 | while (offset < end) { | |
d4f5c728 | 187 | unsigned alen, len; |
6d0f6bcf | 188 | #if !defined(CONFIG_SYS_I2C_FRAM) |
d4f5c728 | 189 | unsigned maxlen; |
190 | #endif | |
191 | ||
3863585b | 192 | blk_off = offset & 0xFF; /* block offset */ |
02c321cf | 193 | alen = eeprom_addr(dev_addr, offset, addr); |
3863585b | 194 | |
d4f5c728 | 195 | len = end - offset; |
196 | ||
197 | /* | |
198 | * For a FRAM device there is no limit on the number of the | |
f9a78b8d | 199 | * bytes that can be accessed with the single read or write |
d4f5c728 | 200 | * operation. |
201 | */ | |
6d0f6bcf | 202 | #if !defined(CONFIG_SYS_I2C_FRAM) |
d4f5c728 | 203 | |
3863585b | 204 | maxlen = EEPROM_PAGE_SIZE - EEPROM_PAGE_OFFSET(blk_off); |
6717e3c8 | 205 | |
3863585b WD |
206 | if (maxlen > I2C_RXTX_LEN) |
207 | maxlen = I2C_RXTX_LEN; | |
208 | ||
3863585b WD |
209 | if (len > maxlen) |
210 | len = maxlen; | |
d4f5c728 | 211 | #endif |
212 | ||
9132088b | 213 | rcode = eeprom_rw_block(offset, addr, alen, buffer, len, 0); |
3863585b | 214 | |
3863585b WD |
215 | buffer += len; |
216 | offset += len; | |
217 | ||
6d0f6bcf | 218 | udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000); |
3863585b | 219 | } |
52cd47c9 MV |
220 | |
221 | eeprom_write_enable(dev_addr, 0); | |
222 | ||
3863585b WD |
223 | return rcode; |
224 | } | |
225 | ||
4f296d09 | 226 | static int do_eeprom(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
3863585b | 227 | { |
4f296d09 MV |
228 | const char *const fmt = |
229 | "\nEEPROM @0x%lX %s: addr %08lx off %04lx count %ld ... "; | |
e4f65d00 MV |
230 | char * const *args = &argv[2]; |
231 | int rcode; | |
232 | ulong dev_addr, addr, off, cnt; | |
233 | ||
234 | switch (argc) { | |
235 | #ifdef CONFIG_SYS_DEF_EEPROM_ADDR | |
236 | case 5: | |
237 | dev_addr = CONFIG_SYS_DEF_EEPROM_ADDR; | |
238 | break; | |
239 | #endif | |
240 | case 6: | |
241 | dev_addr = simple_strtoul(*args++, NULL, 16); | |
242 | break; | |
243 | default: | |
244 | return CMD_RET_USAGE; | |
245 | } | |
548738b4 | 246 | |
e4f65d00 MV |
247 | addr = simple_strtoul(*args++, NULL, 16); |
248 | off = simple_strtoul(*args++, NULL, 16); | |
249 | cnt = simple_strtoul(*args++, NULL, 16); | |
548738b4 | 250 | |
8eee40a6 | 251 | eeprom_init(); |
90253178 | 252 | |
e4f65d00 MV |
253 | if (strcmp (argv[1], "read") == 0) { |
254 | printf(fmt, dev_addr, argv[1], addr, off, cnt); | |
4f296d09 | 255 | |
e4f65d00 | 256 | rcode = eeprom_read(dev_addr, off, (uchar *) addr, cnt); |
4f296d09 | 257 | |
e4f65d00 MV |
258 | puts ("done\n"); |
259 | return rcode; | |
260 | } else if (strcmp (argv[1], "write") == 0) { | |
261 | printf(fmt, dev_addr, argv[1], addr, off, cnt); | |
4f296d09 | 262 | |
e4f65d00 | 263 | rcode = eeprom_write(dev_addr, off, (uchar *) addr, cnt); |
4f296d09 | 264 | |
e4f65d00 MV |
265 | puts ("done\n"); |
266 | return rcode; | |
4f296d09 MV |
267 | } |
268 | ||
269 | return CMD_RET_USAGE; | |
270 | } | |
8bde7f77 | 271 | |
0d498393 WD |
272 | U_BOOT_CMD( |
273 | eeprom, 6, 1, do_eeprom, | |
2fb2604d | 274 | "EEPROM sub-system", |
8bde7f77 WD |
275 | "read devaddr addr off cnt\n" |
276 | "eeprom write devaddr addr off cnt\n" | |
a89c33db | 277 | " - read/write `cnt' bytes from `devaddr` EEPROM at offset `off'" |
0e350f81 | 278 | ) |