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arm: Correct CONFIG_STANDALONE_LOAD_ADDR for AM33XX/OMAP* platforms
[people/ms/u-boot.git] / drivers / mmc / mmc.c
CommitLineData
272cc70b
AF
1/*
2 * Copyright 2008, Freescale Semiconductor, Inc
3 * Andy Fleming
4 *
5 * Based vaguely on the Linux code
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include <config.h>
27#include <common.h>
28#include <command.h>
29#include <mmc.h>
30#include <part.h>
31#include <malloc.h>
32#include <linux/list.h>
9b1f942c 33#include <div64.h>
272cc70b 34
ce0fbcd2
MW
35/* Set block count limit because of 16 bit register limit on some hardware*/
36#ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT
37#define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535
38#endif
39
272cc70b
AF
40static struct list_head mmc_devices;
41static int cur_dev_num = -1;
42
d23d8d7e
NK
43int __weak board_mmc_getwp(struct mmc *mmc)
44{
45 return -1;
46}
47
48int mmc_getwp(struct mmc *mmc)
49{
50 int wp;
51
52 wp = board_mmc_getwp(mmc);
53
54 if ((wp < 0) && mmc->getwp)
55 wp = mmc->getwp(mmc);
56
57 return wp;
58}
59
314284b1 60int __board_mmc_getcd(struct mmc *mmc) {
11fdade2
SB
61 return -1;
62}
63
314284b1 64int board_mmc_getcd(struct mmc *mmc)__attribute__((weak,
11fdade2
SB
65 alias("__board_mmc_getcd")));
66
fdbb873e
KP
67static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
68 struct mmc_data *data)
272cc70b 69{
8635ff9e 70 struct mmc_data backup;
5db2fe3a 71 int ret;
8635ff9e
MV
72
73 memset(&backup, 0, sizeof(backup));
74
8635ff9e 75#ifdef CONFIG_MMC_TRACE
5db2fe3a
RR
76 int i;
77 u8 *ptr;
78
79 printf("CMD_SEND:%d\n", cmd->cmdidx);
80 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
5db2fe3a
RR
81 ret = mmc->send_cmd(mmc, cmd, data);
82 switch (cmd->resp_type) {
83 case MMC_RSP_NONE:
84 printf("\t\tMMC_RSP_NONE\n");
85 break;
86 case MMC_RSP_R1:
87 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
88 cmd->response[0]);
89 break;
90 case MMC_RSP_R1b:
91 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
92 cmd->response[0]);
93 break;
94 case MMC_RSP_R2:
95 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
96 cmd->response[0]);
97 printf("\t\t \t\t 0x%08X \n",
98 cmd->response[1]);
99 printf("\t\t \t\t 0x%08X \n",
100 cmd->response[2]);
101 printf("\t\t \t\t 0x%08X \n",
102 cmd->response[3]);
103 printf("\n");
104 printf("\t\t\t\t\tDUMPING DATA\n");
105 for (i = 0; i < 4; i++) {
106 int j;
107 printf("\t\t\t\t\t%03d - ", i*4);
146bec79 108 ptr = (u8 *)&cmd->response[i];
5db2fe3a
RR
109 ptr += 3;
110 for (j = 0; j < 4; j++)
111 printf("%02X ", *ptr--);
112 printf("\n");
113 }
114 break;
115 case MMC_RSP_R3:
116 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
117 cmd->response[0]);
118 break;
119 default:
120 printf("\t\tERROR MMC rsp not supported\n");
121 break;
122 }
5db2fe3a 123#else
8635ff9e 124 ret = mmc->send_cmd(mmc, cmd, data);
5db2fe3a 125#endif
8635ff9e 126 return ret;
272cc70b
AF
127}
128
fdbb873e 129static int mmc_send_status(struct mmc *mmc, int timeout)
5d4fc8d9
RR
130{
131 struct mmc_cmd cmd;
d617c426 132 int err, retries = 5;
5d4fc8d9
RR
133#ifdef CONFIG_MMC_TRACE
134 int status;
135#endif
136
137 cmd.cmdidx = MMC_CMD_SEND_STATUS;
138 cmd.resp_type = MMC_RSP_R1;
aaf3d41a
MV
139 if (!mmc_host_is_spi(mmc))
140 cmd.cmdarg = mmc->rca << 16;
5d4fc8d9
RR
141
142 do {
143 err = mmc_send_cmd(mmc, &cmd, NULL);
d617c426
JK
144 if (!err) {
145 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
146 (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
147 MMC_STATE_PRG)
148 break;
149 else if (cmd.response[0] & MMC_STATUS_MASK) {
150 printf("Status Error: 0x%08X\n",
151 cmd.response[0]);
152 return COMM_ERR;
153 }
154 } else if (--retries < 0)
5d4fc8d9 155 return err;
5d4fc8d9
RR
156
157 udelay(1000);
158
5d4fc8d9
RR
159 } while (timeout--);
160
5db2fe3a
RR
161#ifdef CONFIG_MMC_TRACE
162 status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
163 printf("CURR STATE:%d\n", status);
164#endif
5b0c942f 165 if (timeout <= 0) {
5d4fc8d9
RR
166 printf("Timeout waiting card ready\n");
167 return TIMEOUT;
168 }
169
170 return 0;
171}
172
fdbb873e 173static int mmc_set_blocklen(struct mmc *mmc, int len)
272cc70b
AF
174{
175 struct mmc_cmd cmd;
176
177 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
178 cmd.resp_type = MMC_RSP_R1;
179 cmd.cmdarg = len;
272cc70b
AF
180
181 return mmc_send_cmd(mmc, &cmd, NULL);
182}
183
184struct mmc *find_mmc_device(int dev_num)
185{
186 struct mmc *m;
187 struct list_head *entry;
188
189 list_for_each(entry, &mmc_devices) {
190 m = list_entry(entry, struct mmc, link);
191
192 if (m->block_dev.dev == dev_num)
193 return m;
194 }
195
196 printf("MMC Device %d not found\n", dev_num);
197
198 return NULL;
199}
200
e6f99a56
LW
201static ulong mmc_erase_t(struct mmc *mmc, ulong start, lbaint_t blkcnt)
202{
203 struct mmc_cmd cmd;
204 ulong end;
205 int err, start_cmd, end_cmd;
206
207 if (mmc->high_capacity)
208 end = start + blkcnt - 1;
209 else {
210 end = (start + blkcnt - 1) * mmc->write_bl_len;
211 start *= mmc->write_bl_len;
212 }
213
214 if (IS_SD(mmc)) {
215 start_cmd = SD_CMD_ERASE_WR_BLK_START;
216 end_cmd = SD_CMD_ERASE_WR_BLK_END;
217 } else {
218 start_cmd = MMC_CMD_ERASE_GROUP_START;
219 end_cmd = MMC_CMD_ERASE_GROUP_END;
220 }
221
222 cmd.cmdidx = start_cmd;
223 cmd.cmdarg = start;
224 cmd.resp_type = MMC_RSP_R1;
e6f99a56
LW
225
226 err = mmc_send_cmd(mmc, &cmd, NULL);
227 if (err)
228 goto err_out;
229
230 cmd.cmdidx = end_cmd;
231 cmd.cmdarg = end;
232
233 err = mmc_send_cmd(mmc, &cmd, NULL);
234 if (err)
235 goto err_out;
236
237 cmd.cmdidx = MMC_CMD_ERASE;
238 cmd.cmdarg = SECURE_ERASE;
239 cmd.resp_type = MMC_RSP_R1b;
240
241 err = mmc_send_cmd(mmc, &cmd, NULL);
242 if (err)
243 goto err_out;
244
245 return 0;
246
247err_out:
248 puts("mmc erase failed\n");
249 return err;
250}
251
252static unsigned long
253mmc_berase(int dev_num, unsigned long start, lbaint_t blkcnt)
254{
255 int err = 0;
256 struct mmc *mmc = find_mmc_device(dev_num);
257 lbaint_t blk = 0, blk_r = 0;
d2d8afae 258 int timeout = 1000;
e6f99a56
LW
259
260 if (!mmc)
261 return -1;
262
263 if ((start % mmc->erase_grp_size) || (blkcnt % mmc->erase_grp_size))
264 printf("\n\nCaution! Your devices Erase group is 0x%x\n"
265 "The erase range would be change to 0x%lx~0x%lx\n\n",
266 mmc->erase_grp_size, start & ~(mmc->erase_grp_size - 1),
267 ((start + blkcnt + mmc->erase_grp_size)
268 & ~(mmc->erase_grp_size - 1)) - 1);
269
270 while (blk < blkcnt) {
271 blk_r = ((blkcnt - blk) > mmc->erase_grp_size) ?
272 mmc->erase_grp_size : (blkcnt - blk);
273 err = mmc_erase_t(mmc, start + blk, blk_r);
274 if (err)
275 break;
276
277 blk += blk_r;
d2d8afae
JH
278
279 /* Waiting for the ready status */
280 if (mmc_send_status(mmc, timeout))
281 return 0;
e6f99a56
LW
282 }
283
284 return blk;
285}
286
272cc70b 287static ulong
0158126e 288mmc_write_blocks(struct mmc *mmc, ulong start, lbaint_t blkcnt, const void*src)
272cc70b
AF
289{
290 struct mmc_cmd cmd;
291 struct mmc_data data;
5d4fc8d9 292 int timeout = 1000;
272cc70b 293
d2bf29e3 294 if ((start + blkcnt) > mmc->block_dev.lba) {
def412b6 295 printf("MMC: block number 0x%lx exceeds max(0x%lx)\n",
d2bf29e3
LW
296 start + blkcnt, mmc->block_dev.lba);
297 return 0;
298 }
272cc70b
AF
299
300 if (blkcnt > 1)
301 cmd.cmdidx = MMC_CMD_WRITE_MULTIPLE_BLOCK;
302 else
303 cmd.cmdidx = MMC_CMD_WRITE_SINGLE_BLOCK;
304
305 if (mmc->high_capacity)
306 cmd.cmdarg = start;
307 else
def412b6 308 cmd.cmdarg = start * mmc->write_bl_len;
272cc70b
AF
309
310 cmd.resp_type = MMC_RSP_R1;
272cc70b
AF
311
312 data.src = src;
313 data.blocks = blkcnt;
def412b6 314 data.blocksize = mmc->write_bl_len;
272cc70b
AF
315 data.flags = MMC_DATA_WRITE;
316
def412b6
SS
317 if (mmc_send_cmd(mmc, &cmd, &data)) {
318 printf("mmc write failed\n");
319 return 0;
272cc70b
AF
320 }
321
d52ebf10
TC
322 /* SPI multiblock writes terminate using a special
323 * token, not a STOP_TRANSMISSION request.
324 */
325 if (!mmc_host_is_spi(mmc) && blkcnt > 1) {
272cc70b
AF
326 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
327 cmd.cmdarg = 0;
328 cmd.resp_type = MMC_RSP_R1b;
def412b6
SS
329 if (mmc_send_cmd(mmc, &cmd, NULL)) {
330 printf("mmc fail to send stop cmd\n");
331 return 0;
0158126e 332 }
272cc70b
AF
333 }
334
93ad0d18
JK
335 /* Waiting for the ready status */
336 if (mmc_send_status(mmc, timeout))
337 return 0;
338
272cc70b
AF
339 return blkcnt;
340}
341
0158126e
LW
342static ulong
343mmc_bwrite(int dev_num, ulong start, lbaint_t blkcnt, const void*src)
344{
0158126e
LW
345 lbaint_t cur, blocks_todo = blkcnt;
346
def412b6 347 struct mmc *mmc = find_mmc_device(dev_num);
0158126e 348 if (!mmc)
def412b6 349 return 0;
0158126e 350
def412b6
SS
351 if (mmc_set_blocklen(mmc, mmc->write_bl_len))
352 return 0;
0158126e
LW
353
354 do {
8feafcc4 355 cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo;
0158126e 356 if(mmc_write_blocks(mmc, start, cur, src) != cur)
def412b6 357 return 0;
0158126e
LW
358 blocks_todo -= cur;
359 start += cur;
360 src += cur * mmc->write_bl_len;
361 } while (blocks_todo > 0);
362
363 return blkcnt;
364}
365
fdbb873e
KP
366static int mmc_read_blocks(struct mmc *mmc, void *dst, ulong start,
367 lbaint_t blkcnt)
272cc70b
AF
368{
369 struct mmc_cmd cmd;
370 struct mmc_data data;
371
4a1a06bc
AS
372 if (blkcnt > 1)
373 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
374 else
375 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
272cc70b
AF
376
377 if (mmc->high_capacity)
4a1a06bc 378 cmd.cmdarg = start;
272cc70b 379 else
4a1a06bc 380 cmd.cmdarg = start * mmc->read_bl_len;
272cc70b
AF
381
382 cmd.resp_type = MMC_RSP_R1;
272cc70b
AF
383
384 data.dest = dst;
4a1a06bc 385 data.blocks = blkcnt;
272cc70b
AF
386 data.blocksize = mmc->read_bl_len;
387 data.flags = MMC_DATA_READ;
388
4a1a06bc
AS
389 if (mmc_send_cmd(mmc, &cmd, &data))
390 return 0;
272cc70b 391
4a1a06bc
AS
392 if (blkcnt > 1) {
393 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
394 cmd.cmdarg = 0;
395 cmd.resp_type = MMC_RSP_R1b;
4a1a06bc
AS
396 if (mmc_send_cmd(mmc, &cmd, NULL)) {
397 printf("mmc fail to send stop cmd\n");
398 return 0;
399 }
272cc70b
AF
400 }
401
4a1a06bc 402 return blkcnt;
272cc70b
AF
403}
404
405static ulong mmc_bread(int dev_num, ulong start, lbaint_t blkcnt, void *dst)
406{
4a1a06bc
AS
407 lbaint_t cur, blocks_todo = blkcnt;
408
409 if (blkcnt == 0)
410 return 0;
272cc70b 411
4a1a06bc 412 struct mmc *mmc = find_mmc_device(dev_num);
272cc70b
AF
413 if (!mmc)
414 return 0;
415
d2bf29e3 416 if ((start + blkcnt) > mmc->block_dev.lba) {
4a1a06bc 417 printf("MMC: block number 0x%lx exceeds max(0x%lx)\n",
d2bf29e3
LW
418 start + blkcnt, mmc->block_dev.lba);
419 return 0;
420 }
272cc70b 421
4a1a06bc 422 if (mmc_set_blocklen(mmc, mmc->read_bl_len))
272cc70b 423 return 0;
272cc70b 424
4a1a06bc 425 do {
8feafcc4 426 cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo;
4a1a06bc
AS
427 if(mmc_read_blocks(mmc, dst, start, cur) != cur)
428 return 0;
429 blocks_todo -= cur;
430 start += cur;
431 dst += cur * mmc->read_bl_len;
432 } while (blocks_todo > 0);
272cc70b
AF
433
434 return blkcnt;
435}
436
fdbb873e 437static int mmc_go_idle(struct mmc *mmc)
272cc70b
AF
438{
439 struct mmc_cmd cmd;
440 int err;
441
442 udelay(1000);
443
444 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
445 cmd.cmdarg = 0;
446 cmd.resp_type = MMC_RSP_NONE;
272cc70b
AF
447
448 err = mmc_send_cmd(mmc, &cmd, NULL);
449
450 if (err)
451 return err;
452
453 udelay(2000);
454
455 return 0;
456}
457
fdbb873e 458static int sd_send_op_cond(struct mmc *mmc)
272cc70b
AF
459{
460 int timeout = 1000;
461 int err;
462 struct mmc_cmd cmd;
463
464 do {
465 cmd.cmdidx = MMC_CMD_APP_CMD;
466 cmd.resp_type = MMC_RSP_R1;
467 cmd.cmdarg = 0;
272cc70b
AF
468
469 err = mmc_send_cmd(mmc, &cmd, NULL);
470
471 if (err)
472 return err;
473
474 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
475 cmd.resp_type = MMC_RSP_R3;
250de12b
SB
476
477 /*
478 * Most cards do not answer if some reserved bits
479 * in the ocr are set. However, Some controller
480 * can set bit 7 (reserved for low voltages), but
481 * how to manage low voltages SD card is not yet
482 * specified.
483 */
d52ebf10
TC
484 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
485 (mmc->voltages & 0xff8000);
272cc70b
AF
486
487 if (mmc->version == SD_VERSION_2)
488 cmd.cmdarg |= OCR_HCS;
489
490 err = mmc_send_cmd(mmc, &cmd, NULL);
491
492 if (err)
493 return err;
494
495 udelay(1000);
496 } while ((!(cmd.response[0] & OCR_BUSY)) && timeout--);
497
498 if (timeout <= 0)
499 return UNUSABLE_ERR;
500
501 if (mmc->version != SD_VERSION_2)
502 mmc->version = SD_VERSION_1_0;
503
d52ebf10
TC
504 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
505 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
506 cmd.resp_type = MMC_RSP_R3;
507 cmd.cmdarg = 0;
d52ebf10
TC
508
509 err = mmc_send_cmd(mmc, &cmd, NULL);
510
511 if (err)
512 return err;
513 }
514
998be3dd 515 mmc->ocr = cmd.response[0];
272cc70b
AF
516
517 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
518 mmc->rca = 0;
519
520 return 0;
521}
522
fdbb873e 523static int mmc_send_op_cond(struct mmc *mmc)
272cc70b 524{
31cacbab 525 int timeout = 10000;
272cc70b
AF
526 struct mmc_cmd cmd;
527 int err;
528
529 /* Some cards seem to need this */
530 mmc_go_idle(mmc);
531
31cacbab
RR
532 /* Asking to the card its capabilities */
533 cmd.cmdidx = MMC_CMD_SEND_OP_COND;
534 cmd.resp_type = MMC_RSP_R3;
535 cmd.cmdarg = 0;
cd6881b5 536
31cacbab 537 err = mmc_send_cmd(mmc, &cmd, NULL);
cd6881b5 538
31cacbab
RR
539 if (err)
540 return err;
cd6881b5 541
31cacbab 542 udelay(1000);
cd6881b5 543
272cc70b
AF
544 do {
545 cmd.cmdidx = MMC_CMD_SEND_OP_COND;
546 cmd.resp_type = MMC_RSP_R3;
31cacbab
RR
547 cmd.cmdarg = (mmc_host_is_spi(mmc) ? 0 :
548 (mmc->voltages &
549 (cmd.response[0] & OCR_VOLTAGE_MASK)) |
550 (cmd.response[0] & OCR_ACCESS_MODE));
b1f1e821
ŁM
551
552 if (mmc->host_caps & MMC_MODE_HC)
553 cmd.cmdarg |= OCR_HCS;
554
272cc70b
AF
555 err = mmc_send_cmd(mmc, &cmd, NULL);
556
557 if (err)
558 return err;
559
560 udelay(1000);
561 } while (!(cmd.response[0] & OCR_BUSY) && timeout--);
562
563 if (timeout <= 0)
564 return UNUSABLE_ERR;
565
d52ebf10
TC
566 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
567 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
568 cmd.resp_type = MMC_RSP_R3;
569 cmd.cmdarg = 0;
d52ebf10
TC
570
571 err = mmc_send_cmd(mmc, &cmd, NULL);
572
573 if (err)
574 return err;
575 }
576
272cc70b 577 mmc->version = MMC_VERSION_UNKNOWN;
998be3dd 578 mmc->ocr = cmd.response[0];
272cc70b
AF
579
580 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
581 mmc->rca = 0;
582
583 return 0;
584}
585
586
fdbb873e 587static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
272cc70b
AF
588{
589 struct mmc_cmd cmd;
590 struct mmc_data data;
591 int err;
592
593 /* Get the Card Status Register */
594 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
595 cmd.resp_type = MMC_RSP_R1;
596 cmd.cmdarg = 0;
272cc70b 597
cdfd1ac6 598 data.dest = (char *)ext_csd;
272cc70b
AF
599 data.blocks = 1;
600 data.blocksize = 512;
601 data.flags = MMC_DATA_READ;
602
603 err = mmc_send_cmd(mmc, &cmd, &data);
604
605 return err;
606}
607
608
fdbb873e 609static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
272cc70b
AF
610{
611 struct mmc_cmd cmd;
5d4fc8d9
RR
612 int timeout = 1000;
613 int ret;
272cc70b
AF
614
615 cmd.cmdidx = MMC_CMD_SWITCH;
616 cmd.resp_type = MMC_RSP_R1b;
617 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
5d4fc8d9
RR
618 (index << 16) |
619 (value << 8);
272cc70b 620
5d4fc8d9
RR
621 ret = mmc_send_cmd(mmc, &cmd, NULL);
622
623 /* Waiting for the ready status */
93ad0d18
JK
624 if (!ret)
625 ret = mmc_send_status(mmc, timeout);
5d4fc8d9
RR
626
627 return ret;
628
272cc70b
AF
629}
630
fdbb873e 631static int mmc_change_freq(struct mmc *mmc)
272cc70b 632{
cdfd1ac6 633 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, 512);
272cc70b
AF
634 char cardtype;
635 int err;
636
637 mmc->card_caps = 0;
638
d52ebf10
TC
639 if (mmc_host_is_spi(mmc))
640 return 0;
641
272cc70b
AF
642 /* Only version 4 supports high-speed */
643 if (mmc->version < MMC_VERSION_4)
644 return 0;
645
272cc70b
AF
646 err = mmc_send_ext_csd(mmc, ext_csd);
647
648 if (err)
649 return err;
650
0560db18 651 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
272cc70b
AF
652
653 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
654
655 if (err)
656 return err;
657
658 /* Now check to see that it worked */
659 err = mmc_send_ext_csd(mmc, ext_csd);
660
661 if (err)
662 return err;
663
664 /* No high-speed support */
0560db18 665 if (!ext_csd[EXT_CSD_HS_TIMING])
272cc70b
AF
666 return 0;
667
668 /* High Speed is set, there are two types: 52MHz and 26MHz */
669 if (cardtype & MMC_HS_52MHZ)
670 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
671 else
672 mmc->card_caps |= MMC_MODE_HS;
673
674 return 0;
675}
676
bc897b1d
LW
677int mmc_switch_part(int dev_num, unsigned int part_num)
678{
679 struct mmc *mmc = find_mmc_device(dev_num);
680
681 if (!mmc)
682 return -1;
683
684 return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
685 (mmc->part_config & ~PART_ACCESS_MASK)
686 | (part_num & PART_ACCESS_MASK));
687}
688
48972d90
TR
689int mmc_getcd(struct mmc *mmc)
690{
691 int cd;
692
693 cd = board_mmc_getcd(mmc);
694
695 if ((cd < 0) && mmc->getcd)
696 cd = mmc->getcd(mmc);
697
698 return cd;
699}
700
fdbb873e 701static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
272cc70b
AF
702{
703 struct mmc_cmd cmd;
704 struct mmc_data data;
705
706 /* Switch the frequency */
707 cmd.cmdidx = SD_CMD_SWITCH_FUNC;
708 cmd.resp_type = MMC_RSP_R1;
709 cmd.cmdarg = (mode << 31) | 0xffffff;
710 cmd.cmdarg &= ~(0xf << (group * 4));
711 cmd.cmdarg |= value << (group * 4);
272cc70b
AF
712
713 data.dest = (char *)resp;
714 data.blocksize = 64;
715 data.blocks = 1;
716 data.flags = MMC_DATA_READ;
717
718 return mmc_send_cmd(mmc, &cmd, &data);
719}
720
721
fdbb873e 722static int sd_change_freq(struct mmc *mmc)
272cc70b
AF
723{
724 int err;
725 struct mmc_cmd cmd;
f781dd38
A
726 ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
727 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
272cc70b
AF
728 struct mmc_data data;
729 int timeout;
730
731 mmc->card_caps = 0;
732
d52ebf10
TC
733 if (mmc_host_is_spi(mmc))
734 return 0;
735
272cc70b
AF
736 /* Read the SCR to find out if this card supports higher speeds */
737 cmd.cmdidx = MMC_CMD_APP_CMD;
738 cmd.resp_type = MMC_RSP_R1;
739 cmd.cmdarg = mmc->rca << 16;
272cc70b
AF
740
741 err = mmc_send_cmd(mmc, &cmd, NULL);
742
743 if (err)
744 return err;
745
746 cmd.cmdidx = SD_CMD_APP_SEND_SCR;
747 cmd.resp_type = MMC_RSP_R1;
748 cmd.cmdarg = 0;
272cc70b
AF
749
750 timeout = 3;
751
752retry_scr:
f781dd38 753 data.dest = (char *)scr;
272cc70b
AF
754 data.blocksize = 8;
755 data.blocks = 1;
756 data.flags = MMC_DATA_READ;
757
758 err = mmc_send_cmd(mmc, &cmd, &data);
759
760 if (err) {
761 if (timeout--)
762 goto retry_scr;
763
764 return err;
765 }
766
4e3d89ba
YK
767 mmc->scr[0] = __be32_to_cpu(scr[0]);
768 mmc->scr[1] = __be32_to_cpu(scr[1]);
272cc70b
AF
769
770 switch ((mmc->scr[0] >> 24) & 0xf) {
771 case 0:
772 mmc->version = SD_VERSION_1_0;
773 break;
774 case 1:
775 mmc->version = SD_VERSION_1_10;
776 break;
777 case 2:
778 mmc->version = SD_VERSION_2;
779 break;
780 default:
781 mmc->version = SD_VERSION_1_0;
782 break;
783 }
784
b44c7083
AS
785 if (mmc->scr[0] & SD_DATA_4BIT)
786 mmc->card_caps |= MMC_MODE_4BIT;
787
272cc70b
AF
788 /* Version 1.0 doesn't support switching */
789 if (mmc->version == SD_VERSION_1_0)
790 return 0;
791
792 timeout = 4;
793 while (timeout--) {
794 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
f781dd38 795 (u8 *)switch_status);
272cc70b
AF
796
797 if (err)
798 return err;
799
800 /* The high-speed function is busy. Try again */
4e3d89ba 801 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
272cc70b
AF
802 break;
803 }
804
272cc70b 805 /* If high-speed isn't supported, we return */
4e3d89ba 806 if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
272cc70b
AF
807 return 0;
808
2c3fbf4c
ML
809 /*
810 * If the host doesn't support SD_HIGHSPEED, do not switch card to
811 * HIGHSPEED mode even if the card support SD_HIGHSPPED.
812 * This can avoid furthur problem when the card runs in different
813 * mode between the host.
814 */
815 if (!((mmc->host_caps & MMC_MODE_HS_52MHz) &&
816 (mmc->host_caps & MMC_MODE_HS)))
817 return 0;
818
f781dd38 819 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
272cc70b
AF
820
821 if (err)
822 return err;
823
4e3d89ba 824 if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
272cc70b
AF
825 mmc->card_caps |= MMC_MODE_HS;
826
827 return 0;
828}
829
830/* frequency bases */
831/* divided by 10 to be nice to platforms without floating point */
5f837c2c 832static const int fbase[] = {
272cc70b
AF
833 10000,
834 100000,
835 1000000,
836 10000000,
837};
838
839/* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
840 * to platforms without floating point.
841 */
5f837c2c 842static const int multipliers[] = {
272cc70b
AF
843 0, /* reserved */
844 10,
845 12,
846 13,
847 15,
848 20,
849 25,
850 30,
851 35,
852 40,
853 45,
854 50,
855 55,
856 60,
857 70,
858 80,
859};
860
fdbb873e 861static void mmc_set_ios(struct mmc *mmc)
272cc70b
AF
862{
863 mmc->set_ios(mmc);
864}
865
866void mmc_set_clock(struct mmc *mmc, uint clock)
867{
868 if (clock > mmc->f_max)
869 clock = mmc->f_max;
870
871 if (clock < mmc->f_min)
872 clock = mmc->f_min;
873
874 mmc->clock = clock;
875
876 mmc_set_ios(mmc);
877}
878
fdbb873e 879static void mmc_set_bus_width(struct mmc *mmc, uint width)
272cc70b
AF
880{
881 mmc->bus_width = width;
882
883 mmc_set_ios(mmc);
884}
885
fdbb873e 886static int mmc_startup(struct mmc *mmc)
272cc70b 887{
7798f6db 888 int err;
272cc70b 889 uint mult, freq;
639b7827 890 u64 cmult, csize, capacity;
272cc70b 891 struct mmc_cmd cmd;
cdfd1ac6
YS
892 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, 512);
893 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, 512);
5d4fc8d9 894 int timeout = 1000;
272cc70b 895
d52ebf10
TC
896#ifdef CONFIG_MMC_SPI_CRC_ON
897 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
898 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
899 cmd.resp_type = MMC_RSP_R1;
900 cmd.cmdarg = 1;
d52ebf10
TC
901 err = mmc_send_cmd(mmc, &cmd, NULL);
902
903 if (err)
904 return err;
905 }
906#endif
907
272cc70b 908 /* Put the Card in Identify Mode */
d52ebf10
TC
909 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
910 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
272cc70b
AF
911 cmd.resp_type = MMC_RSP_R2;
912 cmd.cmdarg = 0;
272cc70b
AF
913
914 err = mmc_send_cmd(mmc, &cmd, NULL);
915
916 if (err)
917 return err;
918
919 memcpy(mmc->cid, cmd.response, 16);
920
921 /*
922 * For MMC cards, set the Relative Address.
923 * For SD cards, get the Relatvie Address.
924 * This also puts the cards into Standby State
925 */
d52ebf10
TC
926 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
927 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
928 cmd.cmdarg = mmc->rca << 16;
929 cmd.resp_type = MMC_RSP_R6;
272cc70b 930
d52ebf10 931 err = mmc_send_cmd(mmc, &cmd, NULL);
272cc70b 932
d52ebf10
TC
933 if (err)
934 return err;
272cc70b 935
d52ebf10
TC
936 if (IS_SD(mmc))
937 mmc->rca = (cmd.response[0] >> 16) & 0xffff;
938 }
272cc70b
AF
939
940 /* Get the Card-Specific Data */
941 cmd.cmdidx = MMC_CMD_SEND_CSD;
942 cmd.resp_type = MMC_RSP_R2;
943 cmd.cmdarg = mmc->rca << 16;
272cc70b
AF
944
945 err = mmc_send_cmd(mmc, &cmd, NULL);
946
5d4fc8d9
RR
947 /* Waiting for the ready status */
948 mmc_send_status(mmc, timeout);
949
272cc70b
AF
950 if (err)
951 return err;
952
998be3dd
RV
953 mmc->csd[0] = cmd.response[0];
954 mmc->csd[1] = cmd.response[1];
955 mmc->csd[2] = cmd.response[2];
956 mmc->csd[3] = cmd.response[3];
272cc70b
AF
957
958 if (mmc->version == MMC_VERSION_UNKNOWN) {
0b453ffe 959 int version = (cmd.response[0] >> 26) & 0xf;
272cc70b
AF
960
961 switch (version) {
962 case 0:
963 mmc->version = MMC_VERSION_1_2;
964 break;
965 case 1:
966 mmc->version = MMC_VERSION_1_4;
967 break;
968 case 2:
969 mmc->version = MMC_VERSION_2_2;
970 break;
971 case 3:
972 mmc->version = MMC_VERSION_3;
973 break;
974 case 4:
975 mmc->version = MMC_VERSION_4;
976 break;
977 default:
978 mmc->version = MMC_VERSION_1_2;
979 break;
980 }
981 }
982
983 /* divide frequency by 10, since the mults are 10x bigger */
0b453ffe
RV
984 freq = fbase[(cmd.response[0] & 0x7)];
985 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
272cc70b
AF
986
987 mmc->tran_speed = freq * mult;
988
998be3dd 989 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
272cc70b
AF
990
991 if (IS_SD(mmc))
992 mmc->write_bl_len = mmc->read_bl_len;
993 else
998be3dd 994 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
272cc70b
AF
995
996 if (mmc->high_capacity) {
997 csize = (mmc->csd[1] & 0x3f) << 16
998 | (mmc->csd[2] & 0xffff0000) >> 16;
999 cmult = 8;
1000 } else {
1001 csize = (mmc->csd[1] & 0x3ff) << 2
1002 | (mmc->csd[2] & 0xc0000000) >> 30;
1003 cmult = (mmc->csd[2] & 0x00038000) >> 15;
1004 }
1005
1006 mmc->capacity = (csize + 1) << (cmult + 2);
1007 mmc->capacity *= mmc->read_bl_len;
1008
1009 if (mmc->read_bl_len > 512)
1010 mmc->read_bl_len = 512;
1011
1012 if (mmc->write_bl_len > 512)
1013 mmc->write_bl_len = 512;
1014
1015 /* Select the card, and put it into Transfer Mode */
d52ebf10
TC
1016 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1017 cmd.cmdidx = MMC_CMD_SELECT_CARD;
fe8f7066 1018 cmd.resp_type = MMC_RSP_R1;
d52ebf10 1019 cmd.cmdarg = mmc->rca << 16;
d52ebf10 1020 err = mmc_send_cmd(mmc, &cmd, NULL);
272cc70b 1021
d52ebf10
TC
1022 if (err)
1023 return err;
1024 }
272cc70b 1025
e6f99a56
LW
1026 /*
1027 * For SD, its erase group is always one sector
1028 */
1029 mmc->erase_grp_size = 1;
bc897b1d 1030 mmc->part_config = MMCPART_NOAVAILABLE;
d23e2c09
SG
1031 if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
1032 /* check ext_csd version and capacity */
1033 err = mmc_send_ext_csd(mmc, ext_csd);
fdbb873e 1034 if (!err && (ext_csd[EXT_CSD_REV] >= 2)) {
639b7827
YS
1035 /*
1036 * According to the JEDEC Standard, the value of
1037 * ext_csd's capacity is valid if the value is more
1038 * than 2GB
1039 */
0560db18
LW
1040 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
1041 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
1042 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
1043 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
639b7827 1044 capacity *= 512;
b1f1e821 1045 if ((capacity >> 20) > 2 * 1024)
639b7827 1046 mmc->capacity = capacity;
d23e2c09 1047 }
bc897b1d 1048
e6f99a56
LW
1049 /*
1050 * Check whether GROUP_DEF is set, if yes, read out
1051 * group size from ext_csd directly, or calculate
1052 * the group size from the csd value.
1053 */
0560db18
LW
1054 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF])
1055 mmc->erase_grp_size =
1056 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 512 * 1024;
e6f99a56
LW
1057 else {
1058 int erase_gsz, erase_gmul;
1059 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
1060 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
1061 mmc->erase_grp_size = (erase_gsz + 1)
1062 * (erase_gmul + 1);
1063 }
1064
bc897b1d 1065 /* store the partition info of emmc */
8948ea83
SW
1066 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
1067 ext_csd[EXT_CSD_BOOT_MULT])
0560db18 1068 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
d23e2c09
SG
1069 }
1070
272cc70b
AF
1071 if (IS_SD(mmc))
1072 err = sd_change_freq(mmc);
1073 else
1074 err = mmc_change_freq(mmc);
1075
1076 if (err)
1077 return err;
1078
1079 /* Restrict card's capabilities by what the host can do */
1080 mmc->card_caps &= mmc->host_caps;
1081
1082 if (IS_SD(mmc)) {
1083 if (mmc->card_caps & MMC_MODE_4BIT) {
1084 cmd.cmdidx = MMC_CMD_APP_CMD;
1085 cmd.resp_type = MMC_RSP_R1;
1086 cmd.cmdarg = mmc->rca << 16;
272cc70b
AF
1087
1088 err = mmc_send_cmd(mmc, &cmd, NULL);
1089 if (err)
1090 return err;
1091
1092 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1093 cmd.resp_type = MMC_RSP_R1;
1094 cmd.cmdarg = 2;
272cc70b
AF
1095 err = mmc_send_cmd(mmc, &cmd, NULL);
1096 if (err)
1097 return err;
1098
1099 mmc_set_bus_width(mmc, 4);
1100 }
1101
1102 if (mmc->card_caps & MMC_MODE_HS)
ad5fd922 1103 mmc->tran_speed = 50000000;
272cc70b 1104 else
ad5fd922 1105 mmc->tran_speed = 25000000;
272cc70b 1106 } else {
7798f6db
AF
1107 int idx;
1108
1109 /* An array of possible bus widths in order of preference */
1110 static unsigned ext_csd_bits[] = {
1111 EXT_CSD_BUS_WIDTH_8,
1112 EXT_CSD_BUS_WIDTH_4,
1113 EXT_CSD_BUS_WIDTH_1,
1114 };
1115
1116 /* An array to map CSD bus widths to host cap bits */
1117 static unsigned ext_to_hostcaps[] = {
1118 [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
1119 [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
1120 };
1121
1122 /* An array to map chosen bus width to an integer */
1123 static unsigned widths[] = {
1124 8, 4, 1,
1125 };
1126
1127 for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
1128 unsigned int extw = ext_csd_bits[idx];
1129
1130 /*
1131 * Check to make sure the controller supports
1132 * this bus width, if it's more than 1
1133 */
1134 if (extw != EXT_CSD_BUS_WIDTH_1 &&
1135 !(mmc->host_caps & ext_to_hostcaps[extw]))
1136 continue;
1137
272cc70b 1138 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
7798f6db 1139 EXT_CSD_BUS_WIDTH, extw);
272cc70b
AF
1140
1141 if (err)
4137894e 1142 continue;
272cc70b 1143
7798f6db 1144 mmc_set_bus_width(mmc, widths[idx]);
4137894e
LW
1145
1146 err = mmc_send_ext_csd(mmc, test_csd);
1147 if (!err && ext_csd[EXT_CSD_PARTITIONING_SUPPORT] \
1148 == test_csd[EXT_CSD_PARTITIONING_SUPPORT]
1149 && ext_csd[EXT_CSD_ERASE_GROUP_DEF] \
1150 == test_csd[EXT_CSD_ERASE_GROUP_DEF] \
1151 && ext_csd[EXT_CSD_REV] \
1152 == test_csd[EXT_CSD_REV]
1153 && ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] \
1154 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1155 && memcmp(&ext_csd[EXT_CSD_SEC_CNT], \
1156 &test_csd[EXT_CSD_SEC_CNT], 4) == 0) {
1157
7798f6db 1158 mmc->card_caps |= ext_to_hostcaps[extw];
4137894e
LW
1159 break;
1160 }
272cc70b
AF
1161 }
1162
1163 if (mmc->card_caps & MMC_MODE_HS) {
1164 if (mmc->card_caps & MMC_MODE_HS_52MHz)
ad5fd922 1165 mmc->tran_speed = 52000000;
272cc70b 1166 else
ad5fd922
JC
1167 mmc->tran_speed = 26000000;
1168 }
272cc70b
AF
1169 }
1170
ad5fd922
JC
1171 mmc_set_clock(mmc, mmc->tran_speed);
1172
272cc70b
AF
1173 /* fill in device description */
1174 mmc->block_dev.lun = 0;
1175 mmc->block_dev.type = 0;
1176 mmc->block_dev.blksz = mmc->read_bl_len;
9b1f942c 1177 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
babce5f6
TH
1178 sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x",
1179 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
1180 (mmc->cid[3] >> 16) & 0xffff);
1181 sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
1182 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1183 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
1184 (mmc->cid[2] >> 24) & 0xff);
1185 sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
1186 (mmc->cid[2] >> 16) & 0xf);
122efd43 1187#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
272cc70b 1188 init_part(&mmc->block_dev);
122efd43 1189#endif
272cc70b
AF
1190
1191 return 0;
1192}
1193
fdbb873e 1194static int mmc_send_if_cond(struct mmc *mmc)
272cc70b
AF
1195{
1196 struct mmc_cmd cmd;
1197 int err;
1198
1199 cmd.cmdidx = SD_CMD_SEND_IF_COND;
1200 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
1201 cmd.cmdarg = ((mmc->voltages & 0xff8000) != 0) << 8 | 0xaa;
1202 cmd.resp_type = MMC_RSP_R7;
272cc70b
AF
1203
1204 err = mmc_send_cmd(mmc, &cmd, NULL);
1205
1206 if (err)
1207 return err;
1208
998be3dd 1209 if ((cmd.response[0] & 0xff) != 0xaa)
272cc70b
AF
1210 return UNUSABLE_ERR;
1211 else
1212 mmc->version = SD_VERSION_2;
1213
1214 return 0;
1215}
1216
1217int mmc_register(struct mmc *mmc)
1218{
1219 /* Setup the universal parts of the block interface just once */
1220 mmc->block_dev.if_type = IF_TYPE_MMC;
1221 mmc->block_dev.dev = cur_dev_num++;
1222 mmc->block_dev.removable = 1;
1223 mmc->block_dev.block_read = mmc_bread;
1224 mmc->block_dev.block_write = mmc_bwrite;
e6f99a56 1225 mmc->block_dev.block_erase = mmc_berase;
8feafcc4
JR
1226 if (!mmc->b_max)
1227 mmc->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
272cc70b
AF
1228
1229 INIT_LIST_HEAD (&mmc->link);
1230
1231 list_add_tail (&mmc->link, &mmc_devices);
1232
1233 return 0;
1234}
1235
df3fc526 1236#ifdef CONFIG_PARTITIONS
272cc70b
AF
1237block_dev_desc_t *mmc_get_dev(int dev)
1238{
1239 struct mmc *mmc = find_mmc_device(dev);
6bb4b4bc 1240 if (!mmc || mmc_init(mmc))
40242bc3 1241 return NULL;
272cc70b 1242
40242bc3 1243 return &mmc->block_dev;
272cc70b 1244}
df3fc526 1245#endif
272cc70b
AF
1246
1247int mmc_init(struct mmc *mmc)
1248{
afd5932b 1249 int err;
272cc70b 1250
48972d90
TR
1251 if (mmc_getcd(mmc) == 0) {
1252 mmc->has_init = 0;
1253 printf("MMC: no card present\n");
1254 return NO_CARD_ERR;
1255 }
1256
bc897b1d
LW
1257 if (mmc->has_init)
1258 return 0;
1259
272cc70b
AF
1260 err = mmc->init(mmc);
1261
1262 if (err)
1263 return err;
1264
b86b85e2
IY
1265 mmc_set_bus_width(mmc, 1);
1266 mmc_set_clock(mmc, 1);
1267
272cc70b
AF
1268 /* Reset the Card */
1269 err = mmc_go_idle(mmc);
1270
1271 if (err)
1272 return err;
1273
bc897b1d
LW
1274 /* The internal partition reset to user partition(0) at every CMD0*/
1275 mmc->part_num = 0;
1276
272cc70b 1277 /* Test for SD version 2 */
afd5932b 1278 err = mmc_send_if_cond(mmc);
272cc70b 1279
272cc70b
AF
1280 /* Now try to get the SD card's operating condition */
1281 err = sd_send_op_cond(mmc);
1282
1283 /* If the command timed out, we check for an MMC card */
1284 if (err == TIMEOUT) {
1285 err = mmc_send_op_cond(mmc);
1286
1287 if (err) {
1288 printf("Card did not respond to voltage select!\n");
1289 return UNUSABLE_ERR;
1290 }
1291 }
1292
bc897b1d
LW
1293 err = mmc_startup(mmc);
1294 if (err)
1295 mmc->has_init = 0;
1296 else
1297 mmc->has_init = 1;
1298 return err;
272cc70b
AF
1299}
1300
1301/*
1302 * CPU and board-specific MMC initializations. Aliased function
1303 * signals caller to move on
1304 */
1305static int __def_mmc_init(bd_t *bis)
1306{
1307 return -1;
1308}
1309
f9a109b3
PT
1310int cpu_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init")));
1311int board_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init")));
272cc70b
AF
1312
1313void print_mmc_devices(char separator)
1314{
1315 struct mmc *m;
1316 struct list_head *entry;
1317
1318 list_for_each(entry, &mmc_devices) {
1319 m = list_entry(entry, struct mmc, link);
1320
1321 printf("%s: %d", m->name, m->block_dev.dev);
1322
1323 if (entry->next != &mmc_devices)
1324 printf("%c ", separator);
1325 }
1326
1327 printf("\n");
1328}
1329
ea6ebe21
LW
1330int get_mmc_num(void)
1331{
1332 return cur_dev_num;
1333}
1334
272cc70b
AF
1335int mmc_initialize(bd_t *bis)
1336{
1337 INIT_LIST_HEAD (&mmc_devices);
1338 cur_dev_num = 0;
1339
1340 if (board_mmc_init(bis) < 0)
1341 cpu_mmc_init(bis);
1342
1343 print_mmc_devices(',');
1344
1345 return 0;
1346}