[people/ms/u-boot.git] / include / configs / uniphier.h

/*
 * Copyright (C) 2012-2015 Panasonic Corporation
 * Copyright (C) 2015-2016 Socionext Inc.
 *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

/* U-Boot - Common settings for UniPhier Family */

#ifndef __CONFIG_UNIPHIER_COMMON_H__
#define __CONFIG_UNIPHIER_COMMON_H__

#define CONFIG_ARMV7_PSCI_1_0

/*-----------------------------------------------------------------------
 * MMU and Cache Setting
 *----------------------------------------------------------------------*/

/* Comment out the following to enable L1 cache */
/* #define CONFIG_SYS_ICACHE_OFF */
/* #define CONFIG_SYS_DCACHE_OFF */

#define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)

#define CONFIG_TIMESTAMP

/* FLASH related */
#define CONFIG_MTD_DEVICE

#define CONFIG_SMC911X_32_BIT
/* dummy: referenced by examples/standalone/smc911x_eeprom.c */
#define CONFIG_SMC911X_BASE	0

#ifdef CONFIG_MICRO_SUPPORT_CARD
#define CONFIG_SMC911X
#endif

#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_SYS_FLASH_CFI

#define CONFIG_SYS_MAX_FLASH_SECT	256
#define CONFIG_SYS_MONITOR_BASE		0
#define CONFIG_SYS_MONITOR_LEN		0x00080000	/* 512KB */
#define CONFIG_SYS_FLASH_BASE		0

/*
 * flash_toggle does not work for our support card.
 * We need to use flash_status_poll.
 */
#define CONFIG_SYS_CFI_FLASH_STATUS_POLL

#define CONFIG_FLASH_SHOW_PROGRESS	45 /* count down from 45/5: 9..1 */

#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1

/* serial console configuration */

#define CONFIG_SYS_LONGHELP		/* undef to save memory */

#define CONFIG_CMDLINE_EDITING		/* add command line history	*/
#define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size */
#define CONFIG_SYS_MAXARGS		16	/* max number of command */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)

#define CONFIG_CONS_INDEX		1

#define CONFIG_ENV_OFFSET			0x100000
#define CONFIG_ENV_SIZE				0x2000
/* #define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */

#define CONFIG_SYS_MMC_ENV_DEV		0
#define CONFIG_SYS_MMC_ENV_PART		1

#if !defined(CONFIG_ARM64)
/* Time clock 1MHz */
#define CONFIG_SYS_TIMER_RATE			1000000
#endif

#define CONFIG_SYS_MAX_NAND_DEVICE			1
#define CONFIG_SYS_NAND_ONFI_DETECTION

#define CONFIG_NAND_DENALI_ECC_SIZE			1024

#define CONFIG_SYS_NAND_REGS_BASE			0x68100000
#define CONFIG_SYS_NAND_DATA_BASE			0x68000000

#define CONFIG_SYS_NAND_USE_FLASH_BBT
#define CONFIG_SYS_NAND_BAD_BLOCK_POS			0

/* SD/MMC */
#define CONFIG_SUPPORT_EMMC_BOOT

/* memtest works on */
#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x01000000)

/*
 * Network Configuration
 */
#define CONFIG_SERVERIP			192.168.11.1
#define CONFIG_IPADDR			192.168.11.10
#define CONFIG_GATEWAYIP		192.168.11.1
#define CONFIG_NETMASK			255.255.255.0

#define CONFIG_LOADADDR			0x84000000
#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR

#define CONFIG_CMDLINE_EDITING		/* add command line history	*/

#if defined(CONFIG_ARM64)
/* ARM Trusted Firmware */
#define BOOT_IMAGES \
	"second_image=unph_bl.bin\0" \
	"third_image=fip.bin\0"
#else
#define BOOT_IMAGES \
	"second_image=u-boot-spl.bin\0" \
	"third_image=u-boot.bin\0"
#endif

#define CONFIG_BOOTCOMMAND		"run $bootmode"

#define CONFIG_ROOTPATH			"/nfs/root/path"
#define CONFIG_NFSBOOTCOMMAND						\
	"setenv bootargs $bootargs root=/dev/nfs rw "			\
	"nfsroot=$serverip:$rootpath "					\
	"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \
		"run __nfsboot"

#ifdef CONFIG_FIT
#define CONFIG_BOOTFILE			"fitImage"
#define LINUXBOOT_ENV_SETTINGS \
	"fit_addr=0x00100000\0" \
	"fit_addr_r=0x84100000\0" \
	"fit_size=0x00f00000\0" \
	"norboot=setexpr fit_addr $nor_base + $fit_addr &&" \
		"bootm $fit_addr\0" \
	"nandboot=nand read $fit_addr_r $fit_addr $fit_size &&" \
		"bootm $fit_addr_r\0" \
	"tftpboot=tftpboot $fit_addr_r $bootfile &&" \
		"bootm $fit_addr_r\0" \
	"__nfsboot=run tftpboot\0"
#else
#ifdef CONFIG_ARM64
#define CONFIG_BOOTFILE			"Image.gz"
#define LINUXBOOT_CMD			"booti"
#define KERNEL_ADDR_LOAD		"kernel_addr_load=0x84200000\0"
#define KERNEL_ADDR_R			"kernel_addr_r=0x82080000\0"
#else
#define CONFIG_BOOTFILE			"zImage"
#define LINUXBOOT_CMD			"bootz"
#define KERNEL_ADDR_LOAD		"kernel_addr_load=0x80208000\0"
#define KERNEL_ADDR_R			"kernel_addr_r=0x80208000\0"
#endif
#define LINUXBOOT_ENV_SETTINGS \
	"fdt_addr=0x00100000\0" \
	"fdt_addr_r=0x84100000\0" \
	"fdt_size=0x00008000\0" \
	"kernel_addr=0x00200000\0" \
	KERNEL_ADDR_LOAD \
	KERNEL_ADDR_R \
	"kernel_size=0x00800000\0" \
	"ramdisk_addr=0x00a00000\0" \
	"ramdisk_addr_r=0x84a00000\0" \
	"ramdisk_size=0x00600000\0" \
	"ramdisk_file=rootfs.cpio.uboot\0" \
	"boot_common=setexpr bootm_low $kernel_addr_r '&' fe000000 && " \
		"if test $kernel_addr_load = $kernel_addr_r; then " \
			"true; " \
		"else " \
			"unzip $kernel_addr_load $kernel_addr_r; " \
		"fi && " \
		LINUXBOOT_CMD " $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \
	"norboot=setexpr kernel_addr_nor $nor_base + $kernel_addr && " \
		"setexpr kernel_size_div4 $kernel_size / 4 && " \
		"cp $kernel_addr_nor $kernel_addr_load $kernel_size_div4 && " \
		"setexpr ramdisk_addr_nor $nor_base + $ramdisk_addr && " \
		"setexpr ramdisk_size_div4 $ramdisk_size / 4 && " \
		"cp $ramdisk_addr_nor $ramdisk_addr_r $ramdisk_size_div4 && " \
		"setexpr fdt_addr_nor $nor_base + $fdt_addr && " \
		"setexpr fdt_size_div4 $fdt_size / 4 && " \
		"cp $fdt_addr_nor $fdt_addr_r $fdt_size_div4 && " \
		"run boot_common\0" \
	"nandboot=nand read $kernel_addr_load $kernel_addr $kernel_size && " \
		"nand read $ramdisk_addr_r $ramdisk_addr $ramdisk_size &&" \
		"nand read $fdt_addr_r $fdt_addr $fdt_size &&" \
		"run boot_common\0" \
	"tftpboot=tftpboot $kernel_addr_load $bootfile && " \
		"tftpboot $ramdisk_addr_r $ramdisk_file &&" \
		"tftpboot $fdt_addr_r $fdt_file &&" \
		"run boot_common\0" \
	"__nfsboot=tftpboot $kernel_addr_load $bootfile && " \
		"tftpboot $fdt_addr_r $fdt_file &&" \
		"setenv ramdisk_addr_r - &&" \
		"run boot_common\0"
#endif

#define	CONFIG_EXTRA_ENV_SETTINGS				\
	"netdev=eth0\0"						\
	"verify=n\0"						\
	"initrd_high=0xffffffffffffffff\0"			\
	"nor_base=0x42000000\0"					\
	"sramupdate=setexpr tmp_addr $nor_base + 0x50000 &&"	\
		"tftpboot $tmp_addr $second_image && " \
		"setexpr tmp_addr $nor_base + 0x70000 && " \
		"tftpboot $tmp_addr $third_image\0" \
	"emmcupdate=mmcsetn &&"					\
		"mmc partconf $mmc_first_dev 0 1 1 &&"		\
		"tftpboot $second_image && " \
		"mmc write $loadaddr 0 100 && " \
		"tftpboot $third_image && " \
		"mmc write $loadaddr 100 700\0" \
	"nandupdate=nand erase 0 0x00100000 &&"			\
		"tftpboot $second_image && " \
		"nand write $loadaddr 0 0x00020000 && " \
		"tftpboot $third_image && " \
		"nand write $loadaddr 0x00020000 0x000e0000\0" \
	"usbupdate=usb start &&" \
		"tftpboot $second_image && " \
		"usb write $loadaddr 0 100 && " \
		"tftpboot $third_image && " \
		"usb write $loadaddr 100 700\0" \
	BOOT_IMAGES \
	LINUXBOOT_ENV_SETTINGS

#define CONFIG_SYS_BOOTMAPSZ			0x20000000

#define CONFIG_SYS_SDRAM_BASE		0x80000000
#define CONFIG_NR_DRAM_BANKS		3
/* for LD20; the last 64 byte is used for dynamic DDR PHY training */
#define CONFIG_SYS_MEM_TOP_HIDE		64

#define CONFIG_PANIC_HANG

#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_TEXT_BASE)

/* only for SPL */
#if defined(CONFIG_ARCH_UNIPHIER_LD4) || \
	defined(CONFIG_ARCH_UNIPHIER_SLD8)
#define CONFIG_SPL_TEXT_BASE		0x00040000
#else
#define CONFIG_SPL_TEXT_BASE		0x00100000
#endif

#define CONFIG_SPL_STACK		(0x00100000)

#define CONFIG_SPL_FRAMEWORK

#define CONFIG_SYS_NAND_U_BOOT_OFFS		0x20000

/* subtract sizeof(struct image_header) */
#define CONFIG_SYS_UBOOT_BASE			(0x70000 - 0x40)

#define CONFIG_SPL_TARGET			"u-boot-with-spl.bin"
#define CONFIG_SPL_MAX_FOOTPRINT		0x10000
#define CONFIG_SPL_MAX_SIZE			0x10000
#define CONFIG_SPL_BSS_MAX_SIZE			0x2000

#define CONFIG_SPL_PAD_TO			0x20000

#endif /* __CONFIG_UNIPHIER_COMMON_H__ */
Commit	Line	Data
5894ca00	1	/*
e8a92932 MY	2	* Copyright (C) 2012-2015 Panasonic Corporation
	3	* Copyright (C) 2015-2016 Socionext Inc.
	4	* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5894ca00 MY	5	*
	6	* SPDX-License-Identifier: GPL-2.0+
	7	*/
	8
a187559e	9	/* U-Boot - Common settings for UniPhier Family */
5894ca00 MY	10
	11	#ifndef __CONFIG_UNIPHIER_COMMON_H__
	12	#define __CONFIG_UNIPHIER_COMMON_H__
	13
928f3248	14	#define CONFIG_ARMV7_PSCI_1_0
e8a92932	15
5894ca00 MY	16	/*-----------------------------------------------------------------------
	17	* MMU and Cache Setting
	18	----------------------------------------------------------------------/
	19
	20	/* Comment out the following to enable L1 cache */
	21	/* #define CONFIG_SYS_ICACHE_OFF */
	22	/* #define CONFIG_SYS_DCACHE_OFF */
	23
5894ca00 MY	24	#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
	25
	26	#define CONFIG_TIMESTAMP
	27
	28	/* FLASH related */
	29	#define CONFIG_MTD_DEVICE
	30
f1d9a9ed MY	31	#define CONFIG_SMC911X_32_BIT
	32	/* dummy: referenced by examples/standalone/smc911x_eeprom.c */
	33	#define CONFIG_SMC911X_BASE 0
	34
	35	#ifdef CONFIG_MICRO_SUPPORT_CARD
	36	#define CONFIG_SMC911X
f4c93a4f	37	#endif
5894ca00 MY	38
	39	#define CONFIG_FLASH_CFI_DRIVER
	40	#define CONFIG_SYS_FLASH_CFI
	41
	42	#define CONFIG_SYS_MAX_FLASH_SECT 256
	43	#define CONFIG_SYS_MONITOR_BASE 0
d085ecd6	44	#define CONFIG_SYS_MONITOR_LEN 0x00080000 /* 512KB */
5894ca00 MY	45	#define CONFIG_SYS_FLASH_BASE 0
	46
	47	/*
66deb91e	48	* flash_toggle does not work for our support card.
5894ca00 MY	49	* We need to use flash_status_poll.
	50	*/
	51	#define CONFIG_SYS_CFI_FLASH_STATUS_POLL
	52
	53	#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
	54
9879842c	55	#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
5894ca00 MY	56
5894ca00 MY	57	/* serial console configuration */
5894ca00	58
5894ca00 MY	59	#define CONFIG_SYS_LONGHELP /* undef to save memory */
	60
	61	#define CONFIG_CMDLINE_EDITING /* add command line history */
5894ca00	62	#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
5894ca00 MY	63	#define CONFIG_SYS_MAXARGS 16 /* max number of command */
	64	/* Boot Argument Buffer Size */
	65	#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
	66
	67	#define CONFIG_CONS_INDEX 1
	68
0b93e3de	69	#define CONFIG_ENV_OFFSET 0x100000
5894ca00	70	#define CONFIG_ENV_SIZE 0x2000
5894ca00 MY	71	/* #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */
5894ca00 MY	72
aa8a9348 MY	73	#define CONFIG_SYS_MMC_ENV_DEV 0
	74	#define CONFIG_SYS_MMC_ENV_PART 1
	75
ee8d037c	76	#if !defined(CONFIG_ARM64)
5894ca00 MY	77	/* Time clock 1MHz */
5894ca00 MY	78	#define CONFIG_SYS_TIMER_RATE 1000000
9d0c2ceb MY	79	#endif
9d0c2ceb MY	80
5894ca00	81	#define CONFIG_SYS_MAX_NAND_DEVICE 1
5894ca00 MY	82	#define CONFIG_SYS_NAND_ONFI_DETECTION
	83
	84	#define CONFIG_NAND_DENALI_ECC_SIZE 1024
	85
	86	#define CONFIG_SYS_NAND_REGS_BASE 0x68100000
	87	#define CONFIG_SYS_NAND_DATA_BASE 0x68000000
	88
5894ca00 MY	89	#define CONFIG_SYS_NAND_USE_FLASH_BBT
	90	#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
	91
4aceb3f8	92	/* SD/MMC */
a55d9fee	93	#define CONFIG_SUPPORT_EMMC_BOOT
4aceb3f8	94
5894ca00 MY	95	/* memtest works on */
	96	#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
	97	#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01000000)
	98
5894ca00 MY	99	/*
	100	* Network Configuration
	101	*/
5894ca00 MY	102	#define CONFIG_SERVERIP 192.168.11.1
	103	#define CONFIG_IPADDR 192.168.11.10
	104	#define CONFIG_GATEWAYIP 192.168.11.1
	105	#define CONFIG_NETMASK 255.255.255.0
	106
	107	#define CONFIG_LOADADDR 0x84000000
	108	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
5894ca00 MY	109
	110	#define CONFIG_CMDLINE_EDITING /* add command line history */
	111
ee8d037c	112	#if defined(CONFIG_ARM64)
b7b43036 MY	113	/* ARM Trusted Firmware */
b7b43036 MY	114	#define BOOT_IMAGES \
7728f0c6	115	"second_image=unph_bl.bin\0" \
b7b43036 MY	116	"third_image=fip.bin\0"
	117	#else
	118	#define BOOT_IMAGES \
	119	"second_image=u-boot-spl.bin\0" \
	120	"third_image=u-boot.bin\0"
	121	#endif
	122
5894ca00 MY	123	#define CONFIG_BOOTCOMMAND "run $bootmode"
	124
	125	#define CONFIG_ROOTPATH "/nfs/root/path"
	126	#define CONFIG_NFSBOOTCOMMAND \
	127	"setenv bootargs $bootargs root=/dev/nfs rw " \
	128	"nfsroot=$serverip:$rootpath " \
	129	"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \
d566f754	130	"run __nfsboot"
5894ca00	131
421376ae MY	132	#ifdef CONFIG_FIT
	133	#define CONFIG_BOOTFILE "fitImage"
	134	#define LINUXBOOT_ENV_SETTINGS \
	135	"fit_addr=0x00100000\0" \
	136	"fit_addr_r=0x84100000\0" \
	137	"fit_size=0x00f00000\0" \
5451b777	138	"norboot=setexpr fit_addr $nor_base + $fit_addr &&" \
421376ae	139	"bootm $fit_addr\0" \
5451b777	140	"nandboot=nand read $fit_addr_r $fit_addr $fit_size &&" \
e037db0c	141	"bootm $fit_addr_r\0" \
5451b777	142	"tftpboot=tftpboot $fit_addr_r $bootfile &&" \
d566f754 MY	143	"bootm $fit_addr_r\0" \
d566f754 MY	144	"__nfsboot=run tftpboot\0"
421376ae	145	#else
9d0c2ceb	146	#ifdef CONFIG_ARM64
99b85170	147	#define CONFIG_BOOTFILE "Image.gz"
9d0c2ceb	148	#define LINUXBOOT_CMD "booti"
99b85170	149	#define KERNEL_ADDR_LOAD "kernel_addr_load=0x84200000\0"
edee114a	150	#define KERNEL_ADDR_R "kernel_addr_r=0x82080000\0"
9d0c2ceb	151	#else
89835b35	152	#define CONFIG_BOOTFILE "zImage"
9d0c2ceb	153	#define LINUXBOOT_CMD "bootz"
99b85170	154	#define KERNEL_ADDR_LOAD "kernel_addr_load=0x80208000\0"
9d0c2ceb	155	#define KERNEL_ADDR_R "kernel_addr_r=0x80208000\0"
9d0c2ceb	156	#endif
421376ae MY	157	#define LINUXBOOT_ENV_SETTINGS \
	158	"fdt_addr=0x00100000\0" \
	159	"fdt_addr_r=0x84100000\0" \
	160	"fdt_size=0x00008000\0" \
	161	"kernel_addr=0x00200000\0" \
99b85170	162	KERNEL_ADDR_LOAD \
9d0c2ceb	163	KERNEL_ADDR_R \
99b85170 MY	164	"kernel_size=0x00800000\0" \
99b85170 MY	165	"ramdisk_addr=0x00a00000\0" \
421376ae MY	166	"ramdisk_addr_r=0x84a00000\0" \
421376ae MY	167	"ramdisk_size=0x00600000\0" \
e037db0c	168	"ramdisk_file=rootfs.cpio.uboot\0" \
99b85170 MY	169	"boot_common=setexpr bootm_low $kernel_addr_r '&' fe000000 && " \
	170	"if test $kernel_addr_load = $kernel_addr_r; then " \
	171	"true; " \
	172	"else " \
	173	"unzip $kernel_addr_load $kernel_addr_r; " \
	174	"fi && " \
9d0c2ceb	175	LINUXBOOT_CMD " $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \
99b85170 MY	176	"norboot=setexpr kernel_addr_nor $nor_base + $kernel_addr && " \
	177	"setexpr kernel_size_div4 $kernel_size / 4 && " \
	178	"cp $kernel_addr_nor $kernel_addr_load $kernel_size_div4 && " \
c0df1faf MY	179	"setexpr ramdisk_addr_nor $nor_base + $ramdisk_addr && " \
	180	"setexpr ramdisk_size_div4 $ramdisk_size / 4 && " \
	181	"cp $ramdisk_addr_nor $ramdisk_addr_r $ramdisk_size_div4 && " \
	182	"setexpr fdt_addr_nor $nor_base + $fdt_addr && " \
	183	"setexpr fdt_size_div4 $fdt_size / 4 && " \
	184	"cp $fdt_addr_nor $fdt_addr_r $fdt_size_div4 && " \
cd5d9565	185	"run boot_common\0" \
99b85170	186	"nandboot=nand read $kernel_addr_load $kernel_addr $kernel_size && " \
421376ae MY	187	"nand read $ramdisk_addr_r $ramdisk_addr $ramdisk_size &&" \
421376ae MY	188	"nand read $fdt_addr_r $fdt_addr $fdt_size &&" \
cd5d9565	189	"run boot_common\0" \
99b85170	190	"tftpboot=tftpboot $kernel_addr_load $bootfile && " \
e037db0c MY	191	"tftpboot $ramdisk_addr_r $ramdisk_file &&" \
e037db0c MY	192	"tftpboot $fdt_addr_r $fdt_file &&" \
d566f754	193	"run boot_common\0" \
99b85170	194	"__nfsboot=tftpboot $kernel_addr_load $bootfile && " \
d566f754 MY	195	"tftpboot $fdt_addr_r $fdt_file &&" \
d566f754 MY	196	"setenv ramdisk_addr_r - &&" \
cd5d9565	197	"run boot_common\0"
421376ae MY	198	#endif
	199
	200	#define CONFIG_EXTRA_ENV_SETTINGS \
	201	"netdev=eth0\0" \
	202	"verify=n\0" \
c0df1faf	203	"initrd_high=0xffffffffffffffff\0" \
90a6e929	204	"nor_base=0x42000000\0" \
61a4f5bd	205	"sramupdate=setexpr tmp_addr $nor_base + 0x50000 &&" \
b7b43036	206	"tftpboot $tmp_addr $second_image && " \
c0efc314	207	"setexpr tmp_addr $nor_base + 0x70000 && " \
b7b43036	208	"tftpboot $tmp_addr $third_image\0" \
c231c436 MY	209	"emmcupdate=mmcsetn &&" \
c231c436 MY	210	"mmc partconf $mmc_first_dev 0 1 1 &&" \
b7b43036	211	"tftpboot $second_image && " \
c0efc314	212	"mmc write $loadaddr 0 100 && " \
b7b43036	213	"tftpboot $third_image && " \
c0efc314	214	"mmc write $loadaddr 100 700\0" \
421376ae	215	"nandupdate=nand erase 0 0x00100000 &&" \
b7b43036	216	"tftpboot $second_image && " \
c0efc314	217	"nand write $loadaddr 0 0x00020000 && " \
b7b43036	218	"tftpboot $third_image && " \
c0efc314	219	"nand write $loadaddr 0x00020000 0x000e0000\0" \
8d3064d9 MY	220	"usbupdate=usb start &&" \
	221	"tftpboot $second_image && " \
	222	"usb write $loadaddr 0 100 && " \
	223	"tftpboot $third_image && " \
	224	"usb write $loadaddr 100 700\0" \
b7b43036	225	BOOT_IMAGES \
421376ae	226	LINUXBOOT_ENV_SETTINGS
5894ca00	227
17bd4a21 MY	228	#define CONFIG_SYS_BOOTMAPSZ 0x20000000
17bd4a21 MY	229
cf88affa	230	#define CONFIG_SYS_SDRAM_BASE 0x80000000
3e9952be	231	#define CONFIG_NR_DRAM_BANKS 3
23869698 MY	232	/* for LD20; the last 64 byte is used for dynamic DDR PHY training */
23869698 MY	233	#define CONFIG_SYS_MEM_TOP_HIDE 64
5894ca00	234
3e0cfaa0 MY	235	#define CONFIG_PANIC_HANG
	236
	237	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE)
	238
	239	/* only for SPL */
00aa453e	240	#if defined(CONFIG_ARCH_UNIPHIER_LD4) \|\| \
ea65c980	241	defined(CONFIG_ARCH_UNIPHIER_SLD8)
f5d0b9b2	242	#define CONFIG_SPL_TEXT_BASE 0x00040000
323d1f9d	243	#else
f5d0b9b2 MY	244	#define CONFIG_SPL_TEXT_BASE 0x00100000
	245	#endif
	246
755c7d9a	247	#define CONFIG_SPL_STACK (0x00100000)
a286039b	248
5894ca00	249	#define CONFIG_SPL_FRAMEWORK
5894ca00	250
c0efc314	251	#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
cbbc2d80	252
d085ecd6	253	/* subtract sizeof(struct image_header) */
c0efc314	254	#define CONFIG_SYS_UBOOT_BASE (0x70000 - 0x40)
5894ca00	255
d085ecd6	256	#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
6a3cffe8	257	#define CONFIG_SPL_MAX_FOOTPRINT 0x10000
86c3345a	258	#define CONFIG_SPL_MAX_SIZE 0x10000
9d0c2ceb	259	#define CONFIG_SPL_BSS_MAX_SIZE 0x2000
6a3cffe8	260
c0efc314 MY	261	#define CONFIG_SPL_PAD_TO 0x20000
c0efc314 MY	262
5894ca00	263	#endif /* __CONFIG_UNIPHIER_COMMON_H__ */