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f22651cf MS |
1 | /* |
2 | * (C) Copyright 2012 Michal Simek <monstr@monstr.eu> | |
06fe8dae JT |
3 | * (C) Copyright 2013 Xilinx, Inc. |
4 | * | |
5 | * Common configuration options for all Zynq boards. | |
f22651cf | 6 | * |
1a459660 | 7 | * SPDX-License-Identifier: GPL-2.0+ |
f22651cf MS |
8 | */ |
9 | ||
06fe8dae JT |
10 | #ifndef __CONFIG_ZYNQ_COMMON_H |
11 | #define __CONFIG_ZYNQ_COMMON_H | |
f22651cf | 12 | |
f22651cf | 13 | /* CPU clock */ |
53e49f74 JT |
14 | #ifndef CONFIG_CPU_FREQ_HZ |
15 | # define CONFIG_CPU_FREQ_HZ 800000000 | |
16 | #endif | |
f22651cf | 17 | |
8cfac504 | 18 | /* Cache options */ |
8cfac504 JT |
19 | #define CONFIG_SYS_L2CACHE_OFF |
20 | #ifndef CONFIG_SYS_L2CACHE_OFF | |
21 | # define CONFIG_SYS_L2_PL310 | |
22 | # define CONFIG_SYS_PL310_BASE 0xf8f02000 | |
23 | #endif | |
24 | ||
a2ec7fb9 MS |
25 | #define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600 |
26 | #define CONFIG_SYS_TIMERBASE ZYNQ_SCUTIMER_BASEADDR | |
27 | #define CONFIG_SYS_TIMER_COUNTS_DOWN | |
28 | #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4) | |
29 | ||
53e49f74 JT |
30 | /* Serial drivers */ |
31 | #define CONFIG_BAUDRATE 115200 | |
f22651cf MS |
32 | /* The following table includes the supported baudrates */ |
33 | #define CONFIG_SYS_BAUDRATE_TABLE \ | |
34 | {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} | |
35 | ||
636ac181 MS |
36 | #define CONFIG_ARM_DCC |
37 | #define CONFIG_ZYNQ_SERIAL | |
53e49f74 | 38 | |
f22651cf | 39 | /* Ethernet driver */ |
596e5782 | 40 | #if defined(CONFIG_ZYNQ_GEM) |
88fcfb1c JT |
41 | # define CONFIG_MII |
42 | # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN | |
88fcfb1c | 43 | # define CONFIG_PHY_MARVELL |
9ec2cf00 | 44 | # define CONFIG_PHY_REALTEK |
217185b3 | 45 | # define CONFIG_PHY_XILINX |
dd1c351f MS |
46 | # define CONFIG_BOOTP_SERVERIP |
47 | # define CONFIG_BOOTP_BOOTPATH | |
48 | # define CONFIG_BOOTP_GATEWAY | |
49 | # define CONFIG_BOOTP_HOSTNAME | |
50 | # define CONFIG_BOOTP_MAY_FAIL | |
88fcfb1c | 51 | #endif |
f22651cf | 52 | |
53e49f74 JT |
53 | /* SPI */ |
54 | #ifdef CONFIG_ZYNQ_SPI | |
53e49f74 JT |
55 | #endif |
56 | ||
a241d4ec JT |
57 | /* QSPI */ |
58 | #ifdef CONFIG_ZYNQ_QSPI | |
59 | # define CONFIG_SF_DEFAULT_SPEED 30000000 | |
232a8e4e | 60 | # define CONFIG_SPI_FLASH_ISSI |
a241d4ec JT |
61 | #endif |
62 | ||
fe5eddbf JT |
63 | /* NOR */ |
64 | #ifndef CONFIG_SYS_NO_FLASH | |
65 | # define CONFIG_SYS_FLASH_BASE 0xE2000000 | |
66 | # define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024) | |
67 | # define CONFIG_SYS_MAX_FLASH_BANKS 1 | |
68 | # define CONFIG_SYS_MAX_FLASH_SECT 512 | |
69 | # define CONFIG_SYS_FLASH_ERASE_TOUT 1000 | |
70 | # define CONFIG_SYS_FLASH_WRITE_TOUT 5000 | |
71 | # define CONFIG_FLASH_SHOW_PROGRESS 10 | |
72 | # define CONFIG_SYS_FLASH_CFI | |
73 | # undef CONFIG_SYS_FLASH_EMPTY_INFO | |
74 | # define CONFIG_FLASH_CFI_DRIVER | |
75 | # undef CONFIG_SYS_FLASH_PROTECTION | |
76 | # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE | |
77 | #endif | |
78 | ||
293eb33f | 79 | /* MMC */ |
ce0335f2 | 80 | #if defined(CONFIG_ZYNQ_SDHCI) |
293eb33f MS |
81 | # define CONFIG_MMC |
82 | # define CONFIG_GENERIC_MMC | |
83 | # define CONFIG_SDHCI | |
f3bd7280 | 84 | # define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000 |
293eb33f MS |
85 | #endif |
86 | ||
2cdc778b | 87 | #ifdef CONFIG_USB_EHCI_ZYNQ |
c6024c8e SDPP |
88 | # define CONFIG_EHCI_IS_TDI |
89 | # define CONFIG_USB_MAX_CONTROLLER_COUNT 2 | |
87f3dbdf | 90 | |
87f3dbdf SDPP |
91 | # define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x600000 |
92 | # define DFU_DEFAULT_POLL_TIMEOUT 300 | |
87f3dbdf | 93 | # define CONFIG_USB_CABLE_CHECK |
c4fa5114 | 94 | # define CONFIG_CMD_THOR_DOWNLOAD |
1e8d3830 | 95 | # define CONFIG_THOR_RESET_OFF |
01acd6ab | 96 | # define CONFIG_USB_FUNCTION_THOR |
87f3dbdf SDPP |
97 | # define DFU_ALT_INFO_RAM \ |
98 | "dfu_ram_info=" \ | |
99 | "set dfu_alt_info " \ | |
100 | "${kernel_image} ram 0x3000000 0x500000\\\\;" \ | |
101 | "${devicetree_image} ram 0x2A00000 0x20000\\\\;" \ | |
102 | "${ramdisk_image} ram 0x2000000 0x600000\0" \ | |
c4fa5114 SDPP |
103 | "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \ |
104 | "thor_ram=run dfu_ram_info && thordown 0 ram 0\0" | |
87f3dbdf | 105 | |
ce0335f2 | 106 | # if defined(CONFIG_ZYNQ_SDHCI) |
87f3dbdf SDPP |
107 | # define DFU_ALT_INFO_MMC \ |
108 | "dfu_mmc_info=" \ | |
109 | "set dfu_alt_info " \ | |
110 | "${kernel_image} fat 0 1\\\\;" \ | |
111 | "${devicetree_image} fat 0 1\\\\;" \ | |
112 | "${ramdisk_image} fat 0 1\0" \ | |
c4fa5114 SDPP |
113 | "dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \ |
114 | "thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0" | |
115 | ||
87f3dbdf SDPP |
116 | # define DFU_ALT_INFO \ |
117 | DFU_ALT_INFO_RAM \ | |
118 | DFU_ALT_INFO_MMC | |
119 | # else | |
120 | # define DFU_ALT_INFO \ | |
121 | DFU_ALT_INFO_RAM | |
122 | # endif | |
123 | #endif | |
124 | ||
125 | #if !defined(DFU_ALT_INFO) | |
126 | # define DFU_ALT_INFO | |
c6024c8e SDPP |
127 | #endif |
128 | ||
47b35a51 | 129 | #if defined(CONFIG_ZYNQ_SDHCI) || defined(CONFIG_ZYNQ_USB) |
293eb33f | 130 | # define CONFIG_SUPPORT_VFAT |
47b35a51 | 131 | # define CONFIG_FAT_WRITE |
293eb33f MS |
132 | # define CONFIG_DOS_PARTITION |
133 | #endif | |
134 | ||
1c3f2c72 | 135 | #if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1) |
18948632 | 136 | #define CONFIG_SYS_I2C_ZYNQ |
1c3f2c72 SDPP |
137 | #endif |
138 | ||
8934f784 | 139 | /* I2C */ |
18948632 | 140 | #if defined(CONFIG_SYS_I2C_ZYNQ) |
0bdffe71 | 141 | # define CONFIG_SYS_I2C |
0bdffe71 | 142 | # define CONFIG_SYS_I2C_ZYNQ_SPEED 100000 |
18948632 | 143 | # define CONFIG_SYS_I2C_ZYNQ_SLAVE 0 |
8934f784 MS |
144 | #endif |
145 | ||
65da1efd JT |
146 | /* EEPROM */ |
147 | #ifdef CONFIG_ZYNQ_EEPROM | |
148 | # define CONFIG_CMD_EEPROM | |
149 | # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 | |
150 | # define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 | |
151 | # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 | |
152 | # define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 | |
153 | # define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */ | |
154 | #endif | |
155 | ||
18eee22f JT |
156 | /* Total Size of Environment Sector */ |
157 | #define CONFIG_ENV_SIZE (128 << 10) | |
158 | ||
b660ca13 JT |
159 | /* Allow to overwrite serial and ethaddr */ |
160 | #define CONFIG_ENV_OVERWRITE | |
161 | ||
f22651cf | 162 | /* Environment */ |
ed53e4d6 JT |
163 | #ifndef CONFIG_ENV_IS_NOWHERE |
164 | # ifndef CONFIG_SYS_NO_FLASH | |
18c61e95 | 165 | /* Environment in NOR flash */ |
ed53e4d6 | 166 | # define CONFIG_ENV_IS_IN_FLASH |
18c61e95 MS |
167 | # elif defined(CONFIG_ZYNQ_QSPI) |
168 | /* Environment in Serial Flash */ | |
169 | # define CONFIG_ENV_IS_IN_SPI_FLASH | |
ed53e4d6 JT |
170 | # elif defined(CONFIG_SYS_NO_FLASH) |
171 | # define CONFIG_ENV_IS_NOWHERE | |
172 | # endif | |
173 | ||
174 | # define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE | |
175 | # define CONFIG_ENV_OFFSET 0xE0000 | |
ed53e4d6 | 176 | #endif |
e83f61a6 | 177 | |
4d1ed9c7 MS |
178 | /* enable preboot to be loaded before CONFIG_BOOTDELAY */ |
179 | #define CONFIG_PREBOOT | |
180 | ||
e83f61a6 | 181 | /* Default environment */ |
b7b3efe7 | 182 | #ifndef CONFIG_EXTRA_ENV_SETTINGS |
e83f61a6 JT |
183 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
184 | "fit_image=fit.itb\0" \ | |
185 | "load_addr=0x2000000\0" \ | |
186 | "fit_size=0x800000\0" \ | |
187 | "flash_off=0x100000\0" \ | |
188 | "nor_flash_off=0xE2100000\0" \ | |
189 | "fdt_high=0x20000000\0" \ | |
190 | "initrd_high=0x20000000\0" \ | |
4d1ed9c7 MS |
191 | "loadbootenv_addr=0x2000000\0" \ |
192 | "bootenv=uEnv.txt\0" \ | |
193 | "bootenv_dev=mmc\0" \ | |
194 | "loadbootenv=load ${bootenv_dev} 0 ${loadbootenv_addr} ${bootenv}\0" \ | |
195 | "importbootenv=echo Importing environment from ${bootenv_dev} ...; " \ | |
196 | "env import -t ${loadbootenv_addr} $filesize\0" \ | |
197 | "bootenv_existence_test=test -e ${bootenv_dev} 0 /${bootenv}\0" \ | |
198 | "setbootenv=if env run bootenv_existence_test; then " \ | |
199 | "if env run loadbootenv; then " \ | |
200 | "env run importbootenv; " \ | |
201 | "fi; " \ | |
202 | "fi; \0" \ | |
203 | "sd_loadbootenv=set bootenv_dev mmc && " \ | |
204 | "run setbootenv \0" \ | |
205 | "usb_loadbootenv=set bootenv_dev usb && usb start && run setbootenv \0" \ | |
206 | "preboot=if test $modeboot = sdboot; then " \ | |
207 | "run sd_loadbootenv; " \ | |
208 | "echo Checking if uenvcmd is set ...; " \ | |
209 | "if test -n $uenvcmd; then " \ | |
210 | "echo Running uenvcmd ...; " \ | |
211 | "run uenvcmd; " \ | |
212 | "fi; " \ | |
213 | "fi; \0" \ | |
e83f61a6 JT |
214 | "norboot=echo Copying FIT from NOR flash to RAM... && " \ |
215 | "cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \ | |
216 | "bootm ${load_addr}\0" \ | |
217 | "sdboot=echo Copying FIT from SD to RAM... && " \ | |
e9d69c1c | 218 | "load mmc 0 ${load_addr} ${fit_image} && " \ |
e83f61a6 JT |
219 | "bootm ${load_addr}\0" \ |
220 | "jtagboot=echo TFTPing FIT to RAM... && " \ | |
dfa94058 | 221 | "tftpboot ${load_addr} ${fit_image} && " \ |
c6024c8e SDPP |
222 | "bootm ${load_addr}\0" \ |
223 | "usbboot=if usb start; then " \ | |
224 | "echo Copying FIT from USB to RAM... && " \ | |
e9d69c1c | 225 | "load usb 0 ${load_addr} ${fit_image} && " \ |
39bc1a8c | 226 | "bootm ${load_addr}; fi\0" \ |
87f3dbdf | 227 | DFU_ALT_INFO |
b7b3efe7 | 228 | #endif |
c6024c8e | 229 | |
e83f61a6 | 230 | #define CONFIG_BOOTCOMMAND "run $modeboot" |
e83f61a6 | 231 | #define CONFIG_SYS_LOAD_ADDR 0 /* default? */ |
f22651cf | 232 | |
36e0e197 | 233 | /* Miscellaneous configurable options */ |
36e0e197 JT |
234 | |
235 | #define CONFIG_CMDLINE_EDITING | |
236 | #define CONFIG_AUTO_COMPLETE | |
b3de9249 | 237 | #define CONFIG_BOARD_LATE_INIT |
36e0e197 | 238 | #define CONFIG_SYS_LONGHELP |
6c3e61de | 239 | #define CONFIG_CLOCKS |
d6c9bbaa | 240 | #define CONFIG_CMD_CLK |
841426ad | 241 | #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ |
36e0e197 JT |
242 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
243 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ | |
f22651cf MS |
244 | sizeof(CONFIG_SYS_PROMPT) + 16) |
245 | ||
7cd04192 | 246 | /* Physical Memory map */ |
0f5c2156 | 247 | #define CONFIG_SYS_TEXT_BASE 0x4000000 |
f22651cf | 248 | |
758f29d0 MS |
249 | #ifndef CONFIG_NR_DRAM_BANKS |
250 | # define CONFIG_NR_DRAM_BANKS 1 | |
251 | #endif | |
7cd04192 | 252 | |
c1584e2a MS |
253 | #define CONFIG_SYS_MEMTEST_START 0 |
254 | #define CONFIG_SYS_MEMTEST_END 0x1000 | |
7cd04192 | 255 | |
599807fc | 256 | #define CONFIG_SYS_MALLOC_LEN 0x1400000 |
c1584e2a MS |
257 | |
258 | #define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000 | |
259 | #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 | |
7cd04192 JT |
260 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ |
261 | CONFIG_SYS_INIT_RAM_SIZE - \ | |
262 | GENERATED_GBL_DATA_SIZE) | |
53e49f74 JT |
263 | |
264 | /* Enable the PL to be downloaded */ | |
265 | #define CONFIG_FPGA | |
266 | #define CONFIG_FPGA_XILINX | |
267 | #define CONFIG_FPGA_ZYNQPL | |
64e809af | 268 | #define CONFIG_CMD_FPGA_LOADMK |
26ea9ce5 MS |
269 | #define CONFIG_CMD_FPGA_LOADP |
270 | #define CONFIG_CMD_FPGA_LOADBP | |
1a897668 | 271 | #define CONFIG_CMD_FPGA_LOADFS |
53e49f74 | 272 | |
53e49f74 | 273 | /* FIT support */ |
21d29f7f | 274 | #define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */ |
f22651cf | 275 | |
f8f36c5d | 276 | /* FDT support */ |
f8f36c5d JT |
277 | #define CONFIG_DISPLAY_BOARDINFO_LATE |
278 | ||
ae9f4899 | 279 | /* Extend size of kernel image for uncompression */ |
3d456eec | 280 | #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) |
ae9f4899 | 281 | |
09ed635b | 282 | /* Boot FreeBSD/vxWorks from an ELF image */ |
d82d63cc | 283 | #define CONFIG_SYS_MMC_MAX_DEVICE 1 |
09ed635b | 284 | |
0107f240 | 285 | #define CONFIG_SYS_LDSCRIPT "arch/arm/mach-zynq/u-boot.lds" |
38716189 | 286 | |
f22651cf | 287 | /* Commands */ |
f22651cf | 288 | |
d7e269cf | 289 | /* SPL part */ |
d7e269cf MS |
290 | #define CONFIG_CMD_SPL |
291 | #define CONFIG_SPL_FRAMEWORK | |
1540fb72 | 292 | #define CONFIG_SPL_BOARD_INIT |
70bdf2f6 | 293 | #define CONFIG_SPL_RAM_DEVICE |
d7e269cf | 294 | |
0107f240 | 295 | #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-zynq/u-boot-spl.lds" |
d7e269cf | 296 | |
d7e269cf | 297 | /* MMC support */ |
ce0335f2 | 298 | #ifdef CONFIG_ZYNQ_SDHCI |
d7e269cf MS |
299 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ |
300 | #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ | |
e2ccdf89 | 301 | #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 |
7f307d93 | 302 | #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" |
0dfbcf02 MY |
303 | #endif |
304 | ||
305 | /* Disable dcache for SPL just for sure */ | |
306 | #ifdef CONFIG_SPL_BUILD | |
307 | #define CONFIG_SYS_DCACHE_OFF | |
308 | #undef CONFIG_FPGA | |
d7e269cf MS |
309 | #endif |
310 | ||
311 | /* Address in RAM where the parameters must be copied by SPL. */ | |
312 | #define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000 | |
313 | ||
205b4f33 GG |
314 | #define CONFIG_SPL_FS_LOAD_ARGS_NAME "system.dtb" |
315 | #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" | |
d7e269cf MS |
316 | |
317 | /* Not using MMC raw mode - just for compilation purpose */ | |
318 | #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 | |
319 | #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 | |
320 | #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 | |
321 | ||
322 | /* qspi mode is working fine */ | |
323 | #ifdef CONFIG_ZYNQ_QSPI | |
d7e269cf | 324 | #define CONFIG_SPL_SPI_LOAD |
d7e269cf | 325 | #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000 |
8e0e01d3 SDPP |
326 | #define CONFIG_SYS_SPI_ARGS_OFFS 0x200000 |
327 | #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000 | |
328 | #define CONFIG_SYS_SPI_KERNEL_OFFS (CONFIG_SYS_SPI_ARGS_OFFS + \ | |
329 | CONFIG_SYS_SPI_ARGS_SIZE) | |
d7e269cf MS |
330 | #endif |
331 | ||
332 | /* for booting directly linux */ | |
333 | #define CONFIG_SPL_OS_BOOT | |
334 | ||
335 | /* SP location before relocation, must use scratch RAM */ | |
336 | #define CONFIG_SPL_TEXT_BASE 0x0 | |
337 | ||
338 | /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */ | |
339 | #define CONFIG_SPL_MAX_SIZE 0x30000 | |
340 | ||
341 | /* The highest 64k OCM address */ | |
342 | #define OCM_HIGH_ADDR 0xffff0000 | |
343 | ||
d7e269cf | 344 | /* On the top of OCM space */ |
83b6464d | 345 | #define CONFIG_SYS_SPL_MALLOC_START OCM_HIGH_ADDR |
ec016a17 | 346 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000 |
d7e269cf | 347 | |
83b6464d MS |
348 | /* |
349 | * SPL stack position - and stack goes down | |
350 | * 0xfffffe00 is used for putting wfi loop. | |
351 | * Set it up as limit for now. | |
352 | */ | |
353 | #define CONFIG_SPL_STACK 0xfffffe00 | |
354 | ||
d7e269cf MS |
355 | /* BSS setup */ |
356 | #define CONFIG_SPL_BSS_START_ADDR 0x100000 | |
357 | #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 | |
358 | ||
359 | #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE | |
f22651cf | 360 | |
06fe8dae | 361 | #endif /* __CONFIG_ZYNQ_COMMON_H */ |