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Commit | Line | Data |
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f22651cf MS |
1 | /* |
2 | * (C) Copyright 2012 Michal Simek <monstr@monstr.eu> | |
06fe8dae JT |
3 | * (C) Copyright 2013 Xilinx, Inc. |
4 | * | |
5 | * Common configuration options for all Zynq boards. | |
f22651cf | 6 | * |
1a459660 | 7 | * SPDX-License-Identifier: GPL-2.0+ |
f22651cf MS |
8 | */ |
9 | ||
06fe8dae JT |
10 | #ifndef __CONFIG_ZYNQ_COMMON_H |
11 | #define __CONFIG_ZYNQ_COMMON_H | |
f22651cf | 12 | |
f22651cf | 13 | /* CPU clock */ |
53e49f74 JT |
14 | #ifndef CONFIG_CPU_FREQ_HZ |
15 | # define CONFIG_CPU_FREQ_HZ 800000000 | |
16 | #endif | |
f22651cf | 17 | |
8cfac504 | 18 | /* Cache options */ |
8cfac504 JT |
19 | #define CONFIG_SYS_L2CACHE_OFF |
20 | #ifndef CONFIG_SYS_L2CACHE_OFF | |
21 | # define CONFIG_SYS_L2_PL310 | |
22 | # define CONFIG_SYS_PL310_BASE 0xf8f02000 | |
23 | #endif | |
24 | ||
a2ec7fb9 MS |
25 | #define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600 |
26 | #define CONFIG_SYS_TIMERBASE ZYNQ_SCUTIMER_BASEADDR | |
27 | #define CONFIG_SYS_TIMER_COUNTS_DOWN | |
28 | #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4) | |
29 | ||
53e49f74 JT |
30 | /* Serial drivers */ |
31 | #define CONFIG_BAUDRATE 115200 | |
f22651cf MS |
32 | /* The following table includes the supported baudrates */ |
33 | #define CONFIG_SYS_BAUDRATE_TABLE \ | |
34 | {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} | |
35 | ||
636ac181 MS |
36 | #define CONFIG_ARM_DCC |
37 | #define CONFIG_ZYNQ_SERIAL | |
53e49f74 | 38 | |
f22651cf | 39 | /* Ethernet driver */ |
596e5782 | 40 | #if defined(CONFIG_ZYNQ_GEM) |
88fcfb1c JT |
41 | # define CONFIG_MII |
42 | # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN | |
88fcfb1c | 43 | # define CONFIG_PHY_MARVELL |
9ec2cf00 | 44 | # define CONFIG_PHY_REALTEK |
217185b3 | 45 | # define CONFIG_PHY_XILINX |
dd1c351f MS |
46 | # define CONFIG_BOOTP_BOOTPATH |
47 | # define CONFIG_BOOTP_GATEWAY | |
48 | # define CONFIG_BOOTP_HOSTNAME | |
49 | # define CONFIG_BOOTP_MAY_FAIL | |
88fcfb1c | 50 | #endif |
f22651cf | 51 | |
53e49f74 JT |
52 | /* SPI */ |
53 | #ifdef CONFIG_ZYNQ_SPI | |
53e49f74 JT |
54 | #endif |
55 | ||
a241d4ec JT |
56 | /* QSPI */ |
57 | #ifdef CONFIG_ZYNQ_QSPI | |
58 | # define CONFIG_SF_DEFAULT_SPEED 30000000 | |
232a8e4e | 59 | # define CONFIG_SPI_FLASH_ISSI |
a241d4ec JT |
60 | #endif |
61 | ||
fe5eddbf | 62 | /* NOR */ |
e856bdcf | 63 | #ifdef CONFIG_MTD_NOR_FLASH |
fe5eddbf JT |
64 | # define CONFIG_SYS_FLASH_BASE 0xE2000000 |
65 | # define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024) | |
66 | # define CONFIG_SYS_MAX_FLASH_BANKS 1 | |
67 | # define CONFIG_SYS_MAX_FLASH_SECT 512 | |
68 | # define CONFIG_SYS_FLASH_ERASE_TOUT 1000 | |
69 | # define CONFIG_SYS_FLASH_WRITE_TOUT 5000 | |
70 | # define CONFIG_FLASH_SHOW_PROGRESS 10 | |
71 | # define CONFIG_SYS_FLASH_CFI | |
72 | # undef CONFIG_SYS_FLASH_EMPTY_INFO | |
73 | # define CONFIG_FLASH_CFI_DRIVER | |
74 | # undef CONFIG_SYS_FLASH_PROTECTION | |
75 | # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE | |
76 | #endif | |
77 | ||
ba8adb26 SDPP |
78 | #ifdef CONFIG_NAND_ZYNQ |
79 | #define CONFIG_CMD_NAND_LOCK_UNLOCK | |
80 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
81 | #define CONFIG_SYS_NAND_ONFI_DETECTION | |
82 | #define CONFIG_MTD_DEVICE | |
83 | #endif | |
84 | ||
293eb33f | 85 | /* MMC */ |
08aa0334 | 86 | #if defined(CONFIG_MMC_SDHCI_ZYNQ) |
f3bd7280 | 87 | # define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000 |
293eb33f MS |
88 | #endif |
89 | ||
2cdc778b | 90 | #ifdef CONFIG_USB_EHCI_ZYNQ |
c6024c8e | 91 | # define CONFIG_EHCI_IS_TDI |
87f3dbdf | 92 | |
87f3dbdf SDPP |
93 | # define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x600000 |
94 | # define DFU_DEFAULT_POLL_TIMEOUT 300 | |
87f3dbdf | 95 | # define CONFIG_USB_CABLE_CHECK |
c4fa5114 | 96 | # define CONFIG_CMD_THOR_DOWNLOAD |
1e8d3830 | 97 | # define CONFIG_THOR_RESET_OFF |
01acd6ab | 98 | # define CONFIG_USB_FUNCTION_THOR |
87f3dbdf SDPP |
99 | # define DFU_ALT_INFO_RAM \ |
100 | "dfu_ram_info=" \ | |
101 | "set dfu_alt_info " \ | |
102 | "${kernel_image} ram 0x3000000 0x500000\\\\;" \ | |
103 | "${devicetree_image} ram 0x2A00000 0x20000\\\\;" \ | |
104 | "${ramdisk_image} ram 0x2000000 0x600000\0" \ | |
c4fa5114 SDPP |
105 | "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \ |
106 | "thor_ram=run dfu_ram_info && thordown 0 ram 0\0" | |
87f3dbdf | 107 | |
08aa0334 | 108 | # if defined(CONFIG_MMC_SDHCI_ZYNQ) |
87f3dbdf SDPP |
109 | # define DFU_ALT_INFO_MMC \ |
110 | "dfu_mmc_info=" \ | |
111 | "set dfu_alt_info " \ | |
112 | "${kernel_image} fat 0 1\\\\;" \ | |
113 | "${devicetree_image} fat 0 1\\\\;" \ | |
114 | "${ramdisk_image} fat 0 1\0" \ | |
c4fa5114 SDPP |
115 | "dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \ |
116 | "thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0" | |
117 | ||
87f3dbdf SDPP |
118 | # define DFU_ALT_INFO \ |
119 | DFU_ALT_INFO_RAM \ | |
120 | DFU_ALT_INFO_MMC | |
121 | # else | |
122 | # define DFU_ALT_INFO \ | |
123 | DFU_ALT_INFO_RAM | |
124 | # endif | |
125 | #endif | |
126 | ||
127 | #if !defined(DFU_ALT_INFO) | |
128 | # define DFU_ALT_INFO | |
c6024c8e SDPP |
129 | #endif |
130 | ||
08aa0334 | 131 | #if defined(CONFIG_MMC_SDHCI_ZYNQ) || defined(CONFIG_ZYNQ_USB) |
293eb33f | 132 | # define CONFIG_SUPPORT_VFAT |
47b35a51 | 133 | # define CONFIG_FAT_WRITE |
293eb33f MS |
134 | #endif |
135 | ||
1c3f2c72 | 136 | #if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1) |
18948632 | 137 | #define CONFIG_SYS_I2C_ZYNQ |
1c3f2c72 SDPP |
138 | #endif |
139 | ||
8934f784 | 140 | /* I2C */ |
18948632 | 141 | #if defined(CONFIG_SYS_I2C_ZYNQ) |
0bdffe71 | 142 | # define CONFIG_SYS_I2C |
0bdffe71 | 143 | # define CONFIG_SYS_I2C_ZYNQ_SPEED 100000 |
18948632 | 144 | # define CONFIG_SYS_I2C_ZYNQ_SLAVE 0 |
8934f784 MS |
145 | #endif |
146 | ||
65da1efd JT |
147 | /* EEPROM */ |
148 | #ifdef CONFIG_ZYNQ_EEPROM | |
149 | # define CONFIG_CMD_EEPROM | |
150 | # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 | |
151 | # define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 | |
152 | # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 | |
153 | # define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 | |
154 | # define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */ | |
155 | #endif | |
156 | ||
18eee22f JT |
157 | /* Total Size of Environment Sector */ |
158 | #define CONFIG_ENV_SIZE (128 << 10) | |
159 | ||
b660ca13 JT |
160 | /* Allow to overwrite serial and ethaddr */ |
161 | #define CONFIG_ENV_OVERWRITE | |
162 | ||
f22651cf | 163 | /* Environment */ |
ed53e4d6 | 164 | #ifndef CONFIG_ENV_IS_NOWHERE |
e856bdcf | 165 | # ifdef CONFIG_MTD_NOR_FLASH |
18c61e95 | 166 | /* Environment in NOR flash */ |
ed53e4d6 | 167 | # define CONFIG_ENV_IS_IN_FLASH |
18c61e95 MS |
168 | # elif defined(CONFIG_ZYNQ_QSPI) |
169 | /* Environment in Serial Flash */ | |
170 | # define CONFIG_ENV_IS_IN_SPI_FLASH | |
e856bdcf | 171 | # elif !defined(CONFIG_MTD_NOR_FLASH) |
ed53e4d6 JT |
172 | # define CONFIG_ENV_IS_NOWHERE |
173 | # endif | |
174 | ||
175 | # define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE | |
176 | # define CONFIG_ENV_OFFSET 0xE0000 | |
ed53e4d6 | 177 | #endif |
e83f61a6 | 178 | |
4d1ed9c7 MS |
179 | /* enable preboot to be loaded before CONFIG_BOOTDELAY */ |
180 | #define CONFIG_PREBOOT | |
181 | ||
e83f61a6 | 182 | /* Default environment */ |
b7b3efe7 | 183 | #ifndef CONFIG_EXTRA_ENV_SETTINGS |
e83f61a6 JT |
184 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
185 | "fit_image=fit.itb\0" \ | |
186 | "load_addr=0x2000000\0" \ | |
187 | "fit_size=0x800000\0" \ | |
188 | "flash_off=0x100000\0" \ | |
189 | "nor_flash_off=0xE2100000\0" \ | |
190 | "fdt_high=0x20000000\0" \ | |
191 | "initrd_high=0x20000000\0" \ | |
4d1ed9c7 MS |
192 | "loadbootenv_addr=0x2000000\0" \ |
193 | "bootenv=uEnv.txt\0" \ | |
194 | "bootenv_dev=mmc\0" \ | |
195 | "loadbootenv=load ${bootenv_dev} 0 ${loadbootenv_addr} ${bootenv}\0" \ | |
196 | "importbootenv=echo Importing environment from ${bootenv_dev} ...; " \ | |
197 | "env import -t ${loadbootenv_addr} $filesize\0" \ | |
198 | "bootenv_existence_test=test -e ${bootenv_dev} 0 /${bootenv}\0" \ | |
199 | "setbootenv=if env run bootenv_existence_test; then " \ | |
200 | "if env run loadbootenv; then " \ | |
201 | "env run importbootenv; " \ | |
202 | "fi; " \ | |
203 | "fi; \0" \ | |
204 | "sd_loadbootenv=set bootenv_dev mmc && " \ | |
205 | "run setbootenv \0" \ | |
206 | "usb_loadbootenv=set bootenv_dev usb && usb start && run setbootenv \0" \ | |
207 | "preboot=if test $modeboot = sdboot; then " \ | |
208 | "run sd_loadbootenv; " \ | |
209 | "echo Checking if uenvcmd is set ...; " \ | |
210 | "if test -n $uenvcmd; then " \ | |
211 | "echo Running uenvcmd ...; " \ | |
212 | "run uenvcmd; " \ | |
213 | "fi; " \ | |
214 | "fi; \0" \ | |
e83f61a6 JT |
215 | "norboot=echo Copying FIT from NOR flash to RAM... && " \ |
216 | "cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \ | |
217 | "bootm ${load_addr}\0" \ | |
218 | "sdboot=echo Copying FIT from SD to RAM... && " \ | |
e9d69c1c | 219 | "load mmc 0 ${load_addr} ${fit_image} && " \ |
e83f61a6 JT |
220 | "bootm ${load_addr}\0" \ |
221 | "jtagboot=echo TFTPing FIT to RAM... && " \ | |
dfa94058 | 222 | "tftpboot ${load_addr} ${fit_image} && " \ |
c6024c8e SDPP |
223 | "bootm ${load_addr}\0" \ |
224 | "usbboot=if usb start; then " \ | |
225 | "echo Copying FIT from USB to RAM... && " \ | |
e9d69c1c | 226 | "load usb 0 ${load_addr} ${fit_image} && " \ |
39bc1a8c | 227 | "bootm ${load_addr}; fi\0" \ |
87f3dbdf | 228 | DFU_ALT_INFO |
b7b3efe7 | 229 | #endif |
c6024c8e | 230 | |
e83f61a6 | 231 | #define CONFIG_BOOTCOMMAND "run $modeboot" |
e83f61a6 | 232 | #define CONFIG_SYS_LOAD_ADDR 0 /* default? */ |
f22651cf | 233 | |
36e0e197 | 234 | /* Miscellaneous configurable options */ |
36e0e197 JT |
235 | |
236 | #define CONFIG_CMDLINE_EDITING | |
237 | #define CONFIG_AUTO_COMPLETE | |
238 | #define CONFIG_SYS_LONGHELP | |
6c3e61de | 239 | #define CONFIG_CLOCKS |
d6c9bbaa | 240 | #define CONFIG_CMD_CLK |
841426ad | 241 | #define CONFIG_SYS_MAXARGS 32 /* max number of command args */ |
36e0e197 JT |
242 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
243 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ | |
f22651cf MS |
244 | sizeof(CONFIG_SYS_PROMPT) + 16) |
245 | ||
758f29d0 MS |
246 | #ifndef CONFIG_NR_DRAM_BANKS |
247 | # define CONFIG_NR_DRAM_BANKS 1 | |
248 | #endif | |
7cd04192 | 249 | |
c1584e2a MS |
250 | #define CONFIG_SYS_MEMTEST_START 0 |
251 | #define CONFIG_SYS_MEMTEST_END 0x1000 | |
7cd04192 | 252 | |
599807fc | 253 | #define CONFIG_SYS_MALLOC_LEN 0x1400000 |
c1584e2a MS |
254 | |
255 | #define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000 | |
256 | #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 | |
7cd04192 JT |
257 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ |
258 | CONFIG_SYS_INIT_RAM_SIZE - \ | |
259 | GENERATED_GBL_DATA_SIZE) | |
53e49f74 JT |
260 | |
261 | /* Enable the PL to be downloaded */ | |
262 | #define CONFIG_FPGA | |
263 | #define CONFIG_FPGA_XILINX | |
264 | #define CONFIG_FPGA_ZYNQPL | |
64e809af | 265 | #define CONFIG_CMD_FPGA_LOADMK |
26ea9ce5 MS |
266 | #define CONFIG_CMD_FPGA_LOADP |
267 | #define CONFIG_CMD_FPGA_LOADBP | |
1a897668 | 268 | #define CONFIG_CMD_FPGA_LOADFS |
53e49f74 | 269 | |
53e49f74 | 270 | /* FIT support */ |
21d29f7f | 271 | #define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */ |
f22651cf | 272 | |
f8f36c5d | 273 | /* FDT support */ |
f8f36c5d JT |
274 | #define CONFIG_DISPLAY_BOARDINFO_LATE |
275 | ||
ae9f4899 | 276 | /* Extend size of kernel image for uncompression */ |
3d456eec | 277 | #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024) |
ae9f4899 | 278 | |
09ed635b | 279 | /* Boot FreeBSD/vxWorks from an ELF image */ |
d82d63cc | 280 | #define CONFIG_SYS_MMC_MAX_DEVICE 1 |
09ed635b | 281 | |
0107f240 | 282 | #define CONFIG_SYS_LDSCRIPT "arch/arm/mach-zynq/u-boot.lds" |
38716189 | 283 | |
f22651cf | 284 | /* Commands */ |
f22651cf | 285 | |
d7e269cf | 286 | /* SPL part */ |
d7e269cf MS |
287 | #define CONFIG_CMD_SPL |
288 | #define CONFIG_SPL_FRAMEWORK | |
1540fb72 | 289 | #define CONFIG_SPL_BOARD_INIT |
d7e269cf | 290 | |
0107f240 | 291 | #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-zynq/u-boot-spl.lds" |
d7e269cf | 292 | |
d7e269cf | 293 | /* MMC support */ |
08aa0334 | 294 | #ifdef CONFIG_MMC_SDHCI_ZYNQ |
e2ccdf89 | 295 | #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 |
7f307d93 | 296 | #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" |
0dfbcf02 MY |
297 | #endif |
298 | ||
299 | /* Disable dcache for SPL just for sure */ | |
300 | #ifdef CONFIG_SPL_BUILD | |
301 | #define CONFIG_SYS_DCACHE_OFF | |
302 | #undef CONFIG_FPGA | |
d7e269cf MS |
303 | #endif |
304 | ||
305 | /* Address in RAM where the parameters must be copied by SPL. */ | |
306 | #define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000 | |
307 | ||
205b4f33 GG |
308 | #define CONFIG_SPL_FS_LOAD_ARGS_NAME "system.dtb" |
309 | #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" | |
d7e269cf MS |
310 | |
311 | /* Not using MMC raw mode - just for compilation purpose */ | |
312 | #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 | |
313 | #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 | |
314 | #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 | |
315 | ||
316 | /* qspi mode is working fine */ | |
317 | #ifdef CONFIG_ZYNQ_QSPI | |
d7e269cf | 318 | #define CONFIG_SPL_SPI_LOAD |
d7e269cf | 319 | #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000 |
8e0e01d3 SDPP |
320 | #define CONFIG_SYS_SPI_ARGS_OFFS 0x200000 |
321 | #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000 | |
322 | #define CONFIG_SYS_SPI_KERNEL_OFFS (CONFIG_SYS_SPI_ARGS_OFFS + \ | |
323 | CONFIG_SYS_SPI_ARGS_SIZE) | |
d7e269cf MS |
324 | #endif |
325 | ||
326 | /* for booting directly linux */ | |
d7e269cf MS |
327 | |
328 | /* SP location before relocation, must use scratch RAM */ | |
329 | #define CONFIG_SPL_TEXT_BASE 0x0 | |
330 | ||
331 | /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */ | |
332 | #define CONFIG_SPL_MAX_SIZE 0x30000 | |
333 | ||
334 | /* The highest 64k OCM address */ | |
335 | #define OCM_HIGH_ADDR 0xffff0000 | |
336 | ||
d7e269cf | 337 | /* On the top of OCM space */ |
83b6464d | 338 | #define CONFIG_SYS_SPL_MALLOC_START OCM_HIGH_ADDR |
ec016a17 | 339 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000 |
d7e269cf | 340 | |
83b6464d MS |
341 | /* |
342 | * SPL stack position - and stack goes down | |
343 | * 0xfffffe00 is used for putting wfi loop. | |
344 | * Set it up as limit for now. | |
345 | */ | |
346 | #define CONFIG_SPL_STACK 0xfffffe00 | |
347 | ||
d7e269cf MS |
348 | /* BSS setup */ |
349 | #define CONFIG_SPL_BSS_START_ADDR 0x100000 | |
350 | #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 | |
351 | ||
352 | #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE | |
f22651cf | 353 | |
06fe8dae | 354 | #endif /* __CONFIG_ZYNQ_COMMON_H */ |