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272cc70b AF |
1 | /* |
2 | * Copyright 2008, Freescale Semiconductor, Inc | |
3 | * Andy Fleming | |
4 | * | |
5 | * Based vaguely on the Linux code | |
6 | * | |
7 | * See file CREDITS for list of people who contributed to this | |
8 | * project. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License as | |
12 | * published by the Free Software Foundation; either version 2 of | |
13 | * the License, or (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
23 | * MA 02111-1307 USA | |
24 | */ | |
25 | ||
26 | #include <config.h> | |
27 | #include <common.h> | |
28 | #include <command.h> | |
29 | #include <mmc.h> | |
30 | #include <part.h> | |
31 | #include <malloc.h> | |
32 | #include <linux/list.h> | |
9b1f942c | 33 | #include <div64.h> |
272cc70b | 34 | |
ce0fbcd2 MW |
35 | /* Set block count limit because of 16 bit register limit on some hardware*/ |
36 | #ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT | |
37 | #define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535 | |
38 | #endif | |
39 | ||
272cc70b AF |
40 | static struct list_head mmc_devices; |
41 | static int cur_dev_num = -1; | |
42 | ||
d23d8d7e NK |
43 | int __weak board_mmc_getwp(struct mmc *mmc) |
44 | { | |
45 | return -1; | |
46 | } | |
47 | ||
48 | int mmc_getwp(struct mmc *mmc) | |
49 | { | |
50 | int wp; | |
51 | ||
52 | wp = board_mmc_getwp(mmc); | |
53 | ||
d4e1da4e PK |
54 | if (wp < 0) { |
55 | if (mmc->getwp) | |
56 | wp = mmc->getwp(mmc); | |
57 | else | |
58 | wp = 0; | |
59 | } | |
d23d8d7e NK |
60 | |
61 | return wp; | |
62 | } | |
63 | ||
314284b1 | 64 | int __board_mmc_getcd(struct mmc *mmc) { |
11fdade2 SB |
65 | return -1; |
66 | } | |
67 | ||
314284b1 | 68 | int board_mmc_getcd(struct mmc *mmc)__attribute__((weak, |
11fdade2 SB |
69 | alias("__board_mmc_getcd"))); |
70 | ||
fdbb873e KP |
71 | static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, |
72 | struct mmc_data *data) | |
272cc70b | 73 | { |
8635ff9e | 74 | struct mmc_data backup; |
5db2fe3a | 75 | int ret; |
8635ff9e MV |
76 | |
77 | memset(&backup, 0, sizeof(backup)); | |
78 | ||
8635ff9e | 79 | #ifdef CONFIG_MMC_TRACE |
5db2fe3a RR |
80 | int i; |
81 | u8 *ptr; | |
82 | ||
83 | printf("CMD_SEND:%d\n", cmd->cmdidx); | |
84 | printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg); | |
5db2fe3a RR |
85 | ret = mmc->send_cmd(mmc, cmd, data); |
86 | switch (cmd->resp_type) { | |
87 | case MMC_RSP_NONE: | |
88 | printf("\t\tMMC_RSP_NONE\n"); | |
89 | break; | |
90 | case MMC_RSP_R1: | |
91 | printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n", | |
92 | cmd->response[0]); | |
93 | break; | |
94 | case MMC_RSP_R1b: | |
95 | printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n", | |
96 | cmd->response[0]); | |
97 | break; | |
98 | case MMC_RSP_R2: | |
99 | printf("\t\tMMC_RSP_R2\t\t 0x%08X \n", | |
100 | cmd->response[0]); | |
101 | printf("\t\t \t\t 0x%08X \n", | |
102 | cmd->response[1]); | |
103 | printf("\t\t \t\t 0x%08X \n", | |
104 | cmd->response[2]); | |
105 | printf("\t\t \t\t 0x%08X \n", | |
106 | cmd->response[3]); | |
107 | printf("\n"); | |
108 | printf("\t\t\t\t\tDUMPING DATA\n"); | |
109 | for (i = 0; i < 4; i++) { | |
110 | int j; | |
111 | printf("\t\t\t\t\t%03d - ", i*4); | |
146bec79 | 112 | ptr = (u8 *)&cmd->response[i]; |
5db2fe3a RR |
113 | ptr += 3; |
114 | for (j = 0; j < 4; j++) | |
115 | printf("%02X ", *ptr--); | |
116 | printf("\n"); | |
117 | } | |
118 | break; | |
119 | case MMC_RSP_R3: | |
120 | printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n", | |
121 | cmd->response[0]); | |
122 | break; | |
123 | default: | |
124 | printf("\t\tERROR MMC rsp not supported\n"); | |
125 | break; | |
126 | } | |
5db2fe3a | 127 | #else |
8635ff9e | 128 | ret = mmc->send_cmd(mmc, cmd, data); |
5db2fe3a | 129 | #endif |
8635ff9e | 130 | return ret; |
272cc70b AF |
131 | } |
132 | ||
fdbb873e | 133 | static int mmc_send_status(struct mmc *mmc, int timeout) |
5d4fc8d9 RR |
134 | { |
135 | struct mmc_cmd cmd; | |
d617c426 | 136 | int err, retries = 5; |
5d4fc8d9 RR |
137 | #ifdef CONFIG_MMC_TRACE |
138 | int status; | |
139 | #endif | |
140 | ||
141 | cmd.cmdidx = MMC_CMD_SEND_STATUS; | |
142 | cmd.resp_type = MMC_RSP_R1; | |
aaf3d41a MV |
143 | if (!mmc_host_is_spi(mmc)) |
144 | cmd.cmdarg = mmc->rca << 16; | |
5d4fc8d9 RR |
145 | |
146 | do { | |
147 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
d617c426 JK |
148 | if (!err) { |
149 | if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) && | |
150 | (cmd.response[0] & MMC_STATUS_CURR_STATE) != | |
151 | MMC_STATE_PRG) | |
152 | break; | |
153 | else if (cmd.response[0] & MMC_STATUS_MASK) { | |
154 | printf("Status Error: 0x%08X\n", | |
155 | cmd.response[0]); | |
156 | return COMM_ERR; | |
157 | } | |
158 | } else if (--retries < 0) | |
5d4fc8d9 | 159 | return err; |
5d4fc8d9 RR |
160 | |
161 | udelay(1000); | |
162 | ||
5d4fc8d9 RR |
163 | } while (timeout--); |
164 | ||
5db2fe3a RR |
165 | #ifdef CONFIG_MMC_TRACE |
166 | status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9; | |
167 | printf("CURR STATE:%d\n", status); | |
168 | #endif | |
5b0c942f | 169 | if (timeout <= 0) { |
5d4fc8d9 RR |
170 | printf("Timeout waiting card ready\n"); |
171 | return TIMEOUT; | |
172 | } | |
173 | ||
174 | return 0; | |
175 | } | |
176 | ||
fdbb873e | 177 | static int mmc_set_blocklen(struct mmc *mmc, int len) |
272cc70b AF |
178 | { |
179 | struct mmc_cmd cmd; | |
180 | ||
181 | cmd.cmdidx = MMC_CMD_SET_BLOCKLEN; | |
182 | cmd.resp_type = MMC_RSP_R1; | |
183 | cmd.cmdarg = len; | |
272cc70b AF |
184 | |
185 | return mmc_send_cmd(mmc, &cmd, NULL); | |
186 | } | |
187 | ||
188 | struct mmc *find_mmc_device(int dev_num) | |
189 | { | |
190 | struct mmc *m; | |
191 | struct list_head *entry; | |
192 | ||
193 | list_for_each(entry, &mmc_devices) { | |
194 | m = list_entry(entry, struct mmc, link); | |
195 | ||
196 | if (m->block_dev.dev == dev_num) | |
197 | return m; | |
198 | } | |
199 | ||
200 | printf("MMC Device %d not found\n", dev_num); | |
201 | ||
202 | return NULL; | |
203 | } | |
204 | ||
e6f99a56 LW |
205 | static ulong mmc_erase_t(struct mmc *mmc, ulong start, lbaint_t blkcnt) |
206 | { | |
207 | struct mmc_cmd cmd; | |
208 | ulong end; | |
209 | int err, start_cmd, end_cmd; | |
210 | ||
211 | if (mmc->high_capacity) | |
212 | end = start + blkcnt - 1; | |
213 | else { | |
214 | end = (start + blkcnt - 1) * mmc->write_bl_len; | |
215 | start *= mmc->write_bl_len; | |
216 | } | |
217 | ||
218 | if (IS_SD(mmc)) { | |
219 | start_cmd = SD_CMD_ERASE_WR_BLK_START; | |
220 | end_cmd = SD_CMD_ERASE_WR_BLK_END; | |
221 | } else { | |
222 | start_cmd = MMC_CMD_ERASE_GROUP_START; | |
223 | end_cmd = MMC_CMD_ERASE_GROUP_END; | |
224 | } | |
225 | ||
226 | cmd.cmdidx = start_cmd; | |
227 | cmd.cmdarg = start; | |
228 | cmd.resp_type = MMC_RSP_R1; | |
e6f99a56 LW |
229 | |
230 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
231 | if (err) | |
232 | goto err_out; | |
233 | ||
234 | cmd.cmdidx = end_cmd; | |
235 | cmd.cmdarg = end; | |
236 | ||
237 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
238 | if (err) | |
239 | goto err_out; | |
240 | ||
241 | cmd.cmdidx = MMC_CMD_ERASE; | |
242 | cmd.cmdarg = SECURE_ERASE; | |
243 | cmd.resp_type = MMC_RSP_R1b; | |
244 | ||
245 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
246 | if (err) | |
247 | goto err_out; | |
248 | ||
249 | return 0; | |
250 | ||
251 | err_out: | |
252 | puts("mmc erase failed\n"); | |
253 | return err; | |
254 | } | |
255 | ||
256 | static unsigned long | |
257 | mmc_berase(int dev_num, unsigned long start, lbaint_t blkcnt) | |
258 | { | |
259 | int err = 0; | |
260 | struct mmc *mmc = find_mmc_device(dev_num); | |
261 | lbaint_t blk = 0, blk_r = 0; | |
d2d8afae | 262 | int timeout = 1000; |
e6f99a56 LW |
263 | |
264 | if (!mmc) | |
265 | return -1; | |
266 | ||
267 | if ((start % mmc->erase_grp_size) || (blkcnt % mmc->erase_grp_size)) | |
268 | printf("\n\nCaution! Your devices Erase group is 0x%x\n" | |
269 | "The erase range would be change to 0x%lx~0x%lx\n\n", | |
270 | mmc->erase_grp_size, start & ~(mmc->erase_grp_size - 1), | |
271 | ((start + blkcnt + mmc->erase_grp_size) | |
272 | & ~(mmc->erase_grp_size - 1)) - 1); | |
273 | ||
274 | while (blk < blkcnt) { | |
275 | blk_r = ((blkcnt - blk) > mmc->erase_grp_size) ? | |
276 | mmc->erase_grp_size : (blkcnt - blk); | |
277 | err = mmc_erase_t(mmc, start + blk, blk_r); | |
278 | if (err) | |
279 | break; | |
280 | ||
281 | blk += blk_r; | |
d2d8afae JH |
282 | |
283 | /* Waiting for the ready status */ | |
284 | if (mmc_send_status(mmc, timeout)) | |
285 | return 0; | |
e6f99a56 LW |
286 | } |
287 | ||
288 | return blk; | |
289 | } | |
290 | ||
272cc70b | 291 | static ulong |
0158126e | 292 | mmc_write_blocks(struct mmc *mmc, ulong start, lbaint_t blkcnt, const void*src) |
272cc70b AF |
293 | { |
294 | struct mmc_cmd cmd; | |
295 | struct mmc_data data; | |
5d4fc8d9 | 296 | int timeout = 1000; |
272cc70b | 297 | |
d2bf29e3 | 298 | if ((start + blkcnt) > mmc->block_dev.lba) { |
def412b6 | 299 | printf("MMC: block number 0x%lx exceeds max(0x%lx)\n", |
d2bf29e3 LW |
300 | start + blkcnt, mmc->block_dev.lba); |
301 | return 0; | |
302 | } | |
272cc70b AF |
303 | |
304 | if (blkcnt > 1) | |
305 | cmd.cmdidx = MMC_CMD_WRITE_MULTIPLE_BLOCK; | |
306 | else | |
307 | cmd.cmdidx = MMC_CMD_WRITE_SINGLE_BLOCK; | |
308 | ||
309 | if (mmc->high_capacity) | |
310 | cmd.cmdarg = start; | |
311 | else | |
def412b6 | 312 | cmd.cmdarg = start * mmc->write_bl_len; |
272cc70b AF |
313 | |
314 | cmd.resp_type = MMC_RSP_R1; | |
272cc70b AF |
315 | |
316 | data.src = src; | |
317 | data.blocks = blkcnt; | |
def412b6 | 318 | data.blocksize = mmc->write_bl_len; |
272cc70b AF |
319 | data.flags = MMC_DATA_WRITE; |
320 | ||
def412b6 SS |
321 | if (mmc_send_cmd(mmc, &cmd, &data)) { |
322 | printf("mmc write failed\n"); | |
323 | return 0; | |
272cc70b AF |
324 | } |
325 | ||
d52ebf10 TC |
326 | /* SPI multiblock writes terminate using a special |
327 | * token, not a STOP_TRANSMISSION request. | |
328 | */ | |
329 | if (!mmc_host_is_spi(mmc) && blkcnt > 1) { | |
272cc70b AF |
330 | cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION; |
331 | cmd.cmdarg = 0; | |
332 | cmd.resp_type = MMC_RSP_R1b; | |
def412b6 SS |
333 | if (mmc_send_cmd(mmc, &cmd, NULL)) { |
334 | printf("mmc fail to send stop cmd\n"); | |
335 | return 0; | |
0158126e | 336 | } |
272cc70b AF |
337 | } |
338 | ||
93ad0d18 JK |
339 | /* Waiting for the ready status */ |
340 | if (mmc_send_status(mmc, timeout)) | |
341 | return 0; | |
342 | ||
272cc70b AF |
343 | return blkcnt; |
344 | } | |
345 | ||
0158126e LW |
346 | static ulong |
347 | mmc_bwrite(int dev_num, ulong start, lbaint_t blkcnt, const void*src) | |
348 | { | |
0158126e LW |
349 | lbaint_t cur, blocks_todo = blkcnt; |
350 | ||
def412b6 | 351 | struct mmc *mmc = find_mmc_device(dev_num); |
0158126e | 352 | if (!mmc) |
def412b6 | 353 | return 0; |
0158126e | 354 | |
def412b6 SS |
355 | if (mmc_set_blocklen(mmc, mmc->write_bl_len)) |
356 | return 0; | |
0158126e LW |
357 | |
358 | do { | |
8feafcc4 | 359 | cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo; |
0158126e | 360 | if(mmc_write_blocks(mmc, start, cur, src) != cur) |
def412b6 | 361 | return 0; |
0158126e LW |
362 | blocks_todo -= cur; |
363 | start += cur; | |
364 | src += cur * mmc->write_bl_len; | |
365 | } while (blocks_todo > 0); | |
366 | ||
367 | return blkcnt; | |
368 | } | |
369 | ||
fdbb873e KP |
370 | static int mmc_read_blocks(struct mmc *mmc, void *dst, ulong start, |
371 | lbaint_t blkcnt) | |
272cc70b AF |
372 | { |
373 | struct mmc_cmd cmd; | |
374 | struct mmc_data data; | |
375 | ||
4a1a06bc AS |
376 | if (blkcnt > 1) |
377 | cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK; | |
378 | else | |
379 | cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK; | |
272cc70b AF |
380 | |
381 | if (mmc->high_capacity) | |
4a1a06bc | 382 | cmd.cmdarg = start; |
272cc70b | 383 | else |
4a1a06bc | 384 | cmd.cmdarg = start * mmc->read_bl_len; |
272cc70b AF |
385 | |
386 | cmd.resp_type = MMC_RSP_R1; | |
272cc70b AF |
387 | |
388 | data.dest = dst; | |
4a1a06bc | 389 | data.blocks = blkcnt; |
272cc70b AF |
390 | data.blocksize = mmc->read_bl_len; |
391 | data.flags = MMC_DATA_READ; | |
392 | ||
4a1a06bc AS |
393 | if (mmc_send_cmd(mmc, &cmd, &data)) |
394 | return 0; | |
272cc70b | 395 | |
4a1a06bc AS |
396 | if (blkcnt > 1) { |
397 | cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION; | |
398 | cmd.cmdarg = 0; | |
399 | cmd.resp_type = MMC_RSP_R1b; | |
4a1a06bc AS |
400 | if (mmc_send_cmd(mmc, &cmd, NULL)) { |
401 | printf("mmc fail to send stop cmd\n"); | |
402 | return 0; | |
403 | } | |
272cc70b AF |
404 | } |
405 | ||
4a1a06bc | 406 | return blkcnt; |
272cc70b AF |
407 | } |
408 | ||
409 | static ulong mmc_bread(int dev_num, ulong start, lbaint_t blkcnt, void *dst) | |
410 | { | |
4a1a06bc AS |
411 | lbaint_t cur, blocks_todo = blkcnt; |
412 | ||
413 | if (blkcnt == 0) | |
414 | return 0; | |
272cc70b | 415 | |
4a1a06bc | 416 | struct mmc *mmc = find_mmc_device(dev_num); |
272cc70b AF |
417 | if (!mmc) |
418 | return 0; | |
419 | ||
d2bf29e3 | 420 | if ((start + blkcnt) > mmc->block_dev.lba) { |
4a1a06bc | 421 | printf("MMC: block number 0x%lx exceeds max(0x%lx)\n", |
d2bf29e3 LW |
422 | start + blkcnt, mmc->block_dev.lba); |
423 | return 0; | |
424 | } | |
272cc70b | 425 | |
4a1a06bc | 426 | if (mmc_set_blocklen(mmc, mmc->read_bl_len)) |
272cc70b | 427 | return 0; |
272cc70b | 428 | |
4a1a06bc | 429 | do { |
8feafcc4 | 430 | cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo; |
4a1a06bc AS |
431 | if(mmc_read_blocks(mmc, dst, start, cur) != cur) |
432 | return 0; | |
433 | blocks_todo -= cur; | |
434 | start += cur; | |
435 | dst += cur * mmc->read_bl_len; | |
436 | } while (blocks_todo > 0); | |
272cc70b AF |
437 | |
438 | return blkcnt; | |
439 | } | |
440 | ||
fdbb873e | 441 | static int mmc_go_idle(struct mmc *mmc) |
272cc70b AF |
442 | { |
443 | struct mmc_cmd cmd; | |
444 | int err; | |
445 | ||
446 | udelay(1000); | |
447 | ||
448 | cmd.cmdidx = MMC_CMD_GO_IDLE_STATE; | |
449 | cmd.cmdarg = 0; | |
450 | cmd.resp_type = MMC_RSP_NONE; | |
272cc70b AF |
451 | |
452 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
453 | ||
454 | if (err) | |
455 | return err; | |
456 | ||
457 | udelay(2000); | |
458 | ||
459 | return 0; | |
460 | } | |
461 | ||
fdbb873e | 462 | static int sd_send_op_cond(struct mmc *mmc) |
272cc70b AF |
463 | { |
464 | int timeout = 1000; | |
465 | int err; | |
466 | struct mmc_cmd cmd; | |
467 | ||
468 | do { | |
469 | cmd.cmdidx = MMC_CMD_APP_CMD; | |
470 | cmd.resp_type = MMC_RSP_R1; | |
471 | cmd.cmdarg = 0; | |
272cc70b AF |
472 | |
473 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
474 | ||
475 | if (err) | |
476 | return err; | |
477 | ||
478 | cmd.cmdidx = SD_CMD_APP_SEND_OP_COND; | |
479 | cmd.resp_type = MMC_RSP_R3; | |
250de12b SB |
480 | |
481 | /* | |
482 | * Most cards do not answer if some reserved bits | |
483 | * in the ocr are set. However, Some controller | |
484 | * can set bit 7 (reserved for low voltages), but | |
485 | * how to manage low voltages SD card is not yet | |
486 | * specified. | |
487 | */ | |
d52ebf10 TC |
488 | cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 : |
489 | (mmc->voltages & 0xff8000); | |
272cc70b AF |
490 | |
491 | if (mmc->version == SD_VERSION_2) | |
492 | cmd.cmdarg |= OCR_HCS; | |
493 | ||
494 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
495 | ||
496 | if (err) | |
497 | return err; | |
498 | ||
499 | udelay(1000); | |
500 | } while ((!(cmd.response[0] & OCR_BUSY)) && timeout--); | |
501 | ||
502 | if (timeout <= 0) | |
503 | return UNUSABLE_ERR; | |
504 | ||
505 | if (mmc->version != SD_VERSION_2) | |
506 | mmc->version = SD_VERSION_1_0; | |
507 | ||
d52ebf10 TC |
508 | if (mmc_host_is_spi(mmc)) { /* read OCR for spi */ |
509 | cmd.cmdidx = MMC_CMD_SPI_READ_OCR; | |
510 | cmd.resp_type = MMC_RSP_R3; | |
511 | cmd.cmdarg = 0; | |
d52ebf10 TC |
512 | |
513 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
514 | ||
515 | if (err) | |
516 | return err; | |
517 | } | |
518 | ||
998be3dd | 519 | mmc->ocr = cmd.response[0]; |
272cc70b AF |
520 | |
521 | mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS); | |
522 | mmc->rca = 0; | |
523 | ||
524 | return 0; | |
525 | } | |
526 | ||
fdbb873e | 527 | static int mmc_send_op_cond(struct mmc *mmc) |
272cc70b | 528 | { |
31cacbab | 529 | int timeout = 10000; |
272cc70b AF |
530 | struct mmc_cmd cmd; |
531 | int err; | |
532 | ||
533 | /* Some cards seem to need this */ | |
534 | mmc_go_idle(mmc); | |
535 | ||
31cacbab RR |
536 | /* Asking to the card its capabilities */ |
537 | cmd.cmdidx = MMC_CMD_SEND_OP_COND; | |
538 | cmd.resp_type = MMC_RSP_R3; | |
539 | cmd.cmdarg = 0; | |
cd6881b5 | 540 | |
31cacbab | 541 | err = mmc_send_cmd(mmc, &cmd, NULL); |
cd6881b5 | 542 | |
31cacbab RR |
543 | if (err) |
544 | return err; | |
cd6881b5 | 545 | |
31cacbab | 546 | udelay(1000); |
cd6881b5 | 547 | |
272cc70b AF |
548 | do { |
549 | cmd.cmdidx = MMC_CMD_SEND_OP_COND; | |
550 | cmd.resp_type = MMC_RSP_R3; | |
31cacbab RR |
551 | cmd.cmdarg = (mmc_host_is_spi(mmc) ? 0 : |
552 | (mmc->voltages & | |
553 | (cmd.response[0] & OCR_VOLTAGE_MASK)) | | |
554 | (cmd.response[0] & OCR_ACCESS_MODE)); | |
b1f1e821 ŁM |
555 | |
556 | if (mmc->host_caps & MMC_MODE_HC) | |
557 | cmd.cmdarg |= OCR_HCS; | |
558 | ||
272cc70b AF |
559 | err = mmc_send_cmd(mmc, &cmd, NULL); |
560 | ||
561 | if (err) | |
562 | return err; | |
563 | ||
564 | udelay(1000); | |
565 | } while (!(cmd.response[0] & OCR_BUSY) && timeout--); | |
566 | ||
567 | if (timeout <= 0) | |
568 | return UNUSABLE_ERR; | |
569 | ||
d52ebf10 TC |
570 | if (mmc_host_is_spi(mmc)) { /* read OCR for spi */ |
571 | cmd.cmdidx = MMC_CMD_SPI_READ_OCR; | |
572 | cmd.resp_type = MMC_RSP_R3; | |
573 | cmd.cmdarg = 0; | |
d52ebf10 TC |
574 | |
575 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
576 | ||
577 | if (err) | |
578 | return err; | |
579 | } | |
580 | ||
272cc70b | 581 | mmc->version = MMC_VERSION_UNKNOWN; |
998be3dd | 582 | mmc->ocr = cmd.response[0]; |
272cc70b AF |
583 | |
584 | mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS); | |
585 | mmc->rca = 0; | |
586 | ||
587 | return 0; | |
588 | } | |
589 | ||
590 | ||
fdbb873e | 591 | static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd) |
272cc70b AF |
592 | { |
593 | struct mmc_cmd cmd; | |
594 | struct mmc_data data; | |
595 | int err; | |
596 | ||
597 | /* Get the Card Status Register */ | |
598 | cmd.cmdidx = MMC_CMD_SEND_EXT_CSD; | |
599 | cmd.resp_type = MMC_RSP_R1; | |
600 | cmd.cmdarg = 0; | |
272cc70b | 601 | |
cdfd1ac6 | 602 | data.dest = (char *)ext_csd; |
272cc70b AF |
603 | data.blocks = 1; |
604 | data.blocksize = 512; | |
605 | data.flags = MMC_DATA_READ; | |
606 | ||
607 | err = mmc_send_cmd(mmc, &cmd, &data); | |
608 | ||
609 | return err; | |
610 | } | |
611 | ||
612 | ||
fdbb873e | 613 | static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value) |
272cc70b AF |
614 | { |
615 | struct mmc_cmd cmd; | |
5d4fc8d9 RR |
616 | int timeout = 1000; |
617 | int ret; | |
272cc70b AF |
618 | |
619 | cmd.cmdidx = MMC_CMD_SWITCH; | |
620 | cmd.resp_type = MMC_RSP_R1b; | |
621 | cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) | | |
5d4fc8d9 RR |
622 | (index << 16) | |
623 | (value << 8); | |
272cc70b | 624 | |
5d4fc8d9 RR |
625 | ret = mmc_send_cmd(mmc, &cmd, NULL); |
626 | ||
627 | /* Waiting for the ready status */ | |
93ad0d18 JK |
628 | if (!ret) |
629 | ret = mmc_send_status(mmc, timeout); | |
5d4fc8d9 RR |
630 | |
631 | return ret; | |
632 | ||
272cc70b AF |
633 | } |
634 | ||
fdbb873e | 635 | static int mmc_change_freq(struct mmc *mmc) |
272cc70b | 636 | { |
cdfd1ac6 | 637 | ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, 512); |
272cc70b AF |
638 | char cardtype; |
639 | int err; | |
640 | ||
641 | mmc->card_caps = 0; | |
642 | ||
d52ebf10 TC |
643 | if (mmc_host_is_spi(mmc)) |
644 | return 0; | |
645 | ||
272cc70b AF |
646 | /* Only version 4 supports high-speed */ |
647 | if (mmc->version < MMC_VERSION_4) | |
648 | return 0; | |
649 | ||
272cc70b AF |
650 | err = mmc_send_ext_csd(mmc, ext_csd); |
651 | ||
652 | if (err) | |
653 | return err; | |
654 | ||
0560db18 | 655 | cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf; |
272cc70b AF |
656 | |
657 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1); | |
658 | ||
659 | if (err) | |
660 | return err; | |
661 | ||
662 | /* Now check to see that it worked */ | |
663 | err = mmc_send_ext_csd(mmc, ext_csd); | |
664 | ||
665 | if (err) | |
666 | return err; | |
667 | ||
668 | /* No high-speed support */ | |
0560db18 | 669 | if (!ext_csd[EXT_CSD_HS_TIMING]) |
272cc70b AF |
670 | return 0; |
671 | ||
672 | /* High Speed is set, there are two types: 52MHz and 26MHz */ | |
673 | if (cardtype & MMC_HS_52MHZ) | |
674 | mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; | |
675 | else | |
676 | mmc->card_caps |= MMC_MODE_HS; | |
677 | ||
678 | return 0; | |
679 | } | |
680 | ||
bc897b1d LW |
681 | int mmc_switch_part(int dev_num, unsigned int part_num) |
682 | { | |
683 | struct mmc *mmc = find_mmc_device(dev_num); | |
684 | ||
685 | if (!mmc) | |
686 | return -1; | |
687 | ||
688 | return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF, | |
689 | (mmc->part_config & ~PART_ACCESS_MASK) | |
690 | | (part_num & PART_ACCESS_MASK)); | |
691 | } | |
692 | ||
48972d90 TR |
693 | int mmc_getcd(struct mmc *mmc) |
694 | { | |
695 | int cd; | |
696 | ||
697 | cd = board_mmc_getcd(mmc); | |
698 | ||
d4e1da4e PK |
699 | if (cd < 0) { |
700 | if (mmc->getcd) | |
701 | cd = mmc->getcd(mmc); | |
702 | else | |
703 | cd = 1; | |
704 | } | |
48972d90 TR |
705 | |
706 | return cd; | |
707 | } | |
708 | ||
fdbb873e | 709 | static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp) |
272cc70b AF |
710 | { |
711 | struct mmc_cmd cmd; | |
712 | struct mmc_data data; | |
713 | ||
714 | /* Switch the frequency */ | |
715 | cmd.cmdidx = SD_CMD_SWITCH_FUNC; | |
716 | cmd.resp_type = MMC_RSP_R1; | |
717 | cmd.cmdarg = (mode << 31) | 0xffffff; | |
718 | cmd.cmdarg &= ~(0xf << (group * 4)); | |
719 | cmd.cmdarg |= value << (group * 4); | |
272cc70b AF |
720 | |
721 | data.dest = (char *)resp; | |
722 | data.blocksize = 64; | |
723 | data.blocks = 1; | |
724 | data.flags = MMC_DATA_READ; | |
725 | ||
726 | return mmc_send_cmd(mmc, &cmd, &data); | |
727 | } | |
728 | ||
729 | ||
fdbb873e | 730 | static int sd_change_freq(struct mmc *mmc) |
272cc70b AF |
731 | { |
732 | int err; | |
733 | struct mmc_cmd cmd; | |
f781dd38 A |
734 | ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2); |
735 | ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16); | |
272cc70b AF |
736 | struct mmc_data data; |
737 | int timeout; | |
738 | ||
739 | mmc->card_caps = 0; | |
740 | ||
d52ebf10 TC |
741 | if (mmc_host_is_spi(mmc)) |
742 | return 0; | |
743 | ||
272cc70b AF |
744 | /* Read the SCR to find out if this card supports higher speeds */ |
745 | cmd.cmdidx = MMC_CMD_APP_CMD; | |
746 | cmd.resp_type = MMC_RSP_R1; | |
747 | cmd.cmdarg = mmc->rca << 16; | |
272cc70b AF |
748 | |
749 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
750 | ||
751 | if (err) | |
752 | return err; | |
753 | ||
754 | cmd.cmdidx = SD_CMD_APP_SEND_SCR; | |
755 | cmd.resp_type = MMC_RSP_R1; | |
756 | cmd.cmdarg = 0; | |
272cc70b AF |
757 | |
758 | timeout = 3; | |
759 | ||
760 | retry_scr: | |
f781dd38 | 761 | data.dest = (char *)scr; |
272cc70b AF |
762 | data.blocksize = 8; |
763 | data.blocks = 1; | |
764 | data.flags = MMC_DATA_READ; | |
765 | ||
766 | err = mmc_send_cmd(mmc, &cmd, &data); | |
767 | ||
768 | if (err) { | |
769 | if (timeout--) | |
770 | goto retry_scr; | |
771 | ||
772 | return err; | |
773 | } | |
774 | ||
4e3d89ba YK |
775 | mmc->scr[0] = __be32_to_cpu(scr[0]); |
776 | mmc->scr[1] = __be32_to_cpu(scr[1]); | |
272cc70b AF |
777 | |
778 | switch ((mmc->scr[0] >> 24) & 0xf) { | |
779 | case 0: | |
780 | mmc->version = SD_VERSION_1_0; | |
781 | break; | |
782 | case 1: | |
783 | mmc->version = SD_VERSION_1_10; | |
784 | break; | |
785 | case 2: | |
786 | mmc->version = SD_VERSION_2; | |
787 | break; | |
788 | default: | |
789 | mmc->version = SD_VERSION_1_0; | |
790 | break; | |
791 | } | |
792 | ||
b44c7083 AS |
793 | if (mmc->scr[0] & SD_DATA_4BIT) |
794 | mmc->card_caps |= MMC_MODE_4BIT; | |
795 | ||
272cc70b AF |
796 | /* Version 1.0 doesn't support switching */ |
797 | if (mmc->version == SD_VERSION_1_0) | |
798 | return 0; | |
799 | ||
800 | timeout = 4; | |
801 | while (timeout--) { | |
802 | err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1, | |
f781dd38 | 803 | (u8 *)switch_status); |
272cc70b AF |
804 | |
805 | if (err) | |
806 | return err; | |
807 | ||
808 | /* The high-speed function is busy. Try again */ | |
4e3d89ba | 809 | if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY)) |
272cc70b AF |
810 | break; |
811 | } | |
812 | ||
272cc70b | 813 | /* If high-speed isn't supported, we return */ |
4e3d89ba | 814 | if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED)) |
272cc70b AF |
815 | return 0; |
816 | ||
2c3fbf4c ML |
817 | /* |
818 | * If the host doesn't support SD_HIGHSPEED, do not switch card to | |
819 | * HIGHSPEED mode even if the card support SD_HIGHSPPED. | |
820 | * This can avoid furthur problem when the card runs in different | |
821 | * mode between the host. | |
822 | */ | |
823 | if (!((mmc->host_caps & MMC_MODE_HS_52MHz) && | |
824 | (mmc->host_caps & MMC_MODE_HS))) | |
825 | return 0; | |
826 | ||
f781dd38 | 827 | err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status); |
272cc70b AF |
828 | |
829 | if (err) | |
830 | return err; | |
831 | ||
4e3d89ba | 832 | if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000) |
272cc70b AF |
833 | mmc->card_caps |= MMC_MODE_HS; |
834 | ||
835 | return 0; | |
836 | } | |
837 | ||
838 | /* frequency bases */ | |
839 | /* divided by 10 to be nice to platforms without floating point */ | |
5f837c2c | 840 | static const int fbase[] = { |
272cc70b AF |
841 | 10000, |
842 | 100000, | |
843 | 1000000, | |
844 | 10000000, | |
845 | }; | |
846 | ||
847 | /* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice | |
848 | * to platforms without floating point. | |
849 | */ | |
5f837c2c | 850 | static const int multipliers[] = { |
272cc70b AF |
851 | 0, /* reserved */ |
852 | 10, | |
853 | 12, | |
854 | 13, | |
855 | 15, | |
856 | 20, | |
857 | 25, | |
858 | 30, | |
859 | 35, | |
860 | 40, | |
861 | 45, | |
862 | 50, | |
863 | 55, | |
864 | 60, | |
865 | 70, | |
866 | 80, | |
867 | }; | |
868 | ||
fdbb873e | 869 | static void mmc_set_ios(struct mmc *mmc) |
272cc70b AF |
870 | { |
871 | mmc->set_ios(mmc); | |
872 | } | |
873 | ||
874 | void mmc_set_clock(struct mmc *mmc, uint clock) | |
875 | { | |
876 | if (clock > mmc->f_max) | |
877 | clock = mmc->f_max; | |
878 | ||
879 | if (clock < mmc->f_min) | |
880 | clock = mmc->f_min; | |
881 | ||
882 | mmc->clock = clock; | |
883 | ||
884 | mmc_set_ios(mmc); | |
885 | } | |
886 | ||
fdbb873e | 887 | static void mmc_set_bus_width(struct mmc *mmc, uint width) |
272cc70b AF |
888 | { |
889 | mmc->bus_width = width; | |
890 | ||
891 | mmc_set_ios(mmc); | |
892 | } | |
893 | ||
fdbb873e | 894 | static int mmc_startup(struct mmc *mmc) |
272cc70b | 895 | { |
7798f6db | 896 | int err; |
272cc70b | 897 | uint mult, freq; |
639b7827 | 898 | u64 cmult, csize, capacity; |
272cc70b | 899 | struct mmc_cmd cmd; |
cdfd1ac6 YS |
900 | ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, 512); |
901 | ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, 512); | |
5d4fc8d9 | 902 | int timeout = 1000; |
272cc70b | 903 | |
d52ebf10 TC |
904 | #ifdef CONFIG_MMC_SPI_CRC_ON |
905 | if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */ | |
906 | cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF; | |
907 | cmd.resp_type = MMC_RSP_R1; | |
908 | cmd.cmdarg = 1; | |
d52ebf10 TC |
909 | err = mmc_send_cmd(mmc, &cmd, NULL); |
910 | ||
911 | if (err) | |
912 | return err; | |
913 | } | |
914 | #endif | |
915 | ||
272cc70b | 916 | /* Put the Card in Identify Mode */ |
d52ebf10 TC |
917 | cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID : |
918 | MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */ | |
272cc70b AF |
919 | cmd.resp_type = MMC_RSP_R2; |
920 | cmd.cmdarg = 0; | |
272cc70b AF |
921 | |
922 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
923 | ||
924 | if (err) | |
925 | return err; | |
926 | ||
927 | memcpy(mmc->cid, cmd.response, 16); | |
928 | ||
929 | /* | |
930 | * For MMC cards, set the Relative Address. | |
931 | * For SD cards, get the Relatvie Address. | |
932 | * This also puts the cards into Standby State | |
933 | */ | |
d52ebf10 TC |
934 | if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */ |
935 | cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR; | |
936 | cmd.cmdarg = mmc->rca << 16; | |
937 | cmd.resp_type = MMC_RSP_R6; | |
272cc70b | 938 | |
d52ebf10 | 939 | err = mmc_send_cmd(mmc, &cmd, NULL); |
272cc70b | 940 | |
d52ebf10 TC |
941 | if (err) |
942 | return err; | |
272cc70b | 943 | |
d52ebf10 TC |
944 | if (IS_SD(mmc)) |
945 | mmc->rca = (cmd.response[0] >> 16) & 0xffff; | |
946 | } | |
272cc70b AF |
947 | |
948 | /* Get the Card-Specific Data */ | |
949 | cmd.cmdidx = MMC_CMD_SEND_CSD; | |
950 | cmd.resp_type = MMC_RSP_R2; | |
951 | cmd.cmdarg = mmc->rca << 16; | |
272cc70b AF |
952 | |
953 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
954 | ||
5d4fc8d9 RR |
955 | /* Waiting for the ready status */ |
956 | mmc_send_status(mmc, timeout); | |
957 | ||
272cc70b AF |
958 | if (err) |
959 | return err; | |
960 | ||
998be3dd RV |
961 | mmc->csd[0] = cmd.response[0]; |
962 | mmc->csd[1] = cmd.response[1]; | |
963 | mmc->csd[2] = cmd.response[2]; | |
964 | mmc->csd[3] = cmd.response[3]; | |
272cc70b AF |
965 | |
966 | if (mmc->version == MMC_VERSION_UNKNOWN) { | |
0b453ffe | 967 | int version = (cmd.response[0] >> 26) & 0xf; |
272cc70b AF |
968 | |
969 | switch (version) { | |
970 | case 0: | |
971 | mmc->version = MMC_VERSION_1_2; | |
972 | break; | |
973 | case 1: | |
974 | mmc->version = MMC_VERSION_1_4; | |
975 | break; | |
976 | case 2: | |
977 | mmc->version = MMC_VERSION_2_2; | |
978 | break; | |
979 | case 3: | |
980 | mmc->version = MMC_VERSION_3; | |
981 | break; | |
982 | case 4: | |
983 | mmc->version = MMC_VERSION_4; | |
984 | break; | |
985 | default: | |
986 | mmc->version = MMC_VERSION_1_2; | |
987 | break; | |
988 | } | |
989 | } | |
990 | ||
991 | /* divide frequency by 10, since the mults are 10x bigger */ | |
0b453ffe RV |
992 | freq = fbase[(cmd.response[0] & 0x7)]; |
993 | mult = multipliers[((cmd.response[0] >> 3) & 0xf)]; | |
272cc70b AF |
994 | |
995 | mmc->tran_speed = freq * mult; | |
996 | ||
998be3dd | 997 | mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf); |
272cc70b AF |
998 | |
999 | if (IS_SD(mmc)) | |
1000 | mmc->write_bl_len = mmc->read_bl_len; | |
1001 | else | |
998be3dd | 1002 | mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf); |
272cc70b AF |
1003 | |
1004 | if (mmc->high_capacity) { | |
1005 | csize = (mmc->csd[1] & 0x3f) << 16 | |
1006 | | (mmc->csd[2] & 0xffff0000) >> 16; | |
1007 | cmult = 8; | |
1008 | } else { | |
1009 | csize = (mmc->csd[1] & 0x3ff) << 2 | |
1010 | | (mmc->csd[2] & 0xc0000000) >> 30; | |
1011 | cmult = (mmc->csd[2] & 0x00038000) >> 15; | |
1012 | } | |
1013 | ||
1014 | mmc->capacity = (csize + 1) << (cmult + 2); | |
1015 | mmc->capacity *= mmc->read_bl_len; | |
1016 | ||
1017 | if (mmc->read_bl_len > 512) | |
1018 | mmc->read_bl_len = 512; | |
1019 | ||
1020 | if (mmc->write_bl_len > 512) | |
1021 | mmc->write_bl_len = 512; | |
1022 | ||
1023 | /* Select the card, and put it into Transfer Mode */ | |
d52ebf10 TC |
1024 | if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */ |
1025 | cmd.cmdidx = MMC_CMD_SELECT_CARD; | |
fe8f7066 | 1026 | cmd.resp_type = MMC_RSP_R1; |
d52ebf10 | 1027 | cmd.cmdarg = mmc->rca << 16; |
d52ebf10 | 1028 | err = mmc_send_cmd(mmc, &cmd, NULL); |
272cc70b | 1029 | |
d52ebf10 TC |
1030 | if (err) |
1031 | return err; | |
1032 | } | |
272cc70b | 1033 | |
e6f99a56 LW |
1034 | /* |
1035 | * For SD, its erase group is always one sector | |
1036 | */ | |
1037 | mmc->erase_grp_size = 1; | |
bc897b1d | 1038 | mmc->part_config = MMCPART_NOAVAILABLE; |
d23e2c09 SG |
1039 | if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) { |
1040 | /* check ext_csd version and capacity */ | |
1041 | err = mmc_send_ext_csd(mmc, ext_csd); | |
fdbb873e | 1042 | if (!err && (ext_csd[EXT_CSD_REV] >= 2)) { |
639b7827 YS |
1043 | /* |
1044 | * According to the JEDEC Standard, the value of | |
1045 | * ext_csd's capacity is valid if the value is more | |
1046 | * than 2GB | |
1047 | */ | |
0560db18 LW |
1048 | capacity = ext_csd[EXT_CSD_SEC_CNT] << 0 |
1049 | | ext_csd[EXT_CSD_SEC_CNT + 1] << 8 | |
1050 | | ext_csd[EXT_CSD_SEC_CNT + 2] << 16 | |
1051 | | ext_csd[EXT_CSD_SEC_CNT + 3] << 24; | |
639b7827 | 1052 | capacity *= 512; |
b1f1e821 | 1053 | if ((capacity >> 20) > 2 * 1024) |
639b7827 | 1054 | mmc->capacity = capacity; |
d23e2c09 | 1055 | } |
bc897b1d | 1056 | |
e6f99a56 LW |
1057 | /* |
1058 | * Check whether GROUP_DEF is set, if yes, read out | |
1059 | * group size from ext_csd directly, or calculate | |
1060 | * the group size from the csd value. | |
1061 | */ | |
0560db18 LW |
1062 | if (ext_csd[EXT_CSD_ERASE_GROUP_DEF]) |
1063 | mmc->erase_grp_size = | |
1064 | ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 512 * 1024; | |
e6f99a56 LW |
1065 | else { |
1066 | int erase_gsz, erase_gmul; | |
1067 | erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10; | |
1068 | erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5; | |
1069 | mmc->erase_grp_size = (erase_gsz + 1) | |
1070 | * (erase_gmul + 1); | |
1071 | } | |
1072 | ||
bc897b1d | 1073 | /* store the partition info of emmc */ |
8948ea83 SW |
1074 | if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) || |
1075 | ext_csd[EXT_CSD_BOOT_MULT]) | |
0560db18 | 1076 | mmc->part_config = ext_csd[EXT_CSD_PART_CONF]; |
d23e2c09 SG |
1077 | } |
1078 | ||
272cc70b AF |
1079 | if (IS_SD(mmc)) |
1080 | err = sd_change_freq(mmc); | |
1081 | else | |
1082 | err = mmc_change_freq(mmc); | |
1083 | ||
1084 | if (err) | |
1085 | return err; | |
1086 | ||
1087 | /* Restrict card's capabilities by what the host can do */ | |
1088 | mmc->card_caps &= mmc->host_caps; | |
1089 | ||
1090 | if (IS_SD(mmc)) { | |
1091 | if (mmc->card_caps & MMC_MODE_4BIT) { | |
1092 | cmd.cmdidx = MMC_CMD_APP_CMD; | |
1093 | cmd.resp_type = MMC_RSP_R1; | |
1094 | cmd.cmdarg = mmc->rca << 16; | |
272cc70b AF |
1095 | |
1096 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
1097 | if (err) | |
1098 | return err; | |
1099 | ||
1100 | cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH; | |
1101 | cmd.resp_type = MMC_RSP_R1; | |
1102 | cmd.cmdarg = 2; | |
272cc70b AF |
1103 | err = mmc_send_cmd(mmc, &cmd, NULL); |
1104 | if (err) | |
1105 | return err; | |
1106 | ||
1107 | mmc_set_bus_width(mmc, 4); | |
1108 | } | |
1109 | ||
1110 | if (mmc->card_caps & MMC_MODE_HS) | |
ad5fd922 | 1111 | mmc->tran_speed = 50000000; |
272cc70b | 1112 | else |
ad5fd922 | 1113 | mmc->tran_speed = 25000000; |
272cc70b | 1114 | } else { |
7798f6db AF |
1115 | int idx; |
1116 | ||
1117 | /* An array of possible bus widths in order of preference */ | |
1118 | static unsigned ext_csd_bits[] = { | |
1119 | EXT_CSD_BUS_WIDTH_8, | |
1120 | EXT_CSD_BUS_WIDTH_4, | |
1121 | EXT_CSD_BUS_WIDTH_1, | |
1122 | }; | |
1123 | ||
1124 | /* An array to map CSD bus widths to host cap bits */ | |
1125 | static unsigned ext_to_hostcaps[] = { | |
1126 | [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT, | |
1127 | [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT, | |
1128 | }; | |
1129 | ||
1130 | /* An array to map chosen bus width to an integer */ | |
1131 | static unsigned widths[] = { | |
1132 | 8, 4, 1, | |
1133 | }; | |
1134 | ||
1135 | for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) { | |
1136 | unsigned int extw = ext_csd_bits[idx]; | |
1137 | ||
1138 | /* | |
1139 | * Check to make sure the controller supports | |
1140 | * this bus width, if it's more than 1 | |
1141 | */ | |
1142 | if (extw != EXT_CSD_BUS_WIDTH_1 && | |
1143 | !(mmc->host_caps & ext_to_hostcaps[extw])) | |
1144 | continue; | |
1145 | ||
272cc70b | 1146 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, |
7798f6db | 1147 | EXT_CSD_BUS_WIDTH, extw); |
272cc70b AF |
1148 | |
1149 | if (err) | |
4137894e | 1150 | continue; |
272cc70b | 1151 | |
7798f6db | 1152 | mmc_set_bus_width(mmc, widths[idx]); |
4137894e LW |
1153 | |
1154 | err = mmc_send_ext_csd(mmc, test_csd); | |
1155 | if (!err && ext_csd[EXT_CSD_PARTITIONING_SUPPORT] \ | |
1156 | == test_csd[EXT_CSD_PARTITIONING_SUPPORT] | |
1157 | && ext_csd[EXT_CSD_ERASE_GROUP_DEF] \ | |
1158 | == test_csd[EXT_CSD_ERASE_GROUP_DEF] \ | |
1159 | && ext_csd[EXT_CSD_REV] \ | |
1160 | == test_csd[EXT_CSD_REV] | |
1161 | && ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] \ | |
1162 | == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] | |
1163 | && memcmp(&ext_csd[EXT_CSD_SEC_CNT], \ | |
1164 | &test_csd[EXT_CSD_SEC_CNT], 4) == 0) { | |
1165 | ||
7798f6db | 1166 | mmc->card_caps |= ext_to_hostcaps[extw]; |
4137894e LW |
1167 | break; |
1168 | } | |
272cc70b AF |
1169 | } |
1170 | ||
1171 | if (mmc->card_caps & MMC_MODE_HS) { | |
1172 | if (mmc->card_caps & MMC_MODE_HS_52MHz) | |
ad5fd922 | 1173 | mmc->tran_speed = 52000000; |
272cc70b | 1174 | else |
ad5fd922 JC |
1175 | mmc->tran_speed = 26000000; |
1176 | } | |
272cc70b AF |
1177 | } |
1178 | ||
ad5fd922 JC |
1179 | mmc_set_clock(mmc, mmc->tran_speed); |
1180 | ||
272cc70b AF |
1181 | /* fill in device description */ |
1182 | mmc->block_dev.lun = 0; | |
1183 | mmc->block_dev.type = 0; | |
1184 | mmc->block_dev.blksz = mmc->read_bl_len; | |
9b1f942c | 1185 | mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len); |
babce5f6 TH |
1186 | sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x", |
1187 | mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff), | |
1188 | (mmc->cid[3] >> 16) & 0xffff); | |
1189 | sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff, | |
1190 | (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff, | |
1191 | (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff, | |
1192 | (mmc->cid[2] >> 24) & 0xff); | |
1193 | sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf, | |
1194 | (mmc->cid[2] >> 16) & 0xf); | |
122efd43 | 1195 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT) |
272cc70b | 1196 | init_part(&mmc->block_dev); |
122efd43 | 1197 | #endif |
272cc70b AF |
1198 | |
1199 | return 0; | |
1200 | } | |
1201 | ||
fdbb873e | 1202 | static int mmc_send_if_cond(struct mmc *mmc) |
272cc70b AF |
1203 | { |
1204 | struct mmc_cmd cmd; | |
1205 | int err; | |
1206 | ||
1207 | cmd.cmdidx = SD_CMD_SEND_IF_COND; | |
1208 | /* We set the bit if the host supports voltages between 2.7 and 3.6 V */ | |
1209 | cmd.cmdarg = ((mmc->voltages & 0xff8000) != 0) << 8 | 0xaa; | |
1210 | cmd.resp_type = MMC_RSP_R7; | |
272cc70b AF |
1211 | |
1212 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
1213 | ||
1214 | if (err) | |
1215 | return err; | |
1216 | ||
998be3dd | 1217 | if ((cmd.response[0] & 0xff) != 0xaa) |
272cc70b AF |
1218 | return UNUSABLE_ERR; |
1219 | else | |
1220 | mmc->version = SD_VERSION_2; | |
1221 | ||
1222 | return 0; | |
1223 | } | |
1224 | ||
1225 | int mmc_register(struct mmc *mmc) | |
1226 | { | |
1227 | /* Setup the universal parts of the block interface just once */ | |
1228 | mmc->block_dev.if_type = IF_TYPE_MMC; | |
1229 | mmc->block_dev.dev = cur_dev_num++; | |
1230 | mmc->block_dev.removable = 1; | |
1231 | mmc->block_dev.block_read = mmc_bread; | |
1232 | mmc->block_dev.block_write = mmc_bwrite; | |
e6f99a56 | 1233 | mmc->block_dev.block_erase = mmc_berase; |
8feafcc4 JR |
1234 | if (!mmc->b_max) |
1235 | mmc->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT; | |
272cc70b AF |
1236 | |
1237 | INIT_LIST_HEAD (&mmc->link); | |
1238 | ||
1239 | list_add_tail (&mmc->link, &mmc_devices); | |
1240 | ||
1241 | return 0; | |
1242 | } | |
1243 | ||
df3fc526 | 1244 | #ifdef CONFIG_PARTITIONS |
272cc70b AF |
1245 | block_dev_desc_t *mmc_get_dev(int dev) |
1246 | { | |
1247 | struct mmc *mmc = find_mmc_device(dev); | |
6bb4b4bc | 1248 | if (!mmc || mmc_init(mmc)) |
40242bc3 | 1249 | return NULL; |
272cc70b | 1250 | |
40242bc3 | 1251 | return &mmc->block_dev; |
272cc70b | 1252 | } |
df3fc526 | 1253 | #endif |
272cc70b AF |
1254 | |
1255 | int mmc_init(struct mmc *mmc) | |
1256 | { | |
afd5932b | 1257 | int err; |
272cc70b | 1258 | |
48972d90 TR |
1259 | if (mmc_getcd(mmc) == 0) { |
1260 | mmc->has_init = 0; | |
1261 | printf("MMC: no card present\n"); | |
1262 | return NO_CARD_ERR; | |
1263 | } | |
1264 | ||
bc897b1d LW |
1265 | if (mmc->has_init) |
1266 | return 0; | |
1267 | ||
272cc70b AF |
1268 | err = mmc->init(mmc); |
1269 | ||
1270 | if (err) | |
1271 | return err; | |
1272 | ||
b86b85e2 IY |
1273 | mmc_set_bus_width(mmc, 1); |
1274 | mmc_set_clock(mmc, 1); | |
1275 | ||
272cc70b AF |
1276 | /* Reset the Card */ |
1277 | err = mmc_go_idle(mmc); | |
1278 | ||
1279 | if (err) | |
1280 | return err; | |
1281 | ||
bc897b1d LW |
1282 | /* The internal partition reset to user partition(0) at every CMD0*/ |
1283 | mmc->part_num = 0; | |
1284 | ||
272cc70b | 1285 | /* Test for SD version 2 */ |
afd5932b | 1286 | err = mmc_send_if_cond(mmc); |
272cc70b | 1287 | |
272cc70b AF |
1288 | /* Now try to get the SD card's operating condition */ |
1289 | err = sd_send_op_cond(mmc); | |
1290 | ||
1291 | /* If the command timed out, we check for an MMC card */ | |
1292 | if (err == TIMEOUT) { | |
1293 | err = mmc_send_op_cond(mmc); | |
1294 | ||
1295 | if (err) { | |
1296 | printf("Card did not respond to voltage select!\n"); | |
1297 | return UNUSABLE_ERR; | |
1298 | } | |
1299 | } | |
1300 | ||
bc897b1d LW |
1301 | err = mmc_startup(mmc); |
1302 | if (err) | |
1303 | mmc->has_init = 0; | |
1304 | else | |
1305 | mmc->has_init = 1; | |
1306 | return err; | |
272cc70b AF |
1307 | } |
1308 | ||
1309 | /* | |
1310 | * CPU and board-specific MMC initializations. Aliased function | |
1311 | * signals caller to move on | |
1312 | */ | |
1313 | static int __def_mmc_init(bd_t *bis) | |
1314 | { | |
1315 | return -1; | |
1316 | } | |
1317 | ||
f9a109b3 PT |
1318 | int cpu_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init"))); |
1319 | int board_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init"))); | |
272cc70b AF |
1320 | |
1321 | void print_mmc_devices(char separator) | |
1322 | { | |
1323 | struct mmc *m; | |
1324 | struct list_head *entry; | |
1325 | ||
1326 | list_for_each(entry, &mmc_devices) { | |
1327 | m = list_entry(entry, struct mmc, link); | |
1328 | ||
1329 | printf("%s: %d", m->name, m->block_dev.dev); | |
1330 | ||
1331 | if (entry->next != &mmc_devices) | |
1332 | printf("%c ", separator); | |
1333 | } | |
1334 | ||
1335 | printf("\n"); | |
1336 | } | |
1337 | ||
ea6ebe21 LW |
1338 | int get_mmc_num(void) |
1339 | { | |
1340 | return cur_dev_num; | |
1341 | } | |
1342 | ||
272cc70b AF |
1343 | int mmc_initialize(bd_t *bis) |
1344 | { | |
1345 | INIT_LIST_HEAD (&mmc_devices); | |
1346 | cur_dev_num = 0; | |
1347 | ||
1348 | if (board_mmc_init(bis) < 0) | |
1349 | cpu_mmc_init(bis); | |
1350 | ||
1351 | print_mmc_devices(','); | |
1352 | ||
1353 | return 0; | |
1354 | } |