]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - gas/ChangeLog
Power10 VSX 32-byte storage access
[thirdparty/binutils-gdb.git] / gas / ChangeLog
CommitLineData
94ba9882
AM
12020-05-11 Alan Modra <amodra@gmail.com>
2
3 * testsuite/gas/ppc/vsx_32byte.d,
4 * testsuite/gas/ppc/vsx_32byte.s: New test.
5 * testsuite/gas/ppc/ppc.exp: Run it.
6
f4791f1a
AM
72020-05-11 Alan Modra <amodra@gmail.com>
8
9 * testsuite/gas/ppc/vec_mul.s,
10 * testsuite/gas/ppc/vec_mul.d: New test.
11 * testsuite/gas/ppc/ppc.exp: Run it.
12
3ff0a5ba
PB
132020-05-11 Peter Bergner <bergner@linux.ibm.com>
14
15 * testsuite/gas/ppc/byte_rev.d,
16 * testsuite/gas/ppc/byte_rev.s: New test.
17 * testsuite/gas/ppc/ppc.exp: Run it.
18
afef4fe9
PB
192020-05-11 Peter Bergner <bergner@linux.ibm.com>
20
21 * testsuite/gas/ppc/power10.d: Add paste. tests.
22 * testsuite/gas/ppc/power10.s: Likewise.
23
1224c05d
PB
242020-05-11 Peter Bergner <bergner@linux.ibm.com>
25
26 * testsuite/gas/ppc/power10.s: New test.
27 * testsuite/gas/ppc/power10.d: Likewise.
28 * testsuite/gas/ppc/ppc.exp: Run it.
29
7c1f4227
AM
302020-05-11 Alan Modra <amodra@gmail.com>
31
32 * config/tc-ppc.c (md_assemble): Update for PPC_OPCODE_POWER10
33 renaming.
34 * testsuite/gas/ppc/prefix-align.d: Use -mpower10/-Mpower10 in
35 place of -mfuture/-Mfuture.
36 * testsuite/gas/ppc/prefix-pcrel.d: Likewise.
37 * testsuite/gas/ppc/prefix-reloc.d: Likewise.
38
bfeaed38
NC
392020-05-06 Nick Clifton <nickc@redhat.com>
40
41 * po/sv.po: Updated Swedish translation.
42
6ef719c0
NC
432020-05-06 Nick Clifton <nickc@redhat.com>
44
45 PR 25927
46 * doc/as.texi (Preprocessing): Replace cross reference to not
47 existant document with a URL to the equivalent page in the GCC
48 manual.
49
546cb2d8
NC
502020-05-05 Nick Clifton <nickc@redhat.com>
51
52 * dwarf2dbg.c (out_dir_and_file_list): Add comments describing the
53 construction of a DWARF-5 directory name table.
54 * testsuite/gas/elf/pr25917.d: Update expected output.
55
7d0bd487
GN
562020-05-05 Gunther Nikl <gnikl@justmail.de>
57
58 * config/tc-rx.c (elf_flags): Initialize for non-linux targets.
59 (md_parse_option): Remove initialization of elf_flags.
070b775f 60
fe05f369
ASDV
612020-05-04 Andre Vieira <andre.simoesdiasvieira@arm.com>
62
63 PR gas/25863
64 * config/tc-arm.c (do_mve_vmull): Fix scalar and NEON parsing of vmul.
65 * testsuite/gas/arm/mve-scalar-vmult-it.d: New test.
66 * testsuite/gas/arm/mve-scalar-vmult-it.s: New test.
67
4706679d
NC
682020-05-04 Nick Clifton <nickc@redhat.com>
69
70 PR 25917
71 * dwarf2dbg.c (out_dir_and_file_list): Check for the directory
72 table's existence before looking at its entries.
070b775f
NC
73 Also do not emit a default directory entry if there are no
74 directories in use.
75
4706679d
NC
76 * testsuite/gas/elf/pr25917.s: New test source file.
77 * testsuite/gas/elf/pr25917.d: New test driver.
78 * testsuite/gas/elf/elf.exp (run_elf_list_test): Run the new test.
79
09c1e68a
AC
802020-04-30 Alex Coplan <alex.coplan@arm.com>
81
82 * config/tc-aarch64.c (fix_insn): Implement for
83 AARCH64_OPND_UNDEFINED.
84 (parse_operands): Implement for AARCH64_OPND_UNDEFINED.
85 * testsuite/gas/aarch64/udf.s: New.
86 * testsuite/gas/aarch64/udf.d: New.
87 * testsuite/gas/aarch64/udf-invalid.s: New.
88 * testsuite/gas/aarch64/udf-invalid.l: New.
89 * testsuite/gas/aarch64/udf-invalid.d: New.
90
c578f16e
YS
912020-04-30 Yoshinori Sato <ysato@users.sourceforge.jp>
92
93 * config/tc-rx.c (elf_flags): Reset default value.
94 (md_parse_option): For rx-elf Initialize elf_flags with RX_ABI.
95
935f1f4b
MF
962020-04-29 Max Filippov <jcmvbkbc@gmail.com>
97
98 * config/tc-xtensa.c (XTENSA_MARCH_EARLIEST): Define macro as 0
99 if it's not defined.
100 (microarch_earliest): New static variable.
101 (xg_translate_idioms): Translate "simcall" to "simcall 0" when
102 simcall opcode has mandatory parameter.
103 (xg_init_global_config): Initialize microarch_earliest.
104
5c936ef5
NC
1052020-04-29 Nick Clifton <nickc@redhat.com>
106
107 PR 22699
108 * config/tc-sh.c (build_Mytes): Change operand type IMM0_8 to
109 IMM0_8S and add support for IMM0_8U.
110 * testsuite/gas/sh/sh4a.s: Add test of a logical insn using an
111 unsigned 8-bit immediate.
112 * testsuite/gas/sh/sh4a.d: Extended expected disassembly.
241e541d 113 * testsuite/gas/sh/sh4al-dsp.d: Update expected disassembly.
5c936ef5 114
251dae91
TC
1152020-04-27 Tamar Christina <tamar.christina@arm.com>
116
117 * NEWS: Add news entry for big-obj.
118 * config/tc-i386.c (i386_target_format): Support new format.
119 * doc/c-i386.texi: Add i386 support.
120 * testsuite/gas/pe/big-obj.d: Rename test to not be x64 specific.
121 * testsuite/gas/pe/pe.exp (big-obj): Make test run on i386 as well.
122
714e6c96
NC
1232020-04-27 Nick Clifton <nickc@redhat.com>
124
125 PR 25878
126 * dwarf2dbg.c (struct file_entry): Add auto_assigned field.
127 (assign_file_to_slot): New function. Fills in an entry in the
128 files table.
129 (allocate_filenum): Use new function.
130 (allocate_filename_to_slot): Use new function. If the specified
131 slot entry is already in use, but was chosen automatically then
132 reassign the automatic entry.
133
a09f656b 1342020-04-26 Hongtao Liu <hongtao.liu@intel.com
135
136 * config/tc-i386.c (lfence_before_ret_shl): New member.
137 (load_insn_p): implict load for POP/POPA/POPF/XLATB, no load
138 for Anysize insns.
139 (insert_after_load): Issue warning for REP CMPS/SCAS.
140 (insert_before_before): Handle iret, Handle
141 -mlfence-before-ret=shl, Adjust operand size of or/not/shl to ret's,
142 (md_parse_option): Change -mlfence-before-ret=[none|not|or] to
143 -mlfence-before-ret=[none/not/or/shl/yes].
144 Enable -mlfence-before-ret=shl when
145 -mlfence-beofre-indirect-branch=all and no explict -mlfence-before-ret option.
146 (md_show_usage): Ditto.
147 * doc/c-i386.texi: Ditto.
148 * testsuite/gas/i386/i386.exp: Add new testcases.
149 * testsuite/gas/i386/lfence-load-b.d: New.
150 * testsuite/gas/i386/lfence-load-b.e: New.
151 * testsuite/gas/i386/lfence-load.d: Modified.
152 * testsuite/gas/i386/lfence-load.e: New.
153 * testsuite/gas/i386/lfence-load.s: Modified.
154 * testsuite/gas/i386/lfence-ret-a.d: Modified.
155 * testsuite/gas/i386/lfence-ret-b.d: Modified.
156 * testsuite/gas/i386/lfence-ret-c.d: New.
157 * testsuite/gas/i386/lfence-ret-d.d: New.
158 * testsuite/gas/i386/lfence-ret.s: Modified.
159 * testsuite/gas/i386/x86-64-lfence-load-b.d: New.
160 * testsuite/gas/i386/x86-64-lfence-load.d: Modified.
161 * testsuite/gas/i386/x86-64-lfence-load.s: Modified.
162 * testsuite/gas/i386/x86-64-lfence-ret-a.d: Modified.
163 * testsuite/gas/i386/x86-64-lfence-ret-b.d: Modified.
164 * testsuite/gas/i386/x86-64-lfence-ret-c.d: New.
165 * testsuite/gas/i386/x86-64-lfence-ret-d.d: New
166 * testsuite/gas/i386/x86-64-lfence-ret-e.d: New.
167 * testsuite/gas/i386/x86-64-lfence-ret.e: New.
168 * testsuite/gas/i386/x86-64-lfence-ret.s: New.
169
30ce8e47
MF
1702020-04-22 Max Filippov <jcmvbkbc@gmail.com>
171
172 PR ld/25861
173 * config/tc-xtensa.c (md_apply_fix): Replace
174 BFD_RELOC_XTENSA_DIFF{8,16,32} generation with
175 BFD_RELOC_XTENSA_PDIFF{8,16,32} and
176 BFD_RELOC_XTENSA_NDIFF{8,16,32} generation.
177 * testsuite/gas/xtensa/loc.d: Replace BFD_RELOC_XTENSA_DIFF16
178 with BFD_RELOC_XTENSA_PDIFF16 in the expected output.
179
31c89d60
AM
1802020-04-22 Alan Modra <amodra@gmail.com>
181
182 * config/obj-elf.c (elf_frob_symbol): Unconditionally remove
183 symbol for ".symver .. remove".
184 * doc/as.texi (.symver): Update.
185 * testsuite/gas/symver/symver11.s: Make foo weak.
186 * testsuite/gas/symver/symver11.d: Expect an error.
187 * testsuite/gas/symver/symver7.d: Allow other random symbols.
188
1d3eb556
L
1892020-04-21 H.J. Lu <hongjiu.lu@intel.com>
190
191 * testsuite/gas/symver/symver11.s: Add ".balign 8".
192
bb2a1453
AS
1932020-04-21 Andreas Schwab <schwab@linux-m68k.org>
194
195 PR 25848
196 * testsuite/gas/m68k/operands.s: Add tests for cmpi.
197 * testsuite/gas/m68k/operands.d: Update.
198 * testsuite/gas/m68k/op68000.d: Update for new error messages.
199
c36876fe
TC
2002020-04-21 Tamar Christina <tamar.christina@arm.com>
201
202 PR binutils/24753
203 * testsuite/gas/arm/pr24753.d: New test.
204 * testsuite/gas/arm/pr24753.s: New test.
205
6914be53
L
2062020-04-21 H.J. Lu <hongjiu.lu@intel.com>
207
208 PR gas/23840
209 PR gas/25295
210 * NEWS: Mention .symver extension.
211 * config/obj-elf.c (obj_elf_find_and_add_versioned_name): New
212 function.
213 (obj_elf_symver): Call obj_elf_find_and_add_versioned_name to
214 add a version name. Add local, hidden and remove visibility
215 support.
216 (elf_frob_symbol): Handle the list of version names. Update the
217 original symbol to local, hidden or remove it from the symbol
218 table.
219 (elf_frob_file_before_adjust): Handle the list of version names.
220 * config/obj-elf.h (elf_visibility): New.
221 (elf_versioned_name_list): Likewise.
222 (elf_obj_sy): Change local to bitfield. Add rename, bad_version
223 and visibility. Change versioned_name pointer to struct
224 elf_versioned_name_list.
225 * doc/as.texi: Update .symver directive.
226 * testsuite/gas/symver/symver.exp: Run all *.d tests. Add more
227 error checking tests.
228 * testsuite/gas/symver/symver6.d: New file.
229 * testsuite/gas/symver/symver7.d: Likewise.
230 * testsuite/gas/symver/symver7.s: Likewise.
231 * testsuite/gas/symver/symver8.d: Likewise.
232 * testsuite/gas/symver/symver8.s: Likewise.
233 * testsuite/gas/symver/symver9.s: Likewise.
234 * testsuite/gas/symver/symver9a.d: Likewise.
235 * testsuite/gas/symver/symver9b.d: Likewise.
236 * testsuite/gas/symver/symver10.s: Likewise.
237 * testsuite/gas/symver/symver10a.d: Likewise.
238 * testsuite/gas/symver/symver10b.d: Likewise.
239 * testsuite/gas/symver/symver11.d: Likewise.
240 * testsuite/gas/symver/symver11.s: Likewise.
241 * testsuite/gas/symver/symver12.d: Likewise.
242 * testsuite/gas/symver/symver12.s: Likewise.
243 * testsuite/gas/symver/symver13.d: Likewise.
244 * testsuite/gas/symver/symver13.s: Likewise.
245 * testsuite/gas/symver/symver14.d: Likewise.
246 * testsuite/gas/symver/symver14.l: Likewise.
247 * testsuite/gas/symver/symver15.d: Likewise.
248 * testsuite/gas/symver/symver15.l: Likewise.
249 * testsuite/gas/symver/symver6.l: Removed.
250 * testsuite/gas/symver/symver6.s: Updated.
251
c2e5c986
SD
2522020-04-20 Sudakshina Das <sudi.das@arm.com>
253
254 * config/tc-aarch64.c (parse_barrier_psb): Update error messages
255 to include TSB.
256 * testsuite/gas/aarch64/system-2.d: Update -march and new tsb tests.
257 * testsuite/gas/aarch64/system-2.s: Add new tsb tests.
258 * testsuite/gas/aarch64/system.d: Update.
259
8a6e1d1d
SD
2602020-04-20 Sudakshina Das <sudi.das@arm.com>
261
262 * testsuite/gas/aarch64/bti.d: Update -march option.
263 * testsuite/gas/aarch64/illegal-bti.d: Remove.
264 * testsuite/gas/aarch64/illegal-bti.l: Remove.
265 * testsuite/gas/aarch64/illegal-ras-1.l: Remove esb.
266 * testsuite/gas/aarch64/illegal-ras-1.s: Remove esb.
267
49af2f5c
AM
2682020-04-17 Alan Modra <amodra@gmail.com>
269
270 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Allow assignment to dot.
271
8e4979ac
NC
2722020-04-16 Gagan Singh Sidhu <broly@mac.com>
273 Nick Clifton <nickc@redhat.com>
274
275 PR 25803
276 * config/obj-elf.c (obj_elf_type): Reject ifunc symbols on MIPS
277 targets.
278 * testsuite/gas/elf/elf.exp: Add MIPS targets to the list to skip
279 for the type-2 test.
280 * testsuite/gas/elf/type-noifunc.e: Update to allow for MIPS
281 targets running this test.
282
c54a9b56
DF
2832020-02-16 David Faust <david.faust@oracle.com>
284
285 * testsuite/gas/bpf/bpf.exp: Run jump32 tests.
286 * testsuite/gas/bpf/jump32.s: New file.
287 * testsuite/gas/bpf/jump32.d: Likewise.
288
3071b197
L
2892020-04-08 H.J. Lu <hongjiu.lu@intel.com>
290
291 * doc/c-i386.texi: Correct -mlfence-before-indirect-branch=
292 documentation.
293
6a3ab923
GN
2942020-04-08 Gunther Nikl <gnikl@justmail.de>
295
296 * config/tc-moxie.h (MD_PCREL_FROM_SECTION): Delete define.
297 (md_pcrel_from): Remove prototytpe.
d9f19885
GN
298 * config/tc-m32c.h (MD_PCREL_FROM_SECTION): Delete duplicate
299 define.
300 (md_pcrel_from_section): Remove duplicate prototype.
9ad4cfa8
GN
301 * tc.h (md_pcrel_from_section): Add prototype.
302 * config/tc-aarch64.h (md_pcrel_from_section): Remove prototype.
303 * config/tc-arc.h (md_pcrel_from_section): Likewise.
304 * config/tc-arm.h (md_pcrel_from_section): Likewise.
305 * config/tc-avr.h (md_pcrel_from_section): Likewise.
306 * config/tc-bfin.h (md_pcrel_from_section): Likewise.
307 * config/tc-bpf.h (md_pcrel_from_section): Likewise.
308 * config/tc-csky.h (md_pcrel_from_section): Likewise.
309 * config/tc-d10v.h (md_pcrel_from_section): Likewise.
310 * config/tc-d30v.h (md_pcrel_from_section): Likewise.
311 * config/tc-epiphany.h (md_pcrel_from_section): Likewise.
312 * config/tc-fr30.h (md_pcrel_from_section): Likewise.
313 * config/tc-frv.h (md_pcrel_from_section): Likewise.
314 * config/tc-iq2000.h (md_pcrel_from_section): Likewise.
315 * config/tc-lm32.h (md_pcrel_from_section): Likewise.
316 * config/tc-m32c.h (md_pcrel_from_section): Likewise.
317 * config/tc-m32r.h (md_pcrel_from_section): Likewise.
318 * config/tc-mcore.h (md_pcrel_from_section): Likewise.
319 * config/tc-mep.h (md_pcrel_from_section): Likewise.
320 * config/tc-metag.h (md_pcrel_from_section): Likewise.
321 * config/tc-microblaze.h (md_pcrel_from_section): Likewise.
322 * config/tc-mmix.h (md_pcrel_from_section): Likewise.
323 * config/tc-moxie.h (md_pcrel_from_section): Likewise.
324 * config/tc-msp430.h (md_pcrel_from_section): Likewise.
325 * config/tc-mt.h (md_pcrel_from_section): Likewise.
326 * config/tc-or1k.h (md_pcrel_from_section): Likewise.
327 * config/tc-ppc.h (md_pcrel_from_section): Likewise.
328 * config/tc-rl78.h (md_pcrel_from_section): Likewise.
329 * config/tc-rx.h (md_pcrel_from_section): Likewise.
330 * config/tc-s390.h (md_pcrel_from_section): Likewise.
331 * config/tc-sh.h (md_pcrel_from_section): Likewise.
332 * config/tc-xc16x.h (md_pcrel_from_section): Likewise.
333 * config/tc-xstormy16.h (md_pcrel_from_section): Likewise.
4c09b8c4
GN
334 * config/tc-microblaze.h (md_begin, md_assemble, md_undefined_symbol,
335 md_show_usage, md_convert_frag, md_operand, md_number_to_chars,
336 md_estimate_size_before_relax, md_section_align, tc_gen_reloc,
337 md_apply_fix3): Delete prototypes.
6a3ab923 338
6e0e8b45
L
3392020-04-07 H.J. Lu <hongjiu.lu@intel.com>
340
341 * NEWS: Mention support for Intel SERIALIZE and TSXLDTRK
342 instructions.
343
266803a2
L
3442020-04-07 H.J. Lu <hongjiu.lu@intel.com>
345
346 * doc/c-z80.texi: Fix @xref warnings.
347
bb651e8b
CL
3482020-04-07 Lili Cui <lili.cui@intel.com>
349
350 * config/tc-i386.c (cpu_arch): Add .TSXLDTRK.
351 (cpu_noarch): Likewise.
352 * doc/c-i386.texi: Document TSXLDTRK.
353 * testsuite/gas/i386/i386.exp: Run TSXLDTRK tests.
354 * testsuite/gas/i386/tsxldtrk.d: Likewise.
355 * testsuite/gas/i386/tsxldtrk.s: Likewise.
356 * testsuite/gas/i386/x86-64-tsxldtrk.d: Likewise.
357
4b27d27c
L
3582020-04-02 Lili Cui <lili.cui@intel.com>
359
360 * config/tc-i386.c (cpu_arch): Add .serialize.
361 (cpu_noarch): Likewise.
362 * doc/c-i386.texi: Document serialize.
363 * testsuite/gas/i386/i386.exp: Run serialize tests
364 * testsuite/gas/i386/serialize.d: Likewise.
365 * testsuite/gas/i386/x86-64-serialize.d: Likewise.
366 * testsuite/gas/i386/serialize.s: Likewise.
367
bb897477
RO
3682020-04-02 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
369
370 * testsuite/gas/elf/section12a.d: Use notarget instead of xfail.
371 * testsuite/gas/elf/section12b.d: Likewise.
372 * testsuite/gas/elf/section16a.d: Likewise.
373 * testsuite/gas/elf/section16b.d: Likewise.
374
59e28a97
GN
3752020-04-02 Gunther Nikl <gnikl@justmail.de>
376
377 * config/tc-m68k.c (m68k_ip): Fix range check for index register
378 with a suppressed address register.
379
efc3a950
L
3802020-04-01 H.J. Lu <hongjiu.lu@intel.com>
381
382 PR gas/25756
383 * config/tc-i386.h (TC_FORCE_RELOCATION_ABS): New.
384 * testsuite/gas/i386/localpic.s: Add a test for relocation
385 against local absolute symbol.
386 * testsuite/gas/i386/x86-64-localpic.s: Likewise.
387 * testsuite/gas/i386/localpic.d: Updated.
388 * testsuite/gas/i386/x86-64-localpic.d: Likewise.
389 * testsuite/gas/i386/ilp32/x86-64-localpic.d: Likewise.
390
15d47c3a
RO
3912020-04-01 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
392
393 PR gas/25732
394 * testsuite/gas/i386/solaris/x86-64-branch-2.d: New file.
395 * testsuite/gas/i386/solaris/x86-64-branch-3.d: New file.
396 * testsuite/gas/i386/solaris/x86-64-jump.d: Incorporate changes to
397 testsuite/gas/i386/x86-64-jump.d.
398 * gas/testsuite/gas/i386/solaris/x86-64-mpx-branch-1.d:
399 Incorporate changes to
400 gas/testsuite/gas/i386/x86-64-mpx-branch-1.d.
401 * testsuite/gas/i386/solaris/x86-64-mpx-branch-2.d : Incorporate
402 changes to testsuite/gas/i386/x86-64-mpx-branch-2.d.
403 * testsuite/gas/i386/x86-64-branch-2.d: Skip on *-*-solaris*.
404 * testsuite/gas/i386/x86-64-branch-3.d: Likewise.
405
876678f0
MR
4062020-03-31 Maciej W. Rozycki <macro@linux-mips.org>
407
408 PR 25611
409 PR 25614
410 * dwarf2dbg.c: Do not include "bignum.h".
411
d1a89da5
NC
4122020-03-30 Nelson Chu <nelson.chu@sifive.com>
413
414 * testsuite/gas/riscv/alias-csr.d: Move this to priv-reg-pseudo.
415 * testsuite/gas/riscv/alias-csr.s: Likewise.
416 * testsuite/gas/riscv/no-aliases-csr.d: Move this
417 to priv-reg-pseudo-noalias.
418 * testsuite/gas/riscv/bad-csr.d: Rename to priv-reg-fail-nonexistent.
419 * testsuite/gas/riscv/bad-csr.l: Likewise.
420 * testsuite/gas/riscv/bad-csr.s: Likewise.
421 * testsuite/gas/riscv/satp.d: Removed. Already included in priv-reg.
422 * testsuite/gas/riscv/satp.s: Likewise.
423 * testsuite/gas/riscv/priv-reg-pseudo.d: New testcase for all pseudo
424 csr instruction, including alias-csr testcase.
425 * testsuite/gas/riscv/priv-reg-pseudo.s: Likewise.
426 * testsuite/gas/riscv/priv-reg-pseudo-noalias.d: New testcase for all
427 pseudo instruction with objdump -Mno-aliases.
428 * testsuite/gas/riscv/priv-reg-fail-nonexistent.d: New testcase.
429 * testsuite/gas/riscv/priv-reg-fail-nonexistent.l: Likewise.
430 * testsuite/gas/riscv/priv-reg-fail-nonexistent.s: Likewise.
431 * testsuite/gas/riscv/priv-reg.d: Update CSR to 1.11.
432 * testsuite/gas/riscv/priv-reg.s: Likewise.
433 * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
434 * testsuite/gas/riscv/csr-dw-regnums.d: Likewise.
435 * testsuite/gas/riscv/csr-dw-regnums.s: Likewise.
436
b7780957
J
4372020-03-25 J.W. Jagersma <jwjagersma@gmail.com>
438
439 * config/obj-coff.c (obj_coff_section): Set the bss flag on
440 sections with the "b" attribute.
441
d1023b5d
AM
4422020-03-22 Alan Modra <amodra@gmail.com>
443
444 * testsuite/gas/s12z/truncated.d: Update expected output.
445
0d832e7f
SB
4462020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
447
448 PR 25690
449 * config/tc-z80.c (md_pseudo_table): Add xdef anf xref pseudo ops.
450 * doc/c-z80.texi: Update documentation.
451
327ef784
NC
4522020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
453
454 PR 25641
455 PR 25668
456 PR 25633
457 Fix disassembling ED+A4/AC/B4/BC opcodes.
458 Fix assembling lines containing colonless label and instruction
459 with first operand inside parentheses.
460 Fix registration of unsupported by target CPU registers.
461 * config/tc-z80.c: See above.
462 * config/tc-z80.h: See above.
463 * testsuite/gas/z80/colonless.d: Update test.
464 * testsuite/gas/z80/colonless.s: Likewise.
465 * testsuite/gas/z80/ez80_adl_all.d: Likewise.
466 * testsuite/gas/z80/ez80_unsup_regs.d: Likewise.
467 * testsuite/gas/z80/ez80_z80_all.d: Likewise.
468 * testsuite/gas/z80/gbz80_unsup_regs.d: Likewise.
469 * testsuite/gas/z80/r800_unsup_regs.d: Likewise.
470 * testsuite/gas/z80/unsup_regs.s: Likewise.
471 * testsuite/gas/z80/z180_unsup_regs.d: Likewise.
472 * testsuite/gas/z80/z80.exp: Likewise.
473 * testsuite/gas/z80/z80_strict_unsup_regs.d: Likewise.
474 * testsuite/gas/z80/z80_unsup_regs.d: Likewise.
475 * testsuite/gas/z80/z80n_unsup_regs.d: Likewise.
476
66d1f7cc
AV
4772020-03-13 Andre Vieira <andre.simoesdiasvieira@arm.com>
478
479 PR 25660
480 * config/tc-arm.c (operand_parse_code): Add OP_RNSDMQR and OP_oRNSDMQ.
481 (parse_operands): Handle new operand codes.
482 (do_neon_dyadic_long): Make shape check accept the scalar variants.
483 (asm_opcode_insns): Fix operand codes for vaddl and vsubl.
484 * testsuite/gas/arm/mve-vaddsub-it.s: New test.
485 * testsuite/gas/arm/mve-vaddsub-it.d: New test.
486 * testsuite/gas/arm/mve-vaddsub-it-bad.s: New test.
487 * testsuite/gas/arm/mve-vaddsub-it-bad.l: New test.
488 * testsuite/gas/arm/mve-vaddsub-it-bad.d: New test.
489 * testsuite/gas/arm/nomve-vaddsub-it.d: New test.
490
9e8f1c90
L
4912020-03-11 H.J. Lu <hongjiu.lu@intel.com>
492
493 * NEWS: Mention x86 assembler options for CVE-2020-0551.
494
97b4a8f7
L
4952020-03-11 H.J. Lu <hongjiu.lu@intel.com>
496
497 * testsuite/gas/i386/i386.exp: Run new tests.
498 * testsuite/gas/i386/lfence-byte.d: New file.
499 * testsuite/gas/i386/lfence-byte.e: Likewise.
500 * testsuite/gas/i386/lfence-byte.s: Likewise.
501 * testsuite/gas/i386/lfence-indbr-a.d: Likewise.
502 * testsuite/gas/i386/lfence-indbr-b.d: Likewise.
503 * testsuite/gas/i386/lfence-indbr-c.d: Likewise.
504 * testsuite/gas/i386/lfence-indbr.e: Likewise.
505 * testsuite/gas/i386/lfence-indbr.s: Likewise.
506 * testsuite/gas/i386/lfence-load.d: Likewise.
507 * testsuite/gas/i386/lfence-load.s: Likewise.
508 * testsuite/gas/i386/lfence-ret-a.d: Likewise.
509 * testsuite/gas/i386/lfence-ret-b.d: Likewise.
510 * testsuite/gas/i386/lfence-ret.s: Likewise.
511 * testsuite/gas/i386/x86-64-lfence-byte.d: Likewise.
512 * testsuite/gas/i386/x86-64-lfence-byte.e: Likewise.
513 * testsuite/gas/i386/x86-64-lfence-byte.s: Likewise.
514 * testsuite/gas/i386/x86-64-lfence-indbr-a.d: Likewise.
515 * testsuite/gas/i386/x86-64-lfence-indbr-b.d: Likewise.
516 * testsuite/gas/i386/x86-64-lfence-indbr-c.d: Likewise.
517 * testsuite/gas/i386/x86-64-lfence-indbr.e: Likewise.
518 * testsuite/gas/i386/x86-64-lfence-indbr.s: Likewise.
519 * testsuite/gas/i386/x86-64-lfence-load.d: Likewise.
520 * testsuite/gas/i386/x86-64-lfence-load.s: Likewise.
521 * testsuite/gas/i386/x86-64-lfence-ret-a.d: Likewise.
522 * testsuite/gas/i386/x86-64-lfence-ret-b.d: Likewise.
523
ae531041
L
5242020-03-11 H.J. Lu <hongjiu.lu@intel.com>
525
526 * config/tc-i386.c (lfence_after_load): New.
527 (lfence_before_indirect_branch_kind): New.
528 (lfence_before_indirect_branch): New.
529 (lfence_before_ret_kind): New.
530 (lfence_before_ret): New.
531 (last_insn): New.
532 (load_insn_p): New.
533 (insert_lfence_after): New.
534 (insert_lfence_before): New.
535 (md_assemble): Call insert_lfence_before and insert_lfence_after.
536 Set last_insn.
537 (OPTION_MLFENCE_AFTER_LOAD): New.
538 (OPTION_MLFENCE_BEFORE_INDIRECT_BRANCH): New.
539 (OPTION_MLFENCE_BEFORE_RET): New.
540 (md_longopts): Add -mlfence-after-load=,
541 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
542 (md_parse_option): Handle -mlfence-after-load=,
543 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
544 (md_show_usage): Display -mlfence-after-load=,
545 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
546 (i386_cons_align): New.
547 * config/tc-i386.h (i386_cons_align): New.
548 (md_cons_align): New.
549 * doc/c-i386.texi: Document -mlfence-after-load=,
550 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
551
5496f3c6
NC
5522020-03-11 Nick Clifton <nickc@redhat.com>
553
554 PR 25611
555 PR 25614
556 * dwarf2dbg.c (DWARF2_FILE_TIME_NAME): Default to -1.
557 (DWARF2_FILE_SIZE_NAME): Default to -1.
558 (DWARF2_LINE_VERSION): Default to the current dwarf level or 3,
559 whichever is higher.
560 (DWARF2_LINE_MAX_OPS_PER_INSN): Provide a default value of 1.
561 (NUM_MD5_BYTES): Define.
562 (struct file entry): Add md5 field.
563 (get_filenum): Delete and replace with...
564 (get_basename): New function.
565 (get_directory_table_entry): New function.
566 (allocate_filenum): New function.
567 (allocate_filename_to_slot): New function.
568 (dwarf2_where): Use new functions.
569 (dwarf2_directive_filename): Add support for extended .file
570 pseudo-op.
571 (dwarf2_directive_loc): Allow the use of file number zero with
572 DWARF 5 or higher.
573 (out_file_list): Rename to...
574 (out_dir_and_file_list): Add DWARF 5 support.
575 (out_debug_line): Emit extra values into the section header for
576 DWARF 5.
577 (out_debug_str): Allow for file 0 to be used with DWARF 5.
578 * doc/as.texi (.file): Update the description of this pseudo-op.
579 * testsuite/gas/elf-dwarf-5-file0.s: Add more lines.
580 * testsuite/gas/elf-dwarf-5-file0.d: Update expected dump output.
581 * testsuite/gas/lns/lns-diag-1.l: Update expected error message.
582 * NEWS: Mention the new feature.
583
a6a1f5e0
AM
5842020-03-10 Alan Modra <amodra@gmail.com>
585
586 * config/tc-csky.c (get_operand_value): Rewrite 1 << 31 expressions
587 to avoid signed overflow.
588 * config/tc-mcore.c (md_assemble): Likewise.
589 * config/tc-mips.c (gpr_read_mask, gpr_write_mask): Likewise.
590 * config/tc-nds32.c (SET_ADDEND): Likewise.
591 * config/tc-nios2.c (nios2_assemble_arg_R): Likewise.
592
3fabc179
JB
5932020-03-09 Jan Beulich <jbeulich@suse.com>
594
595 * testsuite/gas/i386/avx.s: Add long-form VCMP[PS][SD] pseudos.
596 * testsuite/gas/i386/avx.d, testsuite/gas/i386/avx-16bit.d,
597 testsuite/gas/i386/avx-intel.d: Adjust expectations.
598
190e5fc8
AM
5992020-03-07 Alan Modra <amodra@gmail.com>
600
601 * testsuite/gas/elf/dwarf-5-file0.s: Don't start directives in
602 first column.
603
84d9ab33
NC
6042020-03-06 Nick Clifton <nickc@redhat.com>
605
606 PR 25614
607 * dwarf2dbg.c (dwarf2_directive_filename): Allow a file number of
608 0 if the dwarf_level is 5 or more. Complain if a filename follows
609 a file 0.
610 * testsuite/gas/elf/dwarf-5-file0.s: New test.
611 * testsuite/gas/elf/dwarf-5-file0.d: New test driver.
612 * testsuite/gas/elf/elf.exp: Run the new test.
613
614 PR 25612
615 * config/tc-ia64.h (DWARF2_VERISION): Fix typo.
616 * doc/as.texi: Fix another typo.
617
31bf1864
NC
6182020-03-06 Nick Clifton <nickc@redhat.com>
619
620 PR 25612
621 * as.c (dwarf_level): Define.
622 (show_usage): Add --gdwarf-3, --gdwarf-4 and --gdwarf-5.
623 (parse_args): Add support for the new options.
624 as.h (dwarf_level): Prototype.
625 * dwarf2dbg.c (DWARF2_VERSION): Use dwarf_level as default version
626 value.
627 * config/tc-ia64.h (DWARF2_VERISION): Update definition.
628 (DWARF2_LINE_VERSION): Remove definition.
629 * doc/as.texi: Document the new options.
630
3c968de5
NC
6312020-03-06 Nick Clifton <nickc@redhat.com>
632
633 PR 25572
634 * as.c (main): Allow matching input and outputs when they are
635 not regular files.
636
bc49bfd8
JB
6372020-03-06 Jan Beulich <jbeulich@suse.com>
638
639 * config/tc-i386.c (match_mem_size): Generalize broadcast special
640 casing.
641 (check_VecOperands): Zap xmmword/ymmword/zmmword when more than
642 one of byte/word/dword/qword is set alongside a SIMD register in
643 a template's operand.
644
4873e243
JB
6452020-03-06 Jan Beulich <jbeulich@suse.com>
646
647 * config/tc-i386.c (match_template): Extend code in logic
648 rejecting certain suffixes in certain modes to also cover mask
649 register use and VecSIB. Drop special casing of broadcast. Skip
650 immediates in the check.
651
e365e234
JB
6522020-03-06 Jan Beulich <jbeulich@suse.com>
653
654 * config/tc-i386.c (match_template): Fold duplicate code in
655 logic rejecting certain suffixes in certain modes. Drop
656 pointless "else".
657
4ed21b58
JB
6582020-03-06 Jan Beulich <jbeulich@suse.com>
659
660 * config/tc-i386.c (process_suffix): Exlucde !vexw insns
661 alongside !norex64 ones.
662 * testsuite/gas/i386/x86-64-avx512bw.s: Test VPEXTR* and VPINSR*
663 with both 32- and 64-bit GPR operands.
664 * testsuite/gas/i386/x86-64-avx512f.s: Test VEXTRACTPS with both
665 32- and 64-bit GPR operands.
666 * testsuite/gas/i386/x86-64-avx512bw-intel.d,
667 testsuite/gas/i386/x86-64-avx512bw.d,
668 testsuite/gas/i386/x86-64-avx512f-intel.d,
669 testsuite/gas/i386/x86-64-avx512f.d: Adjust expectations.
670
643bb870
JB
6712020-03-06 Jan Beulich <jbeulich@suse.com>
672
673 * config/tc-i386.c (md_assemble): Drop use of rex64.
674 (process_suffix): For REX.W for 64-bit CRC32.
675
a23b33b3
JB
6762020-03-06 Jan Beulich <jbeulich@suse.com>
677
678 * config/tc-i386.c (i386_addressing_mode): For 32-bit
679 addressing for MPX insns without base/index.
680 * testsuite/gas/i386/mpx-16bit.s,
681 * testsuite/gas/i386/mpx-16bit.d: New.
682 * testsuite/gas/i386/i386.exp: Run new test.
683
a0497384
JB
6842020-03-06 Jan Beulich <jbeulich@suse.com>
685
686 * testsuite/gas/i386/adx.s, testsuite/gas/i386/cet.s,
687 testsuite/gas/i386/ept.s, testsuite/gas/i386/fsgs.s,
688 testsuite/gas/i386/invpcid.s, testsuite/gas/i386/movdir.s,
689 testsuite/gas/i386/ptwrite.s, testsuite/gas/i386/vmx.s,
690 * testsuite/gas/i386/code16.s: Add CR, DR, and TR access cases
691 as well as a BSWAP one.
692 * testsuite/gas/i386/rdpid.s: Add 16-bit case.
693 * testsuite/gas/i386/sse2-16bit.s: Cover more insns.
694 * testsuite/gas/i386/adx-intel.d, testsuite/gas/i386/adx.d,
695 testsuite/gas/i386/cet-intel.d, testsuite/gas/i386/cet.d,
696 testsuite/gas/i386/code16.d, testsuite/gas/i386/ept-intel.d,
697 testsuite/gas/i386/ept.d, testsuite/gas/i386/fsgs-intel.d,
698 testsuite/gas/i386/fsgs.d, testsuite/gas/i386/invpcid-intel.d,
699 testsuite/gas/i386/invpcid.d, testsuite/gas/i386/movdir-intel.d,
700 testsuite/gas/i386/movdir.d, testsuite/gas/i386/ptwrite-intel.d,
701 testsuite/gas/i386/ptwrite.d, testsuite/gas/i386/rdpid-intel.d,
702 testsuite/gas/i386/rdpid.d, testsuite/gas/i386/sse2-16bit.d,
703 testsuite/gas/i386/vmx.d: Adjust expectations.
704
b630c145
JB
7052020-03-06 Jan Beulich <jbeulich@suse.com>
706
707 * config/tc-i386.c (md_assemble): Also exclude tpause and umwait
708 from having their operands swapped.
709 * testsuite/gas/i386/waitpkg.s,
710 testsuite/gas/i386/x86-64-waitpkg.s: Add tpause and umwait
711 3-operand cases as well as testing of 16-bit code generation.
712 * testsuite/gas/i386/waitpkg.d,
713 testsuite/gas/i386/waitpkg-intel.d,
714 testsuite/gas/i386/x86-64-waitpkg.d,
715 testsuite/gas/i386/x86-64-waitpkg-intel.d: Adjust expectations.
716
de48783e
NC
7172020-03-04 Nelson Chu <nelson.chu@sifive.com>
718
dee35d02
NC
719 * config/tc-riscv.c (percent_op_utype): Support the modifier
720 %got_pcrel_hi.
721 * doc/c-riscv.texi: Add documentation.
722 * testsuite/gas/riscv/no-relax-reloc.d: Add test case for the new
723 modifier %got_pcrel_hi.
724 * testsuite/gas/riscv/no-relax-reloc.s: Likewise.
725 * testsuite/gas/riscv/relax-reloc.d: Likewise.
726 * testsuite/gas/riscv/relax-reloc.s: Likewise.
727
de48783e
NC
728 * doc/c-riscv.texi (relocation modifiers): Add documentation.
729 (RISC-V-Formats): Update the section name from "Instruction Formats"
730 to "RISC-V Instruction Formats".
731
749479c8
AO
7322020-03-04 Alexandre Oliva <oliva@adacore.com>
733
734 * config/tc-arm.c (md_apply_fix): Warn if a PC-relative load is
735 detected in a section which does not have at least 4 byte
736 alignment.
737 * testsuite/gas/arm/armv8-ar-it-bad.s: Add alignment directive.
738 * testsuite/gas/arm/ldr-t.s: Likewise.
739 * testsuite/gas/arm/sp-pc-usage-t.s: Likewise.
740 * testsuite/gas/arm/sp-pc-usage-t.d: Finish test at end of
741 disassembly, ignoring any NOPs that may have been inserted because
742 of section alignment.
743 * testsuite/gas/arm/ldr-t.d: Likewise.
744
a847e322
JB
7452020-03-04 Jan Beulich <jbeulich@suse.com>
746
747 * config/tc-i386.c (cpu_arch): Add .sev_es entry.
748 * doc/c-i386.texi: Mention sev_es.
749 * testsuite/gas/i386/arch-13.s: Add SEV-ES case.
750 * testsuite/gas/i386/arch-13.d: Extend -march=. Adjust
751 expectations.
752 * testsuite/gas/i386/arch-13-znver1.d,
753 testsuite/gas/i386/arch-13-znver2.d: Extend -march=.
754
3cd7f3e3
L
7552020-03-03 H.J. Lu <hongjiu.lu@intel.com>
756
757 * config/tc-i386.c (match_template): Replace ignoresize and
758 defaultsize with mnemonicsize.
759 (process_suffix): Likewise.
760
b8ba1385
SB
7612020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
762
763 PR 25627
764 * config/tc-z80.c (emit_ld_rr_m): Fix invalid compilation of
765 instruction LD IY,(HL).
766 * testsuite/gas/z80/ez80_adl_all.d: Update expected disassembly.
767 * testsuite/gas/z80/ez80_adl_all.s: Add tests of the instruction.
768 * testsuite/gas/z80/ez80_z80_all.d: Update expected disassembly.
769 * testsuite/gas/z80/ez80_z80_all.s: Add tests of the instruction.
770
10d97a0f
L
7712020-03-03 H.J. Lu <hongjiu.lu@intel.com>
772
773 PR gas/25622
774 * testsuite/gas/i386/i386.exp: Run x86-64-default-suffix and
775 x86-64-default-suffix-avx.
776 * testsuite/gas/i386/noreg64.s: Remove cvtsi2sd, cvtsi2ss,
777 vcvtsi2sd, vcvtsi2ss, vcvtusi2sd and vcvtusi2ss entries.
778 * testsuite/gas/i386/noreg64.d: Updated.
779 * testsuite/gas/i386/noreg64.l: Likewise.
780 * testsuite/gas/i386/x86-64-default-suffix-avx.d: New file.
781 * testsuite/gas/i386/x86-64-default-suffix.d: Likewise.
782 * testsuite/gas/i386/x86-64-default-suffix.s: Likewise.
783
8326546e
SB
7842020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
785
786 PR 25604
787 * config/tc-z80.c (contains_register): Prevent an illegal memory
788 access when checking an expression for a register name.
789
e3e896e6
AM
7902020-03-03 Alan Modra <amodra@gmail.com>
791
792 * config/obj-coff.h: Remove vestiges of coff-m68k and pe-mips
793 support.
794
a4dd6c97
AM
7952020-03-02 Alan Modra <amodra@gmail.com>
796
797 * config/tc-m32r.c (md_begin): Set SEC_SMALL_DATA on .scommon section.
798 * config/tc-mips.c (s_change_sec): Set SEC_SMALL_DATA for .sdata
799 and .sbss sections.
800 * config/tc-score.c: Delete !BFD_ASSEMBLER code throughout.
801 (s3_s_change_sec): Set SEC_SMALL_DATA for .sbss section.
802 (s3_s_score_lcomm): Likewise.
803 * config/tc-score7.c: Similarly.
804 * read.c (bss_alloc): Set SEC_SMALL_DATA for .sbss section.
805
dec7b24b
YS
8062020-02-28 YunQiang Su <syq@debian.org>
807
808 PR gas/25539
809 * config/tc-mips.c (fix_loongson3_llsc): Compare label value
810 to handle multi-labels.
811 (has_label_name): New.
812
cceb53b8
MM
8132020-02-26 Matthew Malcomson <matthew.malcomson@arm.com>
814
815 * config/tc-arm.c (enum pred_instruction_type): Remove
816 NEUTRAL_IT_NO_VPT_INSN predication type.
817 (cxn_handle_predication): Modify to require condition suffixes.
818 (handle_pred_state): Remove NEUTRAL_IT_NO_VPT_INSN cases.
819 * testsuite/gas/arm/cde-scalar.s: Update test.
820 * testsuite/gas/arm/cde-warnings.l: Update test.
821 * testsuite/gas/arm/cde-warnings.s: Update test.
822
da3ec71f
AM
8232020-02-26 Alan Modra <amodra@gmail.com>
824
825 * config/tc-arm.c (reg_expected_msgs[REG_TYPE_RNB]): Don't use
826 N_() on empty string.
827
42135cad
AM
8282020-02-26 Alan Modra <amodra@gmail.com>
829
830 * read.c (read_a_source_file): Call strncpy with length one
831 less than size of original_case_string.
832
dc1e8a47
AM
8332020-02-26 Alan Modra <amodra@gmail.com>
834
835 * config/obj-elf.c: Indent labels correctly.
836 * config/obj-macho.c: Likewise.
837 * config/tc-aarch64.c: Likewise.
838 * config/tc-alpha.c: Likewise.
839 * config/tc-arm.c: Likewise.
840 * config/tc-cr16.c: Likewise.
841 * config/tc-crx.c: Likewise.
842 * config/tc-frv.c: Likewise.
843 * config/tc-i386-intel.c: Likewise.
844 * config/tc-i386.c: Likewise.
845 * config/tc-ia64.c: Likewise.
846 * config/tc-mn10200.c: Likewise.
847 * config/tc-mn10300.c: Likewise.
848 * config/tc-nds32.c: Likewise.
849 * config/tc-riscv.c: Likewise.
850 * config/tc-s12z.c: Likewise.
851 * config/tc-xtensa.c: Likewise.
852 * config/tc-z80.c: Likewise.
853 * read.c: Likewise.
854 * symbols.c: Likewise.
855 * write.c: Likewise.
856
bd0cf5a6
NC
8572020-02-20 Nelson Chu <nelson.chu@sifive.com>
858
54b2aec1
NC
859 * config/tc-riscv.c (riscv_ip): New boolean insn_with_csr to indicate
860 we are assembling instruction with CSR. Call riscv_csr_read_only_check
861 after parsing all arguments.
862 (enum csr_insn_type): New enum is used to classify the CSR instruction.
863 (riscv_csr_insn_type, riscv_csr_read_only_check): New functions. These
864 are used to check if we write a read-only CSR by the CSR instruction.
865 * testsuite/gas/riscv/priv-reg-fail-read-only-01.s: New testcase. Test
866 all CSR for the read-only CSR checking.
867 * testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise.
868 * testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
869 * testsuite/gas/riscv/priv-reg-fail-read-only-02.s: New testcase. Test
870 all CSR instructions for the read-only CSR checking.
871 * testsuite/gas/riscv/priv-reg-fail-read-only-02.d: Likewise.
872 * testsuite/gas/riscv/priv-reg-fail-read-only-02.l: Likewise.
873
2ca89224
NC
874 * config/tc-riscv.c (struct riscv_set_options): New field csr_check.
875 (riscv_opts): Initialize it.
876 (reg_lookup_internal): Check the `riscv_opts.csr_check`
877 before doing the CSR checking.
878 (enum options): Add OPTION_CSR_CHECK and OPTION_NO_CSR_CHECK.
879 (md_longopts): Add mcsr-check and mno-csr-check.
880 (md_parse_option): Handle new enum option values.
881 (s_riscv_option): Handle new long options.
882 * doc/c-riscv.texi: Add description for the new .option and assembler
883 options.
884 * testsuite/gas/riscv/priv-reg-fail-fext.d: Add `-mcsr-check` to enable
885 the CSR checking.
886 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.
887
bd0cf5a6
NC
888 * config/tc-riscv.c (csr_extra_hash): New.
889 (enum riscv_csr_class): New enum. Used to decide
890 whether or not this CSR is legal in the current ISA string.
891 (struct riscv_csr_extra): New structure to hold all extra information
892 of CSR.
893 (riscv_init_csr_hashes): New. According to the DECLARE_CSR and
894 DECLARE_CSR_ALIAS, insert CSR extra information into csr_extra_hash.
895 Call hash_reg_name to insert CSR address into reg_names_hash.
896 (reg_csr_lookup_internal, riscv_csr_class_check): New functions.
897 Decide whether the CSR is valid according to the csr_extra_hash.
898 (reg_lookup_internal): Call reg_csr_lookup_internal for CSRs.
899 (init_opcode_hash): Update 'if (hash_error != NULL)' as hash_error is
900 not a boolean. This is same as riscv_init_csr_hash, so keep the
901 consistent usage.
902 (md_begin): Call riscv_init_csr_hashes for each DECLARE_CSR.
903 * testsuite/gas/riscv/csr-dw-regnums.d: Add -march=rv32if option.
904 * testsuite/gas/riscv/priv-reg.d: Add f-ext by -march option.
905 * testsuite/gas/riscv/priv-reg-fail-fext.d: New testcase. The source
906 file is `priv-reg.s`, and the ISA is rv32i without f-ext, so the
907 f-ext CSR are not allowed.
908 * testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise.
909 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: New testcase. The
910 source file is `priv-reg.s`, and the ISA is rv64if, so the
911 rv32-only CSR are not allowed.
912 * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
913
10a95fcc
AM
9142020-02-21 Alan Modra <amodra@gmail.com>
915
916 * config/tc-pdp11.c (md_apply_fix): Handle BFD_RELOC_32.
917 (tc_gen_reloc): Only give a BAD_CASE assertion on pcrel relocs.
918
dda2980f
AM
9192020-02-21 Alan Modra <amodra@gmail.com>
920
921 PR 25569
922 * config/obj-aout.c (obj_aout_frob_file_before_fix): Don't loop
923 on section size adjustment, instead perform another write if
924 exec header size is larger than section size.
925
bd3380bc
NC
9262020-02-19 Nelson Chu <nelson.chu@sifive.com>
927
928 * doc/c-riscv.texi: Add the doc entries for -march-attr/
929 -mno-arch-attr command line options.
930
fa164239
JW
9312020-02-19 Nelson Chu <nelson.chu@sifive.com>
932
933 * testsuite/gas/riscv/c-add-addi.d: New testcase.
934 * testsuite/gas/riscv/c-add-addi.s: Likewise.
935
fcaaac0a
SB
9362020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
937
938 PR 25576
939 * config/tc-z80.c (md_parse_option): Do not use an underscore
940 prefix for local labels in SDCC compatability mode.
941 (z80_start_line_hook): Remove SDCC dollar label support.
942 * testsuite/gas/z80/sdcc.d: Update expected disassembly.
943 * testsuite/gas/z80/sdcc.s: Likewise.
944
9452020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
946
947 PR 25517
948 * config/tc-z80.c: Add -march option.
949 * doc/as.texi: Update Z80 documentation.
950 * doc/c-z80.texi: Likewise.
951 * testsuite/gas/z80/ez80_adl_all.d: Update command line.
952 * testsuite/gas/z80/ez80_adl_suf.d: Likewise.
953 * testsuite/gas/z80/ez80_pref_dis.d: Likewise.
954 * testsuite/gas/z80/ez80_z80_all.d: Likewise.
955 * testsuite/gas/z80/ez80_z80_suf.d: Likewise.
956 * testsuite/gas/z80/gbz80_all.d: Likewise.
957 * testsuite/gas/z80/r800_extra.d: Likewise.
958 * testsuite/gas/z80/r800_ii8.d: Likewise.
959 * testsuite/gas/z80/r800_z80_doc.d: Likewise.
960 * testsuite/gas/z80/sdcc.d: Likewise.
961 * testsuite/gas/z80/z180.d: Likewise.
962 * testsuite/gas/z80/z180_z80_doc.d: Likewise.
963 * testsuite/gas/z80/z80_doc.d: Likewise.
964 * testsuite/gas/z80/z80_ii8.d: Likewise.
965 * testsuite/gas/z80/z80_in_f_c.d: Likewise.
966 * testsuite/gas/z80/z80_op_ii_ld.d: Likewise.
967 * testsuite/gas/z80/z80_out_c_0.d: Likewise.
968 * testsuite/gas/z80/z80_sli.d: Likewise.
969 * testsuite/gas/z80/z80n_all.d: Likewise.
970 * testsuite/gas/z80/z80n_reloc.d: Likewise.
971
a7e12755
L
9722020-02-19 H.J. Lu <hongjiu.lu@intel.com>
973
974 * config/tc-i386.c (output_insn): Mark cvtpi2ps and cvtpi2pd
975 with GNU_PROPERTY_X86_FEATURE_2_MMX.
976 * testsuite/gas/i386/i386.exp: Run property-3 and
977 x86-64-property-3.
978 * testsuite/gas/i386/property-3.d: New file.
979 * testsuite/gas/i386/property-3.s: Likewise.
980 * testsuite/gas/i386/x86-64-property-3.d: Likewise.
981
272a84b1
L
9822020-02-17 H.J. Lu <hongjiu.lu@intel.com>
983
984 * config/tc-i386.c (cpu_arch): Add .popcnt.
985 * doc/c-i386.texi: Remove abm and .abm. Add popcnt and .popcnt.
986 Add a tab before @samp{.sse4a}.
987
c8f8eebc
JB
9882020-02-17 Jan Beulich <jbeulich@suse.com>
989
990 * config/tc-i386.c (process_suffix): Don't try to guess a suffix
991 for AddrPrefixOpReg templates. Combine the two pieces of
992 addrprefixopreg handling. Reject 16-bit address reg in 64-bit
993 mode.
994
eedb0f2c
JB
9952020-02-17 Jan Beulich <jbeulich@suse.com>
996
997 PR gas/14439
998 * config/tc-i386.c (md_assemble): Also suppress operand
999 swapping for MONITOR{,X} and MWAIT{,X}.
1000 * testsuite/gas/i386/sse3.s, testsuite/gas/i386/x86-64-sse3.s:
1001 Add Intel syntax monitor/mwait tests.
1002 * testsuite/gas/i386/sse3.d, testsuite/gas/i386/x86-64-sse3.d:
1003 Adjust expectations.
1004 *testsuite/gas/i386/sse3-intel.d,
1005 testsuite/gas/i386/x86-64-sse3-intel.d: New.
1006 * testsuite/gas/i386/i386.exp: Run new tests.
1007
b9915cbc
JB
10082020-02-17 Jan Beulich <jbeulich@suse.com>
1009
1010 PR gas/6518
1011 * config/tc-i386.c (process_suffix): Re-work Intel-syntax
1012 [XYZ]MMWord memory operand ambiguity recognition logic (largely
1013 re-indentation).
1014 * testsuite/gas/i386/avx512dq-inval.s: Add vcvtqq2ps/vcvtuqq2ps
1015 cases.
1016 * testsuite/gas/i386/inval-avx512f.s: Also test vcvtneps2bf16.
1017 * testsuite/gas/i386/avx512dq-inval.l,
1018 testsuite/gas/i386/inval-avx.l,
1019 testsuite/gas/i386/inval-avx512f.l: Adjust expectations.
1020 * testsuite/gas/i386/avx512vl-ambig.s,
1021 testsuite/gas/i386/avx512vl-ambig.l: New.
1022 * testsuite/gas/i386/i386.exp: Run new test.
1023
af5c13b0
L
10242020-02-16 H.J. Lu <hongjiu.lu@intel.com>
1025
1026 * config/tc-i386.c (cpu_arch): Add .sse4a and nosse4a. Restore
1027 nosse4.
1028 * doc/c-i386.texi: Document sse4a and nosse4a.
1029
07d98387
L
10302020-02-14 H.J. Lu <hongjiu.lu@intel.com>
1031
1032 * doc/c-i386.texi: Remove the old movsx and movzx documentation
1033 for AT&T syntax.
1034
65fca059
JB
10352020-02-14 Jan Beulich <jbeulich@suse.com>
1036
1037 PR gas/25438
1038 * config/tc-i386.c (md_assemble): Move movsx/movzx special
1039 casing ...
1040 (process_suffix): ... here. Consider just the first operand
1041 initially.
1042 (check_long_reg): Drop opcode 0x63 special case again.
1043 * testsuite/gas/i386/i386.s, testsuite/gas/i386/iamcu-1.s,
1044 testsuite/gas/i386/ilp32/x86-64.s, testsuite/gas/i386/x86_64.s:
1045 Move ambiguous operand size tests ...
1046 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
1047 testsuite/gas/i386/noreg64.s: ... here.
1048 * testsuite/gas/i386/i386.d, testsuite/gas/i386/i386-intel.d
1049 testsuite/gas/i386/iamcu-1.d, testsuite/gas/i386/ilp32/x86-64.d,
1050 testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
1051 testsuite/gas/i386/movx16.l, testsuite/gas/i386/movx32.l,
1052 testsuite/gas/i386/movx64.l, testsuite/gas/i386/noreg16.d,
1053 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
1054 testsuite/gas/i386/x86-64-movsxd.d,
1055 testsuite/gas/i386/x86-64-movsxd-intel.d,
1056 testsuite/gas/i386/x86_64.d, testsuite/gas/i386/x86_64-intel.d:
1057 Adjust expectations.
1058 * testsuite/gas/i386/movx16.s, testsuite/gas/i386/movx16.l,
1059 testsuite/gas/i386/movx32.s, testsuite/gas/i386/movx32.l,
1060 testsuite/gas/i386/movx64.s, testsuite/gas/i386/movx64.l: New.
1061 * testsuite/gas/i386/i386.exp: Run new tests.
1062
b6773884
JB
10632020-02-14 Jan Beulich <jbeulich@suse.com>
1064
1065 * config/tc-i386.c (process_operands): Also skip segment
1066 override prefix emission if it matches an already present one.
1067 * testsuite/gas/i386/prefix32.s: Add double segment override
1068 cases.
1069 * testsuite/gas/i386/prefix32.l: Adjust expectations.
1070
92334ad2
JB
10712020-02-14 Jan Beulich <jbeulich@suse.com>
1072
1073 * config/tc-i386.c (process_operands): Drop ineffectual segment
1074 overrides when optimizing.
1075 * testsuite/gas/i386/lea-optimize.d: New.
1076 * testsuite/gas/i386/i386.exp: Run new test.
1077
10782020-02-14 Jan Beulich <jbeulich@suse.com>
514a8bb0
JB
1079
1080 * config/tc-i386.c (process_operands): Also check insn prefix
1081 for ineffectual segment override warning. Don't cover possible
1082 VEX/EVEX encoded insns there.
1083 * testsuite/gas/i386/lea.s, testsuite/gas/i386/lea.d,
1084 testsuite/gas/i386/lea.e: New.
1085 * testsuite/gas/i386/i386.exp: Run new test.
1086
0e6724de
L
10872020-02-14 H.J. Lu <hongjiu.lu@intel.com>
1088
1089 PR gas/25438
1090 * doc/c-i386.texi: Document movsx, movsxd and movzx for AT&T
1091 syntax.
1092
292676c1
L
10932020-02-13 Fangrui Song <maskray@google.com>
1094 H.J. Lu <hongjiu.lu@intel.com>
1095
1096 PR gas/25551
1097 * config/tc-i386.c (tc_i386_fix_adjustable): Don't check
1098 BFD_RELOC_386_PLT32 nor BFD_RELOC_X86_64_PLT32.
1099 * testsuite/gas/i386/i386.exp: Run relax-5 and x86-64-relax-4.
1100 * testsuite/gas/i386/relax-5.d: New file.
1101 * testsuite/gas/i386/relax-5.s: Likewise.
1102 * testsuite/gas/i386/x86-64-relax-4.d: Likewise.
1103 * testsuite/gas/i386/x86-64-relax-4.s: Likewise.
1104
7deea9aa
JB
11052020-02-13 Jan Beulich <jbeulich@suse.com>
1106
1107 * config/tc-i386.c (cpu_noarch): Use CPU_ANY_SSE4_FLAGS in
1108 "nosse4" entry.
1109
6c0946d0
JB
11102020-02-12 Jan Beulich <jbeulich@suse.com>
1111
1112 * config/tc-i386.c (avx512): New (at file scope), moved from
1113 (check_VecOperands): ... here.
1114 (process_suffix): Add [XYZ]MMword operand size handling.
1115 * testsuite/gas/i386/avx512dq-inval.s: Add VFPCLASS tests.
1116 * testsuite/gas/i386/noavx512-2.s: Add Intel syntax VFPCLASS
1117 tests.
1118 * testsuite/gas/i386/avx512dq-inval.l,
1119 testsuite/gas/i386/noavx512-2.l: Adjust expectations.
1120
5990e377
JB
11212020-02-12 Jan Beulich <jbeulich@suse.com>
1122
1123 PR gas/24546
1124 * config/tc-i386.c (match_template): Apply AMD64 check to 64-bit
1125 code only.
1126 * config/tc-i386-intel.c (i386_intel_operand): Also handle
1127 CALL/JMP in O_tbyte_ptr case.
1128 * doc/c-i386.texi: Mention far call and full pointer load ISA
1129 differences.
1130 * testsuite/gas/i386/x86-64-branch-3.s,
1131 testsuite/gas/i386/x86-64-intel64.s: Add 64-bit far call cases.
1132 * testsuite/gas/i386/x86-64-branch-3.d,
1133 testsuite/gas/i386/x86-64-intel64.d: Adjust expectations.
1134 * testsuite/gas/i386/x86-64-branch-5.l,
1135 testsuite/gas/i386/x86-64-branch-5.s: New.
1136 * testsuite/gas/i386/i386.exp: Run new test.
1137
9706160a
JB
11382020-02-12 Jan Beulich <jbeulich@suse.com>
1139
1140 PR gas/25438
1141 * config/tc-i386.c (REGISTER_WARNINGS): Delete.
1142 (check_byte_reg): Skip only source operand of CRC32. Drop Non-
1143 64-bit-only warning.
1144 (check_word_reg): Consistently error on mismatching register
1145 size and suffix.
1146 * testsuite/gas/i386/general.s: Replace dword GPR with word one
1147 for movw. Replace suffix / GPR for orb.
1148 * testsuite/gas/i386/inval.s: Add tests for movw with dword and
1149 byte GPRs as well as ones for inb/outb with a word accumulator.
1150 * testsuite/gas/i386/general.l, testsuite/gas/i386/intelbad.l,
1151 testsuite/gas/i386/inval.l: Adjust expectations.
1152
5de4d9ef
JB
11532020-02-12 Jan Beulich <jbeulich@suse.com>
1154
1155 * config/tc-i386.c (operand_type_register_match): Also fall
1156 through initial two if()-s when the template allows for a GPR
1157 operand. Adjust comment.
1158
50128d0c
JB
11592020-02-11 Jan Beulich <jbeulich@suse.com>
1160
1161 (struct _i386_insn): New field "short_form".
1162 (optimize_encoding): Drop setting of shortform field.
1163 (process_suffix): Set i.short_form. Replace shortform use.
1164 (process_operands): Replace shortform use.
1165
1ed818b4
MM
11662020-02-11 Matthew Malcomson <matthew.malcomson@arm.com>
1167
1168 * config/tc-arm.c (vcx_handle_register_arguments): Remove `for`
1169 loop initial declaration.
1170
5aae9ae9
MM
11712020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
1172
1173 * config/tc-arm.c (NEON_MAX_TYPE_ELS): Increment to account for
1174 instructions that can have 5 arguments.
1175 (enum operand_parse_code): Add new operands.
1176 (parse_operands): Account for new operands.
1177 (S5): New macro.
1178 (enum neon_shape_el): Introduce P suffixes for coprocessor.
1179 (neon_select_shape): Account for P suffix.
1180 (LOW1): Move macro to global position.
1181 (HI4): Move macro to global position.
1182 (vcx_assign_vec_d): New.
1183 (vcx_assign_vec_m): New.
1184 (vcx_assign_vec_n): New.
1185 (enum vcx_reg_type): New.
1186 (vcx_get_reg_type): New.
1187 (vcx_size_pos): New.
1188 (vcx_vec_pos): New.
1189 (vcx_handle_shape): New.
1190 (vcx_ensure_register_in_range): New.
1191 (vcx_handle_register_arguments): New.
1192 (vcx_handle_insn_block): New.
1193 (vcx_handle_common_checks): New.
1194 (do_vcx1): New.
1195 (do_vcx2): New.
1196 (do_vcx3): New.
1197 * testsuite/gas/arm/cde-missing-fp.d: New test.
1198 * testsuite/gas/arm/cde-missing-fp.l: New test.
1199 * testsuite/gas/arm/cde-missing-mve.d: New test.
1200 * testsuite/gas/arm/cde-missing-mve.l: New test.
1201 * testsuite/gas/arm/cde-mve-or-neon.d: New test.
1202 * testsuite/gas/arm/cde-mve-or-neon.s: New test.
1203 * testsuite/gas/arm/cde-mve.s: New test.
1204 * testsuite/gas/arm/cde-warnings.l:
1205 * testsuite/gas/arm/cde-warnings.s:
1206 * testsuite/gas/arm/cde.d:
1207 * testsuite/gas/arm/cde.s:
1208
4934a27c
MM
12092020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
1210 Matthew Malcomson <matthew.malcomson@arm.com>
1211
1212 * config/tc-arm.c (arm_ext_cde*): New feature sets for each
1213 CDE coprocessor that can be enabled.
1214 (enum pred_instruction_type): New pred type.
1215 (BAD_NO_VPT): New error message.
1216 (BAD_CDE): New error message.
1217 (BAD_CDE_COPROC): New error message.
1218 (enum operand_parse_code): Add new immediate operands.
1219 (parse_operands): Account for new immediate operands.
1220 (check_cde_operand): New.
1221 (cde_coproc_enabled): New.
1222 (cde_coproc_pos): New.
1223 (cde_handle_coproc): New.
1224 (cxn_handle_predication): New.
1225 (do_custom_instruction_1): New.
1226 (do_custom_instruction_2): New.
1227 (do_custom_instruction_3): New.
1228 (do_cx1): New.
1229 (do_cx1a): New.
1230 (do_cx1d): New.
1231 (do_cx1da): New.
1232 (do_cx2): New.
1233 (do_cx2a): New.
1234 (do_cx2d): New.
1235 (do_cx2da): New.
1236 (do_cx3): New.
1237 (do_cx3a): New.
1238 (do_cx3d): New.
1239 (do_cx3da): New.
1240 (handle_pred_state): Define new IT block behaviour.
1241 (insns): Add newn CX*{,d}{,a} instructions.
1242 (CDE_EXTENSIONS,armv8m_main_ext_table,armv8_1m_main_ext_table):
1243 Define new cdecp extension strings.
1244 * doc/c-arm.texi: Document new cdecp extension arguments.
1245 * testsuite/gas/arm/cde-scalar.d: New test.
1246 * testsuite/gas/arm/cde-scalar.s: New test.
1247 * testsuite/gas/arm/cde-warnings.d: New test.
1248 * testsuite/gas/arm/cde-warnings.l: New test.
1249 * testsuite/gas/arm/cde-warnings.s: New test.
1250 * testsuite/gas/arm/cde.d: New test.
1251 * testsuite/gas/arm/cde.s: New test.
1252
4b5aaf5f
L
12532020-02-10 H.J. Lu <hongjiu.lu@intel.com>
1254
1255 PR gas/25516
1256 * config/tc-i386.c (intel64): Renamed to ...
1257 (isa64): This.
1258 (match_template): Accept Intel64 only instruction by default.
1259 (i386_displacement): Updated.
1260 (md_parse_option): Updated.
1261 * c-i386.texi: Update -mamd64/-mintel64 documentation.
1262 * testsuite/gas/i386/i386.exp: Run x86-64-sysenter. Pass
1263 -mamd64 to x86-64-sysenter-amd.
1264 * testsuite/gas/i386/x86-64-sysenter.d: New file.
1265
33176d91
AM
12662020-02-10 Alan Modra <amodra@gmail.com>
1267
1268 * config/obj-elf.c (obj_elf_change_section): Error for section
1269 type, attr or entsize changes in assembly.
1270 * testsuite/gas/elf/elf.exp: Pass -Z to gas for section5 test.
1271 * testsuite/gas/elf/section5.l: Update.
1272
82194874
AM
12732020-02-10 Alan Modra <amodra@gmail.com>
1274
1275 * output-file.c (output_file_close): Do a normal close when
1276 flag_always_generate_output.
1277 * write.c (write_object_file): Don't stop output when
1278 flag_always_generate_output.
1279
9fc0b501
SB
12802020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
1281
1282 PR 25469
1283 * config/tc-z80.c: Add -gbz80 command line option to generate code
1284 for the GameBoy Z80. Add support for generating DWARF.
1285 * config/tc-z80.h: Add support for DWARF debug information
1286 generation.
1287 * doc/c-z80.texi: Document new command line option.
1288 * testsuite/gas/z80/gbz80_all.d: New file.
1289 * testsuite/gas/z80/gbz80_all.s: New file.
1290 * testsuite/gas/z80/z80.exp: Run the new tests.
1291 * testsuite/gas/z80/z80n_all.d: New file.
1292 * testsuite/gas/z80/z80n_all.s: New file.
1293 * testsuite/gas/z80/z80n_reloc.d: New file.
1294
b7d07216
L
12952020-02-06 H.J. Lu <hongjiu.lu@intel.com>
1296
1297 PR gas/25381
1298 * config/obj-elf.c (get_section): Also check
1299 linked_to_symbol_name.
1300 (obj_elf_change_section): Also set map_head.linked_to_symbol_name.
1301 (obj_elf_parse_section_letters): Handle the 'o' flag.
1302 (build_group_lists): Renamed to ...
1303 (build_additional_section_info): This. Set elf_linked_to_section
1304 from map_head.linked_to_symbol_name.
1305 (elf_adjust_symtab): Updated.
1306 * config/obj-elf.h (elf_section_match): Add linked_to_symbol_name.
1307 * doc/as.texi: Document the 'o' flag.
1308 * testsuite/gas/elf/elf.exp: Run PR gas/25381 tests.
1309 * testsuite/gas/elf/section18.d: New file.
1310 * testsuite/gas/elf/section18.s: Likewise.
1311 * testsuite/gas/elf/section19.d: Likewise.
1312 * testsuite/gas/elf/section19.s: Likewise.
1313 * testsuite/gas/elf/section20.d: Likewise.
1314 * testsuite/gas/elf/section20.s: Likewise.
1315 * testsuite/gas/elf/section21.d: Likewise.
1316 * testsuite/gas/elf/section21.l: Likewise.
1317 * testsuite/gas/elf/section21.s: Likewise.
1318
5eb617a7
L
13192020-02-06 H.J. Lu <hongjiu.lu@intel.com>
1320
1321 * NEWS: Mention x86 assembler options to align branches for
1322 binutils 2.34.
1323
986ac314
L
13242020-02-06 H.J. Lu <hongjiu.lu@intel.com>
1325
1326 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique
1327 only for ELF targets.
1328 * testsuite/gas/i386/unique.d: Don't xfail.
1329 * testsuite/gas/i386/x86-64-unique.d: Likewise.
1330
19234a6d
AM
13312020-02-06 Alan Modra <amodra@gmail.com>
1332
1333 * testsuite/gas/i386/unique.d: xfail for non-elf targets.
1334 * testsuite/gas/i386/x86-64-unique.d: Likewise.
1335
02e0be69
AM
13362020-02-06 Alan Modra <amodra@gmail.com>
1337
1338 * testsuite/gas/elf/section12a.d: Use supports_gnu_osabi in
1339 xfail, and rename test.
1340 * testsuite/gas/elf/section12b.d: Likewise.
1341 * testsuite/gas/elf/section16a.d: Likewise.
1342 * testsuite/gas/elf/section16b.d: Likewise.
1343
a8c4d40b
L
13442020-02-02 H.J. Lu <hongjiu.lu@intel.com>
1345
1346 PR gas/25380
1347 * config/obj-elf.c (section_match): Removed.
1348 (get_section): Also match SEC_ASSEMBLER_SECTION_ID and
1349 section_id.
1350 (obj_elf_change_section): Replace info and group_name arguments
1351 with match_p. Also update the section ID and flags from match_p.
1352 (obj_elf_section): Handle "unique,N". Update call to
1353 obj_elf_change_section.
1354 * config/obj-elf.h (elf_section_match): New.
1355 (obj_elf_change_section): Updated.
1356 * config/tc-arm.c (start_unwind_section): Update call to
1357 obj_elf_change_section.
1358 * config/tc-ia64.c (obj_elf_vms_common): Likewise.
1359 * config/tc-microblaze.c (microblaze_s_data): Likewise.
1360 (microblaze_s_sdata): Likewise.
1361 (microblaze_s_rdata): Likewise.
1362 (microblaze_s_bss): Likewise.
1363 * config/tc-mips.c (s_change_section): Likewise.
1364 * config/tc-msp430.c (msp430_profiler): Likewise.
1365 * config/tc-rx.c (parse_rx_section): Likewise.
1366 * config/tc-tic6x.c (tic6x_start_unwind_section): Likewise.
1367 * doc/as.texi: Document "unique,N" in .section directive.
1368 * testsuite/gas/elf/elf.exp: Run "unique,N" tests.
1369 * testsuite/gas/elf/section15.d: New file.
1370 * testsuite/gas/elf/section15.s: Likewise.
1371 * testsuite/gas/elf/section16.s: Likewise.
1372 * testsuite/gas/elf/section16a.d: Likewise.
1373 * testsuite/gas/elf/section16b.d: Likewise.
1374 * testsuite/gas/elf/section17.d: Likewise.
1375 * testsuite/gas/elf/section17.l: Likewise.
1376 * testsuite/gas/elf/section17.s: Likewise.
1377 * testsuite/gas/i386/unique.d: Likewise.
1378 * testsuite/gas/i386/unique.s: Likewise.
1379 * testsuite/gas/i386/x86-64-unique.d: Likewise.
1380 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique.
1381
575d37ae
L
13822020-02-02 H.J. Lu <hongjiu.lu@intel.com>
1383
1384 * testsuite/gas/elf/section13.s: Replace @nobits with %nobits.
1385
2384096c
G
13862020-02-01 Anthony Green <green@moxielogic.com>
1387
1388 * config/tc-moxie.c (md_begin): Don't force big-endian mode.
1389
95441c43
SL
13902020-01-31 Sandra Loosemore <sandra@codesourcery.com>
1391
1392 * config/tc-nios2.c (nios2_cons): Handle %gotoff as well as
1393 %tls_ldo.
1394
d465d695
AV
13952020-01-31 Andre Vieira <andre.simoesdiasvieira@arm.com>
1396
1397 PR gas/25472
1398 * config/tc-arm.c (armv8m_main_ext_table): Refactored +dsp adding.
1399 (armv8_1m_main_ext_table): Refactored +dsp adding and enabled dsp for
1400 +mve.
1401 * testsuite/gas/arm/mve_dsp.d: New test.
1402
d26cc8a9
NC
14032020-01-31 Nick Clifton <nickc@redhat.com>
1404
1405 * config/tc-s390.c (s390_elf_suffix): Return ELF_SUFFIX_NONE
1406 rather than BFD_RELOC_NONE.
1407
90e9955a
SP
14082020-01-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
1409
1410 * config/tc-arm.c (fldmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2"
1411 to support VLDMIA instruction for MVE.
1412 (fldmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VLDMDB
1413 instruction for MVE.
1414 (fstmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMIA
1415 instruction for MVE.
1416 (fstmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMDB
1417 instruction for MVE.
1418 * testsuite/gas/arm/mve-ldst.d: New test.
1419 * testsuite/gas/arm/mve-ldst.s: Likewise.
1420
53943f32
NC
14212020-01-31 Nick Clifton <nickc@redhat.com>
1422
1423 * po/fr.po: Updated French translation.
1424 * po/ru.po: Updated Russian translation.
1425
c3036ed0
RS
14262020-01-31 Richard Sandiford <richard.sandiford@arm.com>
1427
1428 * testsuite/gas/aarch64/sve-bfloat-movprfx.s: Use .h rather than
1429 .s for the movprfx.
1430 * testsuite/gas/aarch64/sve-bfloat-movprfx.d: Update accordingly.
1431 * testsuite/gas/aarch64/sve-movprfx_28.d,
1432 * testsuite/gas/aarch64/sve-movprfx_28.l,
1433 * testsuite/gas/aarch64/sve-movprfx_28.s: New test.
1434
2ae4c703
JB
14352020-01-30 Jan Beulich <jbeulich@suse.com>
1436
1437 * config/tc-i386.c (output_disp): Tighten base_opcode check.
1438 * testsuite/gas/i386/got.s: Add LSL, MOVLPS, and BNDCN cases.
1439 * testsuite/gas/i386/got-no-relax.d, testsuite/gas/i386/got.d:
1440 Adjust expectations.
1441
bd434cc4
JM
14422020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
1443
1444 * testsuite/gas/bpf/alu.d: Update expected opcode for `neg'.
1445 * testsuite/gas/bpf/alu-be.d: Likewise.
1446 * testsuite/gas/bpf/alu32.d: Likewise for `neg32'.
1447 * testsuite/gas/bpf/alu32-be.d: Likewise.
1448
aeab2b26
JB
14492020-01-30 Jan Beulich <jbeulich@suse.com>
1450
1451 * testsuite/gas/i386/x86-64-branch-2.s,
1452 testsuite/gas/i386/x86-64-branch-4.s,
1453 testsuite/gas/i386/x86-64-branch.s: Add RETW cases.
1454 * testsuite/gas/i386/ilp32/x86-64-branch.d,
1455 testsuite/gas/i386/x86-64-branch-2.d,
1456 testsuite/gas/i386/x86-64-branch-4.l,
1457 testsuite/gas/i386/x86-64-branch.d: Adjust expectations.
1458
873494c8
JB
14592020-01-30 Jan Beulich <jbeulich@suse.com>
1460
1461 * config/tc-i386.c (process_suffix): .
1462 testsuite/gas/i386/noreg64.s: Add IRET and LRET cases.
1463 testsuite/gas/i386/x86-64-opcode.s: Add suffix to IRET and LRET.
1464 Add LRETQ case.
1465 testsuite/gas/i386/x86-64-suffix.s: Drop IRET case without
1466 suffix.
1467 testsuite/gas/i386/x86_64.s: Add RETF cases.
1468 * testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
1469 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l,
1470 testsuite/gas/i386/x86-64-opcode.d,
1471 testsuite/gas/i386/x86-64-suffix-intel.d,
1472 testsuite/gas/i386/x86-64-suffix.d,
1473 testsuite/gas/i386/x86_64-intel.d
1474 testsuite/gas/i386/x86_64.d: Adjust expectations.
1475 * testsuite/gas/i386/x86-64-suffix.e,
1476 testsuite/gas/i386/x86_64.e: New.
1477
62b3f548
JB
14782020-01-30 Jan Beulich <jbeulich@suse.com>
1479
1480 * config/tc-i386.c (process_suffix): Redo and move FLDENV et al
1481 special case.
1482
bc31405e
L
14832020-01-27 H.J. Lu <hongjiu.lu@intel.com>
1484
1485 PR binutils/25445
1486 * config/tc-i386.c (check_long_reg): Also convert to QWORD for
1487 movsxd.
1488 * doc/c-i386.texi: Add a node for AMD64 vs. Intel64 ISA
1489 differences. Document movslq and movsxd.
1490 * testsuite/gas/i386/i386.exp: Run PR binutils/25445 tests.
1491 * testsuite/gas/i386/x86-64-movsxd-intel.d: New file.
1492 * testsuite/gas/i386/x86-64-movsxd-intel64-intel.d: Likewise.
1493 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.l: Likewise.
1494 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.s: Likewise.
1495 * testsuite/gas/i386/x86-64-movsxd-intel64.d: Likewise.
1496 * testsuite/gas/i386/x86-64-movsxd-intel64.s: Likewise.
1497 * testsuite/gas/i386/x86-64-movsxd-inval.l: Likewise.
1498 * testsuite/gas/i386/x86-64-movsxd-inval.s: Likewise.
1499 * testsuite/gas/i386/x86-64-movsxd.d: Likewise.
1500 * testsuite/gas/i386/x86-64-movsxd.s: Likewise.
1501
e3696f67
AM
15022020-01-27 Alan Modra <amodra@gmail.com>
1503
1504 * testsuite/gas/all/gas.exp: Replace case statements with switch
1505 statements.
1506 * testsuite/gas/elf/elf.exp: Likewise.
1507 * testsuite/gas/macros/macros.exp: Likewise.
1508 * testsuite/lib/gas-defs.exp: Likewise.
1509
7568c93b
TC
15102020-01-27 Tamar Christina <tamar.christina@arm.com>
1511
1512 PR 25403
1513 * testsuite/gas/aarch64/armv8_4-a.d: Add cfinv.
1514 * testsuite/gas/aarch64/armv8_4-a.s: Likewise.
1515
403d1bd9
JW
15162020-01-22 Maxim Blinov <maxim.blinov@embecosm.com>
1517
1518 * testsuite/gas/riscv/march-ok-s.d: sx is no longer valid and
1519 s exts must be known, so rename *ok* to *fail*.
1520 * testsuite/gas/riscv/march-ok-sx.d: Likewise.
1521 * testsuite/gas/riscv/march-ok-s-with-version: Likewise.
1522 * testsuite/gas/riscv/march-fail-s.l: Expected error messages for
1523 above change.
1524 * testsuite/gas/riscv/march-fail-sx.l: Likewise.
1525 * testsuite/gas/riscv/march-fail-sx-with-version.l: Likewise.
1526
be4c5e58
L
15272020-01-22 H.J. Lu <hongjiu.lu@intel.com>
1528
1529 PR gas/25438
1530 * config/tc-i386.c (check_long_reg): Always disallow double word
1531 suffix in mnemonic with word general register.
1532 * testsuite/gas/i386/general.s: Replace word general register
1533 with double word general register for movl.
1534 * testsuite/gas/i386/inval.s: Add tests for movl with word general
1535 register.
1536 * testsuite/gas/i386/general.l: Updated.
1537 * testsuite/gas/i386/inval.l: Likewise.
1538
9e7028aa
AM
15392020-01-22 Alan Modra <amodra@gmail.com>
1540
1541 * config/tc-ppc.c (parse_tls_arg): Handle tls arg for
1542 __tls_get_addr_desc and __tls_get_addr_opt.
1543
e3ed17f3
JB
15442020-01-21 Jan Beulich <jbeulich@suse.com>
1545
1546 * testsuite/gas/i386/inval-crc32.s,
1547 testsuite/gas/i386/x86-64-inval-crc32.s: Add alignment directive.
1548 * testsuite/gas/i386/inval-crc32.l,
1549 testsuite/gas/i386/x86-64-inval-crc32.l: Adjust expectations.
1550
1a035124
JB
15512020-01-21 Jan Beulich <jbeulich@suse.com>
1552
1553 * config/tc-i386.c (process_suffix): Merge CRC32 handling into
1554 generic code path. Deal with No_lSuf being set in a template.
1555 * testsuite/gas/i386/inval-crc32.l,
1556 testsuite/gas/i386/x86-64-inval-crc32.l: Expect warning(s)
1557 instead of error(s) when operand size is ambiguous.
1558 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
1559 testsuite/gas/i386/noreg64.s: Add CRC32 tests.
1560 * testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg16.l,
1561 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg32.l,
1562 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l:
1563 Adjust expectations.
1564
c006a730
JB
15652020-01-21 Jan Beulich <jbeulich@suse.com>
1566
1567 * config/tc-i386.c (process_suffix): Drop SYSRET special case
1568 and an intel_syntax check. Re-write lack-of-suffix processing
1569 logic.
1570 * doc/c-i386.texi: Document operand size defaults for suffix-
1571 less AT&T syntax insns.
1572 * testsuite/gas/i386/bundle.s, testsuite/gas/i386/lock-1.s,
1573 testsuite/gas/i386/opcode.s, testsuite/gas/i386/sse3.s,
1574 testsuite/gas/i386/x86-64-avx-scalar.s,
1575 testsuite/gas/i386/x86-64-avx.s,
1576 testsuite/gas/i386/x86-64-bundle.s,
1577 testsuite/gas/i386/x86-64-intel64.s,
1578 testsuite/gas/i386/x86-64-lock-1.s,
1579 testsuite/gas/i386/x86-64-opcode.s,
1580 testsuite/gas/i386/x86-64-sse2avx.s,
1581 testsuite/gas/i386/x86-64-sse3.s: Add missing suffixes.
1582 * testsuite/gas/i386/nops.s, testsuite/gas/i386/sse-noavx.s,
1583 testsuite/gas/i386/x86-64-nops.s,
1584 testsuite/gas/i386/x86-64-ptwrite.s,
1585 testsuite/gas/i386/x86-64-simd.s,
1586 testsuite/gas/i386/x86-64-sse-noavx.s,
1587 testsuite/gas/i386/x86-64-suffix.s: Drop bogus suffix-less
1588 insns.
1589 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
1590 testsuite/gas/i386/noreg64.s: Add further tests.
1591 * testsuite/gas/i386/ilp32/x86-64-nops.d,
1592 testsuite/gas/i386/nops.d, testsuite/gas/i386/noreg16.d,
1593 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
1594 testsuite/gas/i386/sse-noavx.d,
1595 testsuite/gas/i386/x86-64-intel64.d,
1596 testsuite/gas/i386/x86-64-nops.d,
1597 testsuite/gas/i386/x86-64-opcode.d,
1598 testsuite/gas/i386/x86-64-ptwrite-intel.d,
1599 testsuite/gas/i386/x86-64-ptwrite.d,
1600 testsuite/gas/i386/x86-64-simd-intel.d,
1601 testsuite/gas/i386/x86-64-simd-suffix.d,
1602 testsuite/gas/i386/x86-64-simd.d,
1603 testsuite/gas/i386/x86-64-sse-noavx.d
1604 testsuite/gas/i386/x86-64-suffix.d,
1605 testsuite/gas/i386/x86-64-suffix-intel.d: Adjust expectations.
1606 * testsuite/gas/i386/noreg16.l, testsuite/gas/i386/noreg32.l,
1607 testsuite/gas/i386/noreg64.l: New.
1608 * testsuite/gas/i386/i386.exp: Run new tests.
1609
c906a69a
JB
16102020-01-21 Jan Beulich <jbeulich@suse.com>
1611
1612 * testsuite/gas/i386/avx512_bf16_vl.s,
1613 testsuite/gas/i386/x86-64-avx512_bf16_vl.s: Add broadcast forms
1614 of VCVTNEPS2BF16{X,Y}. Add operand-size less Intel syntax
1615 broadcast forms of VCVTNEPS2BF16.
1616 * testsuite/gas/i386/avx512_bf16_vl.d,
1617 testsuite/gas/i386/x86-64-avx512_bf16_vl.d: Adjust expectations.
1618
26916852
NC
16192020-01-20 Nick Clifton <nickc@redhat.com>
1620
1621 * po/uk.po: Updated Ukranian translation.
1622
14470f07
L
16232020-01-20 H.J. Lu <hongjiu.lu@intel.com>
1624
1625 PR ld/25416
1626 * config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix
1627 for lea with R_X86_64_GOTPC32_TLSDESC relocation when generating
1628 x32 object.
1629 * testsuite/gas/i386/ilp32/x32-tls.d: Updated.
1630 * testsuite/gas/i386/ilp32/x32-tls.s: Add tests for lea with
1631 R_X86_64_GOTPC32_TLSDESC relocation.
1632
1b1bb2c6
NC
16332020-01-18 Nick Clifton <nickc@redhat.com>
1634
1635 * configure: Regenerate.
1636 * po/gas.pot: Regenerate.
1637
ae774686
NC
16382020-01-18 Nick Clifton <nickc@redhat.com>
1639
1640 Binutils 2.34 branch created.
1641
42e04b36
L
16422020-01-17 H.J. Lu <hongjiu.lu@intel.com>
1643
1644 * config/tc-i386.c (_i386_insn): Replace vex_encoding_vex2
1645 with vex_encoding_vex.
1646 (parse_insn): Likewise.
1647 * doc/c-i386.texi: Replace {vex2} with {vex}. Update {vex}
1648 and {vex3} documentation.
1649 * testsuite/gas/i386/pseudos.s: Replace 3 {vex2} tests with
1650 {vex}.
1651 * testsuite/gas/i386/x86-64-pseudos.s: Likewise.
1652
2da2eaf4
AV
16532020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
1654
1655 PR 25376
1656 * config/tc-arm.c (mve_ext, mve_fp_ext): Use CORE_HIGH.
1657 (armv8_1m_main_ext_table): Use CORE_HIGH for mve.
1658 * testsuite/arm/armv8_1-m-fpu-mve-1.s: New.
1659 * testsuite/arm/armv8_1-m-fpu-mve-1.d: New.
1660 * testsuite/arm/armv8_1-m-fpu-mve-2.s: New.
1661 * testsuite/arm/armv8_1-m-fpu-mve-2.d: New.
1662
45a4bb20
JB
16632020-01-16 Jan Beulich <jbeulich@suse.com>
1664
1665 * config/tc-i386.c (match_template): Drop found_cpu_match local
1666 variable.
1667
4814632e
JB
16682020-01-16 Jan Beulich <jbeulich@suse.com>
1669
1670 * testsuite/gas/i386/avx512dq-inval.l,
1671 testsuite/gas/i386/avx512dq-inval.s: New.
1672 * testsuite/gas/i386/i386.exp: Run new test.
1673
131cb553
JL
16742020-01-15 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1675
1676 * config/tc-msp430.c (CHECK_RELOC_MSP430): Always generate 430X
1677 relocations when the target is 430X, except when extracting part of an
1678 expression.
1679 (msp430_srcoperand): Adjust comment.
1680 Initialize the expp member of the msp430_operand_s struct as
1681 appropriate.
1682 (msp430_dstoperand): Likewise.
1683 * testsuite/gas/msp430/msp430.exp: Run new test.
1684 * testsuite/gas/msp430/reloc-lo-430x.d: New test.
1685 * testsuite/gas/msp430/reloc-lo-430x.s: New test.
1686
c24d0e8d
AM
16872020-01-15 Alan Modra <amodra@gmail.com>
1688
1689 * configure.tgt: Add sparc-*-freebsd case.
1690
e44925ae
LC
16912020-01-14 Lili Cui <lili.cui@intel.com>
1692
1693 * testsuite/gas/i386/align-branch-1a.d: Updated for Darwin.
1694 * testsuite/gas/i386/align-branch-1b.d: Likewise.
1695 * testsuite/gas/i386/align-branch-1c.d: Likewise.
1696 * testsuite/gas/i386/align-branch-1d.d: Likewise.
1697 * testsuite/gas/i386/align-branch-1e.d: Likewise.
1698 * testsuite/gas/i386/align-branch-1f.d: Likewise.
1699 * testsuite/gas/i386/align-branch-1g.d: Likewise.
1700 * testsuite/gas/i386/align-branch-1h.d: Likewise.
1701 * testsuite/gas/i386/align-branch-1i.d: Likewise.
1702 * testsuite/gas/i386/align-branch-5.d: Likewise.
1703 * testsuite/gas/i386/x86-64-align-branch-1a.d: Likewise.
1704 * testsuite/gas/i386/x86-64-align-branch-1b.d: Likewise.
1705 * testsuite/gas/i386/x86-64-align-branch-1c.d: Likewise.
1706 * testsuite/gas/i386/x86-64-align-branch-1d.d: Likewise.
1707 * testsuite/gas/i386/x86-64-align-branch-1e.d: Likewise.
1708 * testsuite/gas/i386/x86-64-align-branch-1f.d: Likewise.
1709 * testsuite/gas/i386/x86-64-align-branch-1g.d: Likewise.
1710 * testsuite/gas/i386/x86-64-align-branch-1h.d: Likewise.
1711 * testsuite/gas/i386/x86-64-align-branch-1i.d: Likewise.
1712 * testsuite/gas/i386/x86-64-align-branch-5.d: Likewise.
1713 * testsuite/gas/i386/i386.exp: Skip x86-64-align-branch-2a,
1714 x86-64-align-branch-2b and x86-64-align-branch-2c on Darwin.
1715
7a6bf3be
SB
17162020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
1717
1718 PR 25377
1719 * config/tc-z80.c: Add support for half precision, single
1720 precision and double precision floating point values.
1721 * config/tc-z80.h b/gas/config/tc-z80.h: Disable string escapes.
1722 * doc/as.texi: Add new z80 command line options.
1723 * doc/c-z80.texi: Document new z80 command line options.
1724 * testsuite/gas/z80/ez80_pref_dis.s: New test.
1725 * testsuite/gas/z80/ez80_pref_dis.d: New test driver.
1726 * testsuite/gas/z80/z80.exp: Run the new test.
1727 * testsuite/gas/z80/fp_math48.d: Use correct command line option.
1728 * testsuite/gas/z80/fp_zeda32.d: Likewise.
1729 * testsuite/gas/z80/strings.d: Update expected output.
1730
82e9597c
MM
17312020-01-13 Matthew Malcomson <matthew.malcomson@arm.com>
1732
1733 * config/tc-aarch64.c (f64mm, f32mm): Add sve as a feature
1734 dependency.
1735
5e4f7e05
CZ
17362020-01-13 Claudiu Zissulescu <claziss@gmail.com>
1737
1738 * config/tc-arc.c (arc_select_cpu): Re-init the bfd if we change
1739 the CPU.
1740 * config/tc-arc.h: Add header if/defs.
1741 * testsuite/gas/arc/pseudos.d: Improve matching pattern.
1742
febda64f
AM
17432020-01-13 Alan Modra <amodra@gmail.com>
1744
1745 * testsuite/gas/wasm32/allinsn.d: Update expected output.
1746
5496abe1
AM
17472020-01-13 Alan Modra <amodra@gmail.com>
1748
1749 * config/tc-tic4x.c (tic4x_operands_match): Correct tic3x trap
1750 insertion.
1751
ec4181f2
AM
17522020-01-10 Alan Modra <amodra@gmail.com>
1753
1754 * testsuite/gas/elf/pr14891.s: Don't start directives in first column.
1755 * testsuite/gas/elf/pr21661.d: Don't run on hpux.
1756
40c75bc8
SB
17572020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1758
1759 PR 25224
1760 * config/tc-z80.c (emit_ld_m_rr): Use integer types when checking
1761 opcode byte values.
1762 (emit_ld_r_r): Likewise.
1763 (emit_ld_rr_m): Likewise.
1764 (emit_ld_rr_nn): Likewise.
1765
72aea328
JB
17662020-01-09 Jan Beulich <jbeulich@suse.com>
1767
1768 * config/tc-i386.c (optimize_encoding): Add
1769 is_any_vex_encoding() invocations. Drop respective
1770 i.tm.extension_opcode == None checks.
1771
3f93af61
JB
17722020-01-09 Jan Beulich <jbeulich@suse.com>
1773
1774 * config/tc-i386.c (md_assemble): Check RegRex is clear during
1775 REX transformations. Correct comment indentation.
1776
7697afb6
JB
17772020-01-09 Jan Beulich <jbeulich@suse.com>
1778
1779 * config/tc-i386.c (optimize_encoding): Generalize register
1780 transformation for TEST optimization.
1781
d835a58b
JB
17822020-01-09 Jan Beulich <jbeulich@suse.com>
1783
1784 * testsuite/gas/i386/x86-64-sysenter-amd.s,
1785 testsuite/gas/i386/x86-64-sysenter-amd.d,
1786 testsuite/gas/i386/x86-64-sysenter-amd.l,
1787 testsuite/gas/i386/x86-64-sysenter-intel.d,
1788 testsuite/gas/i386/x86-64-sysenter-mixed.d: New.
1789 * testsuite/gas/i386/i386.exp: Run new tests.
1790
915808f6
NC
17912020-01-08 Nick Clifton <nickc@redhat.com>
1792
1793 PR 25284
1794 * doc/as.texi (Align): Document the fact that all arguments can be
1795 omitted.
1796 (Balign): Likewise.
1797 (P2align): Likewise.
1798
f1f28025
NC
17992020-01-08 Nick Clifton <nickc@redhat.com>
1800
1801 PR 14891
1802 * config/obj-elf.c (obj_elf_section): Fail if the section name is
1803 already defined as a different symbol type.
1804 * testsuite/gas/elf/pr14891.s: New test source file.
1805 * testsuite/gas/elf/pr14891.d: New test driver.
1806 * testsuite/gas/elf/pr14891.s: New test expected error output.
1807 * testsuite/gas/elf/elf.exp: Run the new test.
1808
030a2e78
AM
18092020-01-08 Alan Modra <amodra@gmail.com>
1810
1811 * config/tc-z8k.c (md_begin): Make idx unsigned.
1812 (get_specific): Likewise for this_index.
1813
2a1ebfb2
CZ
18142020-01-07 Claudiu Zissulescu <claziss@synopsys.com>
1815
1816 * onfig/tc-arc.c (parse_reloc_symbol): New function.
1817 (tokenize_arguments): Clean up, use parse_reloc_symbol function.
1818 (md_operand): Set X_md to absent.
1819 (arc_parse_name): Check for X_md.
1820
16d87673
SB
18212020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1822
1823 PR 25311
1824 * as.h (TC_STRING_ESCAPES): Provide a default definition.
1825 * app.c (do_scrub_chars): Use TC_STRING_ESCAPES instead of
1826 NO_STRING_ESCAPES.
1827 * read.c (next_char_of_string): Likewise.
1828 * config/tc-ppc.h (TC_STRING_ESCAPES): Define.
1829 * config/tc-z80.h (TC_STRING_ESCAPES): Define.
1830
a2322019
NC
18312020-01-03 Nick Clifton <nickc@redhat.com>
1832
1833 * po/sv.po: Updated Swedish translation.
1834
5437a02a
JB
18352020-01-03 Jan Beulich <jbeulich@suse.com>
1836
1837 * testsuite/gas/aarch64/f64mm.s: Scale index of LD1RO{H,W,D}.
1838 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1839
567dfba2
JB
18402020-01-03 Jan Beulich <jbeulich@suse.com>
1841
1842 * testsuite/gas/aarch64/i8mm.s: Add 128-bit form tests for
1843 by-element usdot. Add 64-bit form tests for by-element sudot.
1844 * testsuite/gas/aarch64/i8mm.d: Adjust expectations.
1845
8c45011a
JB
18462020-01-03 Jan Beulich <jbeulich@suse.com>
1847
1848 * testsuite/gas/aarch64/f64mm.s: Drop 'i' from uzip<n>.
1849 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1850
f4950f76
JB
18512020-01-03 Jan Beulich <jbeulich@suse.com>
1852
1853 * testsuite/gas/aarch64/f64mm.d,
1854 testsuite/gas/aarch64/sve-movprfx-mm.d: Adjust expectations.
1855
6655dba2
SB
18562020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
1857
1858 * config/tc-z80.c: Add new architectures: Z180 and eZ80. Add
1859 support for assembler code generated by SDCC. Add new relocation
1860 types. Add z80-elf target support.
1861 * config/tc-z80.h: Add z80-elf target support. Enable dollar local
1862 labels. Local labels starts from ".L".
1863 * NEWS: Mention the new support.
1864 * testsuite/gas/all/fwdexp.d: Fix failure due to symbol conflict.
1865 * testsuite/gas/all/fwdexp.s: Likewise.
1866 * testsuite/gas/all/cond.l: Likewise.
1867 * testsuite/gas/all/cond.s: Likewise.
1868 * testsuite/gas/all/fwdexp.d: Likewise.
1869 * testsuite/gas/all/fwdexp.s: Likewise.
1870 * testsuite/gas/elf/section2.e-mips: Likewise.
1871 * testsuite/gas/elf/section2.l: Likewise.
1872 * testsuite/gas/elf/section2.s: Likewise.
1873 * testsuite/gas/macros/app1.d: Likewise.
1874 * testsuite/gas/macros/app1.s: Likewise.
1875 * testsuite/gas/macros/app2.d: Likewise.
1876 * testsuite/gas/macros/app2.s: Likewise.
1877 * testsuite/gas/macros/app3.d: Likewise.
1878 * testsuite/gas/macros/app3.s: Likewise.
1879 * testsuite/gas/macros/app4.d: Likewise.
1880 * testsuite/gas/macros/app4.s: Likewise.
1881 * testsuite/gas/macros/app4b.s: Likewise.
1882 * testsuite/gas/z80/suffix.d: Fix failure on ELF target.
1883 * testsuite/gas/z80/z80.exp: Add new tests
1884 * testsuite/gas/z80/dollar.d: New file.
1885 * testsuite/gas/z80/dollar.s: New file.
1886 * testsuite/gas/z80/ez80_adl_all.d: New file.
1887 * testsuite/gas/z80/ez80_adl_all.s: New file.
1888 * testsuite/gas/z80/ez80_adl_suf.d: New file.
1889 * testsuite/gas/z80/ez80_isuf.s: New file.
1890 * testsuite/gas/z80/ez80_z80_all.d: New file.
1891 * testsuite/gas/z80/ez80_z80_all.s: New file.
1892 * testsuite/gas/z80/ez80_z80_suf.d: New file.
1893 * testsuite/gas/z80/r800_extra.d: New file.
1894 * testsuite/gas/z80/r800_extra.s: New file.
1895 * testsuite/gas/z80/r800_ii8.d: New file.
1896 * testsuite/gas/z80/r800_z80_doc.d: New file.
1897 * testsuite/gas/z80/z180.d: New file.
1898 * testsuite/gas/z80/z180.s: New file.
1899 * testsuite/gas/z80/z180_z80_doc.d: New file.
1900 * testsuite/gas/z80/z80_doc.d: New file.
1901 * testsuite/gas/z80/z80_doc.s: New file.
1902 * testsuite/gas/z80/z80_ii8.d: New file.
1903 * testsuite/gas/z80/z80_ii8.s: New file.
1904 * testsuite/gas/z80/z80_in_f_c.d: New file.
1905 * testsuite/gas/z80/z80_in_f_c.s: New file.
1906 * testsuite/gas/z80/z80_op_ii_ld.d: New file.
1907 * testsuite/gas/z80/z80_op_ii_ld.s: New file.
1908 * testsuite/gas/z80/z80_out_c_0.d: New file.
1909 * testsuite/gas/z80/z80_out_c_0.s: New file.
1910 * testsuite/gas/z80/z80_reloc.d: New file.
1911 * testsuite/gas/z80/z80_reloc.s: New file.
1912 * testsuite/gas/z80/z80_sli.d: New file.
1913 * testsuite/gas/z80/z80_sli.s: New file.
1914
a65b5de6
SN
19152020-01-02 Szabolcs Nagy <szabolcs.nagy@arm.com>
1916
1917 * config/tc-arm.c (parse_reg_list): Use REG_TYPE_RN instead of
1918 REGLIST_RN.
1919
b14ce8bf
AM
19202020-01-01 Alan Modra <amodra@gmail.com>
1921
1922 Update year range in copyright notice of all files.
1923
0b114740 1924For older changes see ChangeLog-2019
3499769a 1925\f
0b114740 1926Copyright (C) 2020 Free Software Foundation, Inc.
3499769a
AM
1927
1928Copying and distribution of this file, with or without modification,
1929are permitted in any medium without royalty provided the copyright
1930notice and this notice are preserved.
1931
1932Local Variables:
1933mode: change-log
1934left-margin: 8
1935fill-column: 74
1936version-control: never
1937End: