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Power10 SIMD permute class operations
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CommitLineData
6edbfd3b
AM
12020-05-11 Alan Modra <amodra@gmail.com>
2
3 * testsuite/gas/ppc/simd_perm.d,
4 * testsuite/gas/ppc/simd_perm.s: New test.
5 * testsuite/gas/ppc/ppc.exp: Run it.
6
c7d7aea2
AM
72020-05-11 Alan Modra <amodra@gmail.com>
8
9 * testsuite/gas/ppc/int128.d,
10 * testsuite/gas/ppc/int128.s: New test.
11 * testsuite/gas/ppc/ppc.exp: Run it.
12
94ba9882
AM
132020-05-11 Alan Modra <amodra@gmail.com>
14
15 * testsuite/gas/ppc/vsx_32byte.d,
16 * testsuite/gas/ppc/vsx_32byte.s: New test.
17 * testsuite/gas/ppc/ppc.exp: Run it.
18
f4791f1a
AM
192020-05-11 Alan Modra <amodra@gmail.com>
20
21 * testsuite/gas/ppc/vec_mul.s,
22 * testsuite/gas/ppc/vec_mul.d: New test.
23 * testsuite/gas/ppc/ppc.exp: Run it.
24
3ff0a5ba
PB
252020-05-11 Peter Bergner <bergner@linux.ibm.com>
26
27 * testsuite/gas/ppc/byte_rev.d,
28 * testsuite/gas/ppc/byte_rev.s: New test.
29 * testsuite/gas/ppc/ppc.exp: Run it.
30
afef4fe9
PB
312020-05-11 Peter Bergner <bergner@linux.ibm.com>
32
33 * testsuite/gas/ppc/power10.d: Add paste. tests.
34 * testsuite/gas/ppc/power10.s: Likewise.
35
1224c05d
PB
362020-05-11 Peter Bergner <bergner@linux.ibm.com>
37
38 * testsuite/gas/ppc/power10.s: New test.
39 * testsuite/gas/ppc/power10.d: Likewise.
40 * testsuite/gas/ppc/ppc.exp: Run it.
41
7c1f4227
AM
422020-05-11 Alan Modra <amodra@gmail.com>
43
44 * config/tc-ppc.c (md_assemble): Update for PPC_OPCODE_POWER10
45 renaming.
46 * testsuite/gas/ppc/prefix-align.d: Use -mpower10/-Mpower10 in
47 place of -mfuture/-Mfuture.
48 * testsuite/gas/ppc/prefix-pcrel.d: Likewise.
49 * testsuite/gas/ppc/prefix-reloc.d: Likewise.
50
bfeaed38
NC
512020-05-06 Nick Clifton <nickc@redhat.com>
52
53 * po/sv.po: Updated Swedish translation.
54
6ef719c0
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552020-05-06 Nick Clifton <nickc@redhat.com>
56
57 PR 25927
58 * doc/as.texi (Preprocessing): Replace cross reference to not
59 existant document with a URL to the equivalent page in the GCC
60 manual.
61
546cb2d8
NC
622020-05-05 Nick Clifton <nickc@redhat.com>
63
64 * dwarf2dbg.c (out_dir_and_file_list): Add comments describing the
65 construction of a DWARF-5 directory name table.
66 * testsuite/gas/elf/pr25917.d: Update expected output.
67
7d0bd487
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682020-05-05 Gunther Nikl <gnikl@justmail.de>
69
70 * config/tc-rx.c (elf_flags): Initialize for non-linux targets.
71 (md_parse_option): Remove initialization of elf_flags.
070b775f 72
fe05f369
ASDV
732020-05-04 Andre Vieira <andre.simoesdiasvieira@arm.com>
74
75 PR gas/25863
76 * config/tc-arm.c (do_mve_vmull): Fix scalar and NEON parsing of vmul.
77 * testsuite/gas/arm/mve-scalar-vmult-it.d: New test.
78 * testsuite/gas/arm/mve-scalar-vmult-it.s: New test.
79
4706679d
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802020-05-04 Nick Clifton <nickc@redhat.com>
81
82 PR 25917
83 * dwarf2dbg.c (out_dir_and_file_list): Check for the directory
84 table's existence before looking at its entries.
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NC
85 Also do not emit a default directory entry if there are no
86 directories in use.
87
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88 * testsuite/gas/elf/pr25917.s: New test source file.
89 * testsuite/gas/elf/pr25917.d: New test driver.
90 * testsuite/gas/elf/elf.exp (run_elf_list_test): Run the new test.
91
09c1e68a
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922020-04-30 Alex Coplan <alex.coplan@arm.com>
93
94 * config/tc-aarch64.c (fix_insn): Implement for
95 AARCH64_OPND_UNDEFINED.
96 (parse_operands): Implement for AARCH64_OPND_UNDEFINED.
97 * testsuite/gas/aarch64/udf.s: New.
98 * testsuite/gas/aarch64/udf.d: New.
99 * testsuite/gas/aarch64/udf-invalid.s: New.
100 * testsuite/gas/aarch64/udf-invalid.l: New.
101 * testsuite/gas/aarch64/udf-invalid.d: New.
102
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1032020-04-30 Yoshinori Sato <ysato@users.sourceforge.jp>
104
105 * config/tc-rx.c (elf_flags): Reset default value.
106 (md_parse_option): For rx-elf Initialize elf_flags with RX_ABI.
107
935f1f4b
MF
1082020-04-29 Max Filippov <jcmvbkbc@gmail.com>
109
110 * config/tc-xtensa.c (XTENSA_MARCH_EARLIEST): Define macro as 0
111 if it's not defined.
112 (microarch_earliest): New static variable.
113 (xg_translate_idioms): Translate "simcall" to "simcall 0" when
114 simcall opcode has mandatory parameter.
115 (xg_init_global_config): Initialize microarch_earliest.
116
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1172020-04-29 Nick Clifton <nickc@redhat.com>
118
119 PR 22699
120 * config/tc-sh.c (build_Mytes): Change operand type IMM0_8 to
121 IMM0_8S and add support for IMM0_8U.
122 * testsuite/gas/sh/sh4a.s: Add test of a logical insn using an
123 unsigned 8-bit immediate.
124 * testsuite/gas/sh/sh4a.d: Extended expected disassembly.
241e541d 125 * testsuite/gas/sh/sh4al-dsp.d: Update expected disassembly.
5c936ef5 126
251dae91
TC
1272020-04-27 Tamar Christina <tamar.christina@arm.com>
128
129 * NEWS: Add news entry for big-obj.
130 * config/tc-i386.c (i386_target_format): Support new format.
131 * doc/c-i386.texi: Add i386 support.
132 * testsuite/gas/pe/big-obj.d: Rename test to not be x64 specific.
133 * testsuite/gas/pe/pe.exp (big-obj): Make test run on i386 as well.
134
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1352020-04-27 Nick Clifton <nickc@redhat.com>
136
137 PR 25878
138 * dwarf2dbg.c (struct file_entry): Add auto_assigned field.
139 (assign_file_to_slot): New function. Fills in an entry in the
140 files table.
141 (allocate_filenum): Use new function.
142 (allocate_filename_to_slot): Use new function. If the specified
143 slot entry is already in use, but was chosen automatically then
144 reassign the automatic entry.
145
a09f656b 1462020-04-26 Hongtao Liu <hongtao.liu@intel.com
147
148 * config/tc-i386.c (lfence_before_ret_shl): New member.
149 (load_insn_p): implict load for POP/POPA/POPF/XLATB, no load
150 for Anysize insns.
151 (insert_after_load): Issue warning for REP CMPS/SCAS.
152 (insert_before_before): Handle iret, Handle
153 -mlfence-before-ret=shl, Adjust operand size of or/not/shl to ret's,
154 (md_parse_option): Change -mlfence-before-ret=[none|not|or] to
155 -mlfence-before-ret=[none/not/or/shl/yes].
156 Enable -mlfence-before-ret=shl when
157 -mlfence-beofre-indirect-branch=all and no explict -mlfence-before-ret option.
158 (md_show_usage): Ditto.
159 * doc/c-i386.texi: Ditto.
160 * testsuite/gas/i386/i386.exp: Add new testcases.
161 * testsuite/gas/i386/lfence-load-b.d: New.
162 * testsuite/gas/i386/lfence-load-b.e: New.
163 * testsuite/gas/i386/lfence-load.d: Modified.
164 * testsuite/gas/i386/lfence-load.e: New.
165 * testsuite/gas/i386/lfence-load.s: Modified.
166 * testsuite/gas/i386/lfence-ret-a.d: Modified.
167 * testsuite/gas/i386/lfence-ret-b.d: Modified.
168 * testsuite/gas/i386/lfence-ret-c.d: New.
169 * testsuite/gas/i386/lfence-ret-d.d: New.
170 * testsuite/gas/i386/lfence-ret.s: Modified.
171 * testsuite/gas/i386/x86-64-lfence-load-b.d: New.
172 * testsuite/gas/i386/x86-64-lfence-load.d: Modified.
173 * testsuite/gas/i386/x86-64-lfence-load.s: Modified.
174 * testsuite/gas/i386/x86-64-lfence-ret-a.d: Modified.
175 * testsuite/gas/i386/x86-64-lfence-ret-b.d: Modified.
176 * testsuite/gas/i386/x86-64-lfence-ret-c.d: New.
177 * testsuite/gas/i386/x86-64-lfence-ret-d.d: New
178 * testsuite/gas/i386/x86-64-lfence-ret-e.d: New.
179 * testsuite/gas/i386/x86-64-lfence-ret.e: New.
180 * testsuite/gas/i386/x86-64-lfence-ret.s: New.
181
30ce8e47
MF
1822020-04-22 Max Filippov <jcmvbkbc@gmail.com>
183
184 PR ld/25861
185 * config/tc-xtensa.c (md_apply_fix): Replace
186 BFD_RELOC_XTENSA_DIFF{8,16,32} generation with
187 BFD_RELOC_XTENSA_PDIFF{8,16,32} and
188 BFD_RELOC_XTENSA_NDIFF{8,16,32} generation.
189 * testsuite/gas/xtensa/loc.d: Replace BFD_RELOC_XTENSA_DIFF16
190 with BFD_RELOC_XTENSA_PDIFF16 in the expected output.
191
31c89d60
AM
1922020-04-22 Alan Modra <amodra@gmail.com>
193
194 * config/obj-elf.c (elf_frob_symbol): Unconditionally remove
195 symbol for ".symver .. remove".
196 * doc/as.texi (.symver): Update.
197 * testsuite/gas/symver/symver11.s: Make foo weak.
198 * testsuite/gas/symver/symver11.d: Expect an error.
199 * testsuite/gas/symver/symver7.d: Allow other random symbols.
200
1d3eb556
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2012020-04-21 H.J. Lu <hongjiu.lu@intel.com>
202
203 * testsuite/gas/symver/symver11.s: Add ".balign 8".
204
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2052020-04-21 Andreas Schwab <schwab@linux-m68k.org>
206
207 PR 25848
208 * testsuite/gas/m68k/operands.s: Add tests for cmpi.
209 * testsuite/gas/m68k/operands.d: Update.
210 * testsuite/gas/m68k/op68000.d: Update for new error messages.
211
c36876fe
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2122020-04-21 Tamar Christina <tamar.christina@arm.com>
213
214 PR binutils/24753
215 * testsuite/gas/arm/pr24753.d: New test.
216 * testsuite/gas/arm/pr24753.s: New test.
217
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2182020-04-21 H.J. Lu <hongjiu.lu@intel.com>
219
220 PR gas/23840
221 PR gas/25295
222 * NEWS: Mention .symver extension.
223 * config/obj-elf.c (obj_elf_find_and_add_versioned_name): New
224 function.
225 (obj_elf_symver): Call obj_elf_find_and_add_versioned_name to
226 add a version name. Add local, hidden and remove visibility
227 support.
228 (elf_frob_symbol): Handle the list of version names. Update the
229 original symbol to local, hidden or remove it from the symbol
230 table.
231 (elf_frob_file_before_adjust): Handle the list of version names.
232 * config/obj-elf.h (elf_visibility): New.
233 (elf_versioned_name_list): Likewise.
234 (elf_obj_sy): Change local to bitfield. Add rename, bad_version
235 and visibility. Change versioned_name pointer to struct
236 elf_versioned_name_list.
237 * doc/as.texi: Update .symver directive.
238 * testsuite/gas/symver/symver.exp: Run all *.d tests. Add more
239 error checking tests.
240 * testsuite/gas/symver/symver6.d: New file.
241 * testsuite/gas/symver/symver7.d: Likewise.
242 * testsuite/gas/symver/symver7.s: Likewise.
243 * testsuite/gas/symver/symver8.d: Likewise.
244 * testsuite/gas/symver/symver8.s: Likewise.
245 * testsuite/gas/symver/symver9.s: Likewise.
246 * testsuite/gas/symver/symver9a.d: Likewise.
247 * testsuite/gas/symver/symver9b.d: Likewise.
248 * testsuite/gas/symver/symver10.s: Likewise.
249 * testsuite/gas/symver/symver10a.d: Likewise.
250 * testsuite/gas/symver/symver10b.d: Likewise.
251 * testsuite/gas/symver/symver11.d: Likewise.
252 * testsuite/gas/symver/symver11.s: Likewise.
253 * testsuite/gas/symver/symver12.d: Likewise.
254 * testsuite/gas/symver/symver12.s: Likewise.
255 * testsuite/gas/symver/symver13.d: Likewise.
256 * testsuite/gas/symver/symver13.s: Likewise.
257 * testsuite/gas/symver/symver14.d: Likewise.
258 * testsuite/gas/symver/symver14.l: Likewise.
259 * testsuite/gas/symver/symver15.d: Likewise.
260 * testsuite/gas/symver/symver15.l: Likewise.
261 * testsuite/gas/symver/symver6.l: Removed.
262 * testsuite/gas/symver/symver6.s: Updated.
263
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2642020-04-20 Sudakshina Das <sudi.das@arm.com>
265
266 * config/tc-aarch64.c (parse_barrier_psb): Update error messages
267 to include TSB.
268 * testsuite/gas/aarch64/system-2.d: Update -march and new tsb tests.
269 * testsuite/gas/aarch64/system-2.s: Add new tsb tests.
270 * testsuite/gas/aarch64/system.d: Update.
271
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2722020-04-20 Sudakshina Das <sudi.das@arm.com>
273
274 * testsuite/gas/aarch64/bti.d: Update -march option.
275 * testsuite/gas/aarch64/illegal-bti.d: Remove.
276 * testsuite/gas/aarch64/illegal-bti.l: Remove.
277 * testsuite/gas/aarch64/illegal-ras-1.l: Remove esb.
278 * testsuite/gas/aarch64/illegal-ras-1.s: Remove esb.
279
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2802020-04-17 Alan Modra <amodra@gmail.com>
281
282 * config/tc-bfin.h (TC_EQUAL_IN_INSN): Allow assignment to dot.
283
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2842020-04-16 Gagan Singh Sidhu <broly@mac.com>
285 Nick Clifton <nickc@redhat.com>
286
287 PR 25803
288 * config/obj-elf.c (obj_elf_type): Reject ifunc symbols on MIPS
289 targets.
290 * testsuite/gas/elf/elf.exp: Add MIPS targets to the list to skip
291 for the type-2 test.
292 * testsuite/gas/elf/type-noifunc.e: Update to allow for MIPS
293 targets running this test.
294
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2952020-02-16 David Faust <david.faust@oracle.com>
296
297 * testsuite/gas/bpf/bpf.exp: Run jump32 tests.
298 * testsuite/gas/bpf/jump32.s: New file.
299 * testsuite/gas/bpf/jump32.d: Likewise.
300
3071b197
L
3012020-04-08 H.J. Lu <hongjiu.lu@intel.com>
302
303 * doc/c-i386.texi: Correct -mlfence-before-indirect-branch=
304 documentation.
305
6a3ab923
GN
3062020-04-08 Gunther Nikl <gnikl@justmail.de>
307
308 * config/tc-moxie.h (MD_PCREL_FROM_SECTION): Delete define.
309 (md_pcrel_from): Remove prototytpe.
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GN
310 * config/tc-m32c.h (MD_PCREL_FROM_SECTION): Delete duplicate
311 define.
312 (md_pcrel_from_section): Remove duplicate prototype.
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GN
313 * tc.h (md_pcrel_from_section): Add prototype.
314 * config/tc-aarch64.h (md_pcrel_from_section): Remove prototype.
315 * config/tc-arc.h (md_pcrel_from_section): Likewise.
316 * config/tc-arm.h (md_pcrel_from_section): Likewise.
317 * config/tc-avr.h (md_pcrel_from_section): Likewise.
318 * config/tc-bfin.h (md_pcrel_from_section): Likewise.
319 * config/tc-bpf.h (md_pcrel_from_section): Likewise.
320 * config/tc-csky.h (md_pcrel_from_section): Likewise.
321 * config/tc-d10v.h (md_pcrel_from_section): Likewise.
322 * config/tc-d30v.h (md_pcrel_from_section): Likewise.
323 * config/tc-epiphany.h (md_pcrel_from_section): Likewise.
324 * config/tc-fr30.h (md_pcrel_from_section): Likewise.
325 * config/tc-frv.h (md_pcrel_from_section): Likewise.
326 * config/tc-iq2000.h (md_pcrel_from_section): Likewise.
327 * config/tc-lm32.h (md_pcrel_from_section): Likewise.
328 * config/tc-m32c.h (md_pcrel_from_section): Likewise.
329 * config/tc-m32r.h (md_pcrel_from_section): Likewise.
330 * config/tc-mcore.h (md_pcrel_from_section): Likewise.
331 * config/tc-mep.h (md_pcrel_from_section): Likewise.
332 * config/tc-metag.h (md_pcrel_from_section): Likewise.
333 * config/tc-microblaze.h (md_pcrel_from_section): Likewise.
334 * config/tc-mmix.h (md_pcrel_from_section): Likewise.
335 * config/tc-moxie.h (md_pcrel_from_section): Likewise.
336 * config/tc-msp430.h (md_pcrel_from_section): Likewise.
337 * config/tc-mt.h (md_pcrel_from_section): Likewise.
338 * config/tc-or1k.h (md_pcrel_from_section): Likewise.
339 * config/tc-ppc.h (md_pcrel_from_section): Likewise.
340 * config/tc-rl78.h (md_pcrel_from_section): Likewise.
341 * config/tc-rx.h (md_pcrel_from_section): Likewise.
342 * config/tc-s390.h (md_pcrel_from_section): Likewise.
343 * config/tc-sh.h (md_pcrel_from_section): Likewise.
344 * config/tc-xc16x.h (md_pcrel_from_section): Likewise.
345 * config/tc-xstormy16.h (md_pcrel_from_section): Likewise.
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GN
346 * config/tc-microblaze.h (md_begin, md_assemble, md_undefined_symbol,
347 md_show_usage, md_convert_frag, md_operand, md_number_to_chars,
348 md_estimate_size_before_relax, md_section_align, tc_gen_reloc,
349 md_apply_fix3): Delete prototypes.
6a3ab923 350
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3512020-04-07 H.J. Lu <hongjiu.lu@intel.com>
352
353 * NEWS: Mention support for Intel SERIALIZE and TSXLDTRK
354 instructions.
355
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3562020-04-07 H.J. Lu <hongjiu.lu@intel.com>
357
358 * doc/c-z80.texi: Fix @xref warnings.
359
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3602020-04-07 Lili Cui <lili.cui@intel.com>
361
362 * config/tc-i386.c (cpu_arch): Add .TSXLDTRK.
363 (cpu_noarch): Likewise.
364 * doc/c-i386.texi: Document TSXLDTRK.
365 * testsuite/gas/i386/i386.exp: Run TSXLDTRK tests.
366 * testsuite/gas/i386/tsxldtrk.d: Likewise.
367 * testsuite/gas/i386/tsxldtrk.s: Likewise.
368 * testsuite/gas/i386/x86-64-tsxldtrk.d: Likewise.
369
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3702020-04-02 Lili Cui <lili.cui@intel.com>
371
372 * config/tc-i386.c (cpu_arch): Add .serialize.
373 (cpu_noarch): Likewise.
374 * doc/c-i386.texi: Document serialize.
375 * testsuite/gas/i386/i386.exp: Run serialize tests
376 * testsuite/gas/i386/serialize.d: Likewise.
377 * testsuite/gas/i386/x86-64-serialize.d: Likewise.
378 * testsuite/gas/i386/serialize.s: Likewise.
379
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3802020-04-02 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
381
382 * testsuite/gas/elf/section12a.d: Use notarget instead of xfail.
383 * testsuite/gas/elf/section12b.d: Likewise.
384 * testsuite/gas/elf/section16a.d: Likewise.
385 * testsuite/gas/elf/section16b.d: Likewise.
386
59e28a97
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3872020-04-02 Gunther Nikl <gnikl@justmail.de>
388
389 * config/tc-m68k.c (m68k_ip): Fix range check for index register
390 with a suppressed address register.
391
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3922020-04-01 H.J. Lu <hongjiu.lu@intel.com>
393
394 PR gas/25756
395 * config/tc-i386.h (TC_FORCE_RELOCATION_ABS): New.
396 * testsuite/gas/i386/localpic.s: Add a test for relocation
397 against local absolute symbol.
398 * testsuite/gas/i386/x86-64-localpic.s: Likewise.
399 * testsuite/gas/i386/localpic.d: Updated.
400 * testsuite/gas/i386/x86-64-localpic.d: Likewise.
401 * testsuite/gas/i386/ilp32/x86-64-localpic.d: Likewise.
402
15d47c3a
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4032020-04-01 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
404
405 PR gas/25732
406 * testsuite/gas/i386/solaris/x86-64-branch-2.d: New file.
407 * testsuite/gas/i386/solaris/x86-64-branch-3.d: New file.
408 * testsuite/gas/i386/solaris/x86-64-jump.d: Incorporate changes to
409 testsuite/gas/i386/x86-64-jump.d.
410 * gas/testsuite/gas/i386/solaris/x86-64-mpx-branch-1.d:
411 Incorporate changes to
412 gas/testsuite/gas/i386/x86-64-mpx-branch-1.d.
413 * testsuite/gas/i386/solaris/x86-64-mpx-branch-2.d : Incorporate
414 changes to testsuite/gas/i386/x86-64-mpx-branch-2.d.
415 * testsuite/gas/i386/x86-64-branch-2.d: Skip on *-*-solaris*.
416 * testsuite/gas/i386/x86-64-branch-3.d: Likewise.
417
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4182020-03-31 Maciej W. Rozycki <macro@linux-mips.org>
419
420 PR 25611
421 PR 25614
422 * dwarf2dbg.c: Do not include "bignum.h".
423
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4242020-03-30 Nelson Chu <nelson.chu@sifive.com>
425
426 * testsuite/gas/riscv/alias-csr.d: Move this to priv-reg-pseudo.
427 * testsuite/gas/riscv/alias-csr.s: Likewise.
428 * testsuite/gas/riscv/no-aliases-csr.d: Move this
429 to priv-reg-pseudo-noalias.
430 * testsuite/gas/riscv/bad-csr.d: Rename to priv-reg-fail-nonexistent.
431 * testsuite/gas/riscv/bad-csr.l: Likewise.
432 * testsuite/gas/riscv/bad-csr.s: Likewise.
433 * testsuite/gas/riscv/satp.d: Removed. Already included in priv-reg.
434 * testsuite/gas/riscv/satp.s: Likewise.
435 * testsuite/gas/riscv/priv-reg-pseudo.d: New testcase for all pseudo
436 csr instruction, including alias-csr testcase.
437 * testsuite/gas/riscv/priv-reg-pseudo.s: Likewise.
438 * testsuite/gas/riscv/priv-reg-pseudo-noalias.d: New testcase for all
439 pseudo instruction with objdump -Mno-aliases.
440 * testsuite/gas/riscv/priv-reg-fail-nonexistent.d: New testcase.
441 * testsuite/gas/riscv/priv-reg-fail-nonexistent.l: Likewise.
442 * testsuite/gas/riscv/priv-reg-fail-nonexistent.s: Likewise.
443 * testsuite/gas/riscv/priv-reg.d: Update CSR to 1.11.
444 * testsuite/gas/riscv/priv-reg.s: Likewise.
445 * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
446 * testsuite/gas/riscv/csr-dw-regnums.d: Likewise.
447 * testsuite/gas/riscv/csr-dw-regnums.s: Likewise.
448
b7780957
J
4492020-03-25 J.W. Jagersma <jwjagersma@gmail.com>
450
451 * config/obj-coff.c (obj_coff_section): Set the bss flag on
452 sections with the "b" attribute.
453
d1023b5d
AM
4542020-03-22 Alan Modra <amodra@gmail.com>
455
456 * testsuite/gas/s12z/truncated.d: Update expected output.
457
0d832e7f
SB
4582020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
459
460 PR 25690
461 * config/tc-z80.c (md_pseudo_table): Add xdef anf xref pseudo ops.
462 * doc/c-z80.texi: Update documentation.
463
327ef784
NC
4642020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
465
466 PR 25641
467 PR 25668
468 PR 25633
469 Fix disassembling ED+A4/AC/B4/BC opcodes.
470 Fix assembling lines containing colonless label and instruction
471 with first operand inside parentheses.
472 Fix registration of unsupported by target CPU registers.
473 * config/tc-z80.c: See above.
474 * config/tc-z80.h: See above.
475 * testsuite/gas/z80/colonless.d: Update test.
476 * testsuite/gas/z80/colonless.s: Likewise.
477 * testsuite/gas/z80/ez80_adl_all.d: Likewise.
478 * testsuite/gas/z80/ez80_unsup_regs.d: Likewise.
479 * testsuite/gas/z80/ez80_z80_all.d: Likewise.
480 * testsuite/gas/z80/gbz80_unsup_regs.d: Likewise.
481 * testsuite/gas/z80/r800_unsup_regs.d: Likewise.
482 * testsuite/gas/z80/unsup_regs.s: Likewise.
483 * testsuite/gas/z80/z180_unsup_regs.d: Likewise.
484 * testsuite/gas/z80/z80.exp: Likewise.
485 * testsuite/gas/z80/z80_strict_unsup_regs.d: Likewise.
486 * testsuite/gas/z80/z80_unsup_regs.d: Likewise.
487 * testsuite/gas/z80/z80n_unsup_regs.d: Likewise.
488
66d1f7cc
AV
4892020-03-13 Andre Vieira <andre.simoesdiasvieira@arm.com>
490
491 PR 25660
492 * config/tc-arm.c (operand_parse_code): Add OP_RNSDMQR and OP_oRNSDMQ.
493 (parse_operands): Handle new operand codes.
494 (do_neon_dyadic_long): Make shape check accept the scalar variants.
495 (asm_opcode_insns): Fix operand codes for vaddl and vsubl.
496 * testsuite/gas/arm/mve-vaddsub-it.s: New test.
497 * testsuite/gas/arm/mve-vaddsub-it.d: New test.
498 * testsuite/gas/arm/mve-vaddsub-it-bad.s: New test.
499 * testsuite/gas/arm/mve-vaddsub-it-bad.l: New test.
500 * testsuite/gas/arm/mve-vaddsub-it-bad.d: New test.
501 * testsuite/gas/arm/nomve-vaddsub-it.d: New test.
502
9e8f1c90
L
5032020-03-11 H.J. Lu <hongjiu.lu@intel.com>
504
505 * NEWS: Mention x86 assembler options for CVE-2020-0551.
506
97b4a8f7
L
5072020-03-11 H.J. Lu <hongjiu.lu@intel.com>
508
509 * testsuite/gas/i386/i386.exp: Run new tests.
510 * testsuite/gas/i386/lfence-byte.d: New file.
511 * testsuite/gas/i386/lfence-byte.e: Likewise.
512 * testsuite/gas/i386/lfence-byte.s: Likewise.
513 * testsuite/gas/i386/lfence-indbr-a.d: Likewise.
514 * testsuite/gas/i386/lfence-indbr-b.d: Likewise.
515 * testsuite/gas/i386/lfence-indbr-c.d: Likewise.
516 * testsuite/gas/i386/lfence-indbr.e: Likewise.
517 * testsuite/gas/i386/lfence-indbr.s: Likewise.
518 * testsuite/gas/i386/lfence-load.d: Likewise.
519 * testsuite/gas/i386/lfence-load.s: Likewise.
520 * testsuite/gas/i386/lfence-ret-a.d: Likewise.
521 * testsuite/gas/i386/lfence-ret-b.d: Likewise.
522 * testsuite/gas/i386/lfence-ret.s: Likewise.
523 * testsuite/gas/i386/x86-64-lfence-byte.d: Likewise.
524 * testsuite/gas/i386/x86-64-lfence-byte.e: Likewise.
525 * testsuite/gas/i386/x86-64-lfence-byte.s: Likewise.
526 * testsuite/gas/i386/x86-64-lfence-indbr-a.d: Likewise.
527 * testsuite/gas/i386/x86-64-lfence-indbr-b.d: Likewise.
528 * testsuite/gas/i386/x86-64-lfence-indbr-c.d: Likewise.
529 * testsuite/gas/i386/x86-64-lfence-indbr.e: Likewise.
530 * testsuite/gas/i386/x86-64-lfence-indbr.s: Likewise.
531 * testsuite/gas/i386/x86-64-lfence-load.d: Likewise.
532 * testsuite/gas/i386/x86-64-lfence-load.s: Likewise.
533 * testsuite/gas/i386/x86-64-lfence-ret-a.d: Likewise.
534 * testsuite/gas/i386/x86-64-lfence-ret-b.d: Likewise.
535
ae531041
L
5362020-03-11 H.J. Lu <hongjiu.lu@intel.com>
537
538 * config/tc-i386.c (lfence_after_load): New.
539 (lfence_before_indirect_branch_kind): New.
540 (lfence_before_indirect_branch): New.
541 (lfence_before_ret_kind): New.
542 (lfence_before_ret): New.
543 (last_insn): New.
544 (load_insn_p): New.
545 (insert_lfence_after): New.
546 (insert_lfence_before): New.
547 (md_assemble): Call insert_lfence_before and insert_lfence_after.
548 Set last_insn.
549 (OPTION_MLFENCE_AFTER_LOAD): New.
550 (OPTION_MLFENCE_BEFORE_INDIRECT_BRANCH): New.
551 (OPTION_MLFENCE_BEFORE_RET): New.
552 (md_longopts): Add -mlfence-after-load=,
553 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
554 (md_parse_option): Handle -mlfence-after-load=,
555 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
556 (md_show_usage): Display -mlfence-after-load=,
557 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
558 (i386_cons_align): New.
559 * config/tc-i386.h (i386_cons_align): New.
560 (md_cons_align): New.
561 * doc/c-i386.texi: Document -mlfence-after-load=,
562 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
563
5496f3c6
NC
5642020-03-11 Nick Clifton <nickc@redhat.com>
565
566 PR 25611
567 PR 25614
568 * dwarf2dbg.c (DWARF2_FILE_TIME_NAME): Default to -1.
569 (DWARF2_FILE_SIZE_NAME): Default to -1.
570 (DWARF2_LINE_VERSION): Default to the current dwarf level or 3,
571 whichever is higher.
572 (DWARF2_LINE_MAX_OPS_PER_INSN): Provide a default value of 1.
573 (NUM_MD5_BYTES): Define.
574 (struct file entry): Add md5 field.
575 (get_filenum): Delete and replace with...
576 (get_basename): New function.
577 (get_directory_table_entry): New function.
578 (allocate_filenum): New function.
579 (allocate_filename_to_slot): New function.
580 (dwarf2_where): Use new functions.
581 (dwarf2_directive_filename): Add support for extended .file
582 pseudo-op.
583 (dwarf2_directive_loc): Allow the use of file number zero with
584 DWARF 5 or higher.
585 (out_file_list): Rename to...
586 (out_dir_and_file_list): Add DWARF 5 support.
587 (out_debug_line): Emit extra values into the section header for
588 DWARF 5.
589 (out_debug_str): Allow for file 0 to be used with DWARF 5.
590 * doc/as.texi (.file): Update the description of this pseudo-op.
591 * testsuite/gas/elf-dwarf-5-file0.s: Add more lines.
592 * testsuite/gas/elf-dwarf-5-file0.d: Update expected dump output.
593 * testsuite/gas/lns/lns-diag-1.l: Update expected error message.
594 * NEWS: Mention the new feature.
595
a6a1f5e0
AM
5962020-03-10 Alan Modra <amodra@gmail.com>
597
598 * config/tc-csky.c (get_operand_value): Rewrite 1 << 31 expressions
599 to avoid signed overflow.
600 * config/tc-mcore.c (md_assemble): Likewise.
601 * config/tc-mips.c (gpr_read_mask, gpr_write_mask): Likewise.
602 * config/tc-nds32.c (SET_ADDEND): Likewise.
603 * config/tc-nios2.c (nios2_assemble_arg_R): Likewise.
604
3fabc179
JB
6052020-03-09 Jan Beulich <jbeulich@suse.com>
606
607 * testsuite/gas/i386/avx.s: Add long-form VCMP[PS][SD] pseudos.
608 * testsuite/gas/i386/avx.d, testsuite/gas/i386/avx-16bit.d,
609 testsuite/gas/i386/avx-intel.d: Adjust expectations.
610
190e5fc8
AM
6112020-03-07 Alan Modra <amodra@gmail.com>
612
613 * testsuite/gas/elf/dwarf-5-file0.s: Don't start directives in
614 first column.
615
84d9ab33
NC
6162020-03-06 Nick Clifton <nickc@redhat.com>
617
618 PR 25614
619 * dwarf2dbg.c (dwarf2_directive_filename): Allow a file number of
620 0 if the dwarf_level is 5 or more. Complain if a filename follows
621 a file 0.
622 * testsuite/gas/elf/dwarf-5-file0.s: New test.
623 * testsuite/gas/elf/dwarf-5-file0.d: New test driver.
624 * testsuite/gas/elf/elf.exp: Run the new test.
625
626 PR 25612
627 * config/tc-ia64.h (DWARF2_VERISION): Fix typo.
628 * doc/as.texi: Fix another typo.
629
31bf1864
NC
6302020-03-06 Nick Clifton <nickc@redhat.com>
631
632 PR 25612
633 * as.c (dwarf_level): Define.
634 (show_usage): Add --gdwarf-3, --gdwarf-4 and --gdwarf-5.
635 (parse_args): Add support for the new options.
636 as.h (dwarf_level): Prototype.
637 * dwarf2dbg.c (DWARF2_VERSION): Use dwarf_level as default version
638 value.
639 * config/tc-ia64.h (DWARF2_VERISION): Update definition.
640 (DWARF2_LINE_VERSION): Remove definition.
641 * doc/as.texi: Document the new options.
642
3c968de5
NC
6432020-03-06 Nick Clifton <nickc@redhat.com>
644
645 PR 25572
646 * as.c (main): Allow matching input and outputs when they are
647 not regular files.
648
bc49bfd8
JB
6492020-03-06 Jan Beulich <jbeulich@suse.com>
650
651 * config/tc-i386.c (match_mem_size): Generalize broadcast special
652 casing.
653 (check_VecOperands): Zap xmmword/ymmword/zmmword when more than
654 one of byte/word/dword/qword is set alongside a SIMD register in
655 a template's operand.
656
4873e243
JB
6572020-03-06 Jan Beulich <jbeulich@suse.com>
658
659 * config/tc-i386.c (match_template): Extend code in logic
660 rejecting certain suffixes in certain modes to also cover mask
661 register use and VecSIB. Drop special casing of broadcast. Skip
662 immediates in the check.
663
e365e234
JB
6642020-03-06 Jan Beulich <jbeulich@suse.com>
665
666 * config/tc-i386.c (match_template): Fold duplicate code in
667 logic rejecting certain suffixes in certain modes. Drop
668 pointless "else".
669
4ed21b58
JB
6702020-03-06 Jan Beulich <jbeulich@suse.com>
671
672 * config/tc-i386.c (process_suffix): Exlucde !vexw insns
673 alongside !norex64 ones.
674 * testsuite/gas/i386/x86-64-avx512bw.s: Test VPEXTR* and VPINSR*
675 with both 32- and 64-bit GPR operands.
676 * testsuite/gas/i386/x86-64-avx512f.s: Test VEXTRACTPS with both
677 32- and 64-bit GPR operands.
678 * testsuite/gas/i386/x86-64-avx512bw-intel.d,
679 testsuite/gas/i386/x86-64-avx512bw.d,
680 testsuite/gas/i386/x86-64-avx512f-intel.d,
681 testsuite/gas/i386/x86-64-avx512f.d: Adjust expectations.
682
643bb870
JB
6832020-03-06 Jan Beulich <jbeulich@suse.com>
684
685 * config/tc-i386.c (md_assemble): Drop use of rex64.
686 (process_suffix): For REX.W for 64-bit CRC32.
687
a23b33b3
JB
6882020-03-06 Jan Beulich <jbeulich@suse.com>
689
690 * config/tc-i386.c (i386_addressing_mode): For 32-bit
691 addressing for MPX insns without base/index.
692 * testsuite/gas/i386/mpx-16bit.s,
693 * testsuite/gas/i386/mpx-16bit.d: New.
694 * testsuite/gas/i386/i386.exp: Run new test.
695
a0497384
JB
6962020-03-06 Jan Beulich <jbeulich@suse.com>
697
698 * testsuite/gas/i386/adx.s, testsuite/gas/i386/cet.s,
699 testsuite/gas/i386/ept.s, testsuite/gas/i386/fsgs.s,
700 testsuite/gas/i386/invpcid.s, testsuite/gas/i386/movdir.s,
701 testsuite/gas/i386/ptwrite.s, testsuite/gas/i386/vmx.s,
702 * testsuite/gas/i386/code16.s: Add CR, DR, and TR access cases
703 as well as a BSWAP one.
704 * testsuite/gas/i386/rdpid.s: Add 16-bit case.
705 * testsuite/gas/i386/sse2-16bit.s: Cover more insns.
706 * testsuite/gas/i386/adx-intel.d, testsuite/gas/i386/adx.d,
707 testsuite/gas/i386/cet-intel.d, testsuite/gas/i386/cet.d,
708 testsuite/gas/i386/code16.d, testsuite/gas/i386/ept-intel.d,
709 testsuite/gas/i386/ept.d, testsuite/gas/i386/fsgs-intel.d,
710 testsuite/gas/i386/fsgs.d, testsuite/gas/i386/invpcid-intel.d,
711 testsuite/gas/i386/invpcid.d, testsuite/gas/i386/movdir-intel.d,
712 testsuite/gas/i386/movdir.d, testsuite/gas/i386/ptwrite-intel.d,
713 testsuite/gas/i386/ptwrite.d, testsuite/gas/i386/rdpid-intel.d,
714 testsuite/gas/i386/rdpid.d, testsuite/gas/i386/sse2-16bit.d,
715 testsuite/gas/i386/vmx.d: Adjust expectations.
716
b630c145
JB
7172020-03-06 Jan Beulich <jbeulich@suse.com>
718
719 * config/tc-i386.c (md_assemble): Also exclude tpause and umwait
720 from having their operands swapped.
721 * testsuite/gas/i386/waitpkg.s,
722 testsuite/gas/i386/x86-64-waitpkg.s: Add tpause and umwait
723 3-operand cases as well as testing of 16-bit code generation.
724 * testsuite/gas/i386/waitpkg.d,
725 testsuite/gas/i386/waitpkg-intel.d,
726 testsuite/gas/i386/x86-64-waitpkg.d,
727 testsuite/gas/i386/x86-64-waitpkg-intel.d: Adjust expectations.
728
de48783e
NC
7292020-03-04 Nelson Chu <nelson.chu@sifive.com>
730
dee35d02
NC
731 * config/tc-riscv.c (percent_op_utype): Support the modifier
732 %got_pcrel_hi.
733 * doc/c-riscv.texi: Add documentation.
734 * testsuite/gas/riscv/no-relax-reloc.d: Add test case for the new
735 modifier %got_pcrel_hi.
736 * testsuite/gas/riscv/no-relax-reloc.s: Likewise.
737 * testsuite/gas/riscv/relax-reloc.d: Likewise.
738 * testsuite/gas/riscv/relax-reloc.s: Likewise.
739
de48783e
NC
740 * doc/c-riscv.texi (relocation modifiers): Add documentation.
741 (RISC-V-Formats): Update the section name from "Instruction Formats"
742 to "RISC-V Instruction Formats".
743
749479c8
AO
7442020-03-04 Alexandre Oliva <oliva@adacore.com>
745
746 * config/tc-arm.c (md_apply_fix): Warn if a PC-relative load is
747 detected in a section which does not have at least 4 byte
748 alignment.
749 * testsuite/gas/arm/armv8-ar-it-bad.s: Add alignment directive.
750 * testsuite/gas/arm/ldr-t.s: Likewise.
751 * testsuite/gas/arm/sp-pc-usage-t.s: Likewise.
752 * testsuite/gas/arm/sp-pc-usage-t.d: Finish test at end of
753 disassembly, ignoring any NOPs that may have been inserted because
754 of section alignment.
755 * testsuite/gas/arm/ldr-t.d: Likewise.
756
a847e322
JB
7572020-03-04 Jan Beulich <jbeulich@suse.com>
758
759 * config/tc-i386.c (cpu_arch): Add .sev_es entry.
760 * doc/c-i386.texi: Mention sev_es.
761 * testsuite/gas/i386/arch-13.s: Add SEV-ES case.
762 * testsuite/gas/i386/arch-13.d: Extend -march=. Adjust
763 expectations.
764 * testsuite/gas/i386/arch-13-znver1.d,
765 testsuite/gas/i386/arch-13-znver2.d: Extend -march=.
766
3cd7f3e3
L
7672020-03-03 H.J. Lu <hongjiu.lu@intel.com>
768
769 * config/tc-i386.c (match_template): Replace ignoresize and
770 defaultsize with mnemonicsize.
771 (process_suffix): Likewise.
772
b8ba1385
SB
7732020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
774
775 PR 25627
776 * config/tc-z80.c (emit_ld_rr_m): Fix invalid compilation of
777 instruction LD IY,(HL).
778 * testsuite/gas/z80/ez80_adl_all.d: Update expected disassembly.
779 * testsuite/gas/z80/ez80_adl_all.s: Add tests of the instruction.
780 * testsuite/gas/z80/ez80_z80_all.d: Update expected disassembly.
781 * testsuite/gas/z80/ez80_z80_all.s: Add tests of the instruction.
782
10d97a0f
L
7832020-03-03 H.J. Lu <hongjiu.lu@intel.com>
784
785 PR gas/25622
786 * testsuite/gas/i386/i386.exp: Run x86-64-default-suffix and
787 x86-64-default-suffix-avx.
788 * testsuite/gas/i386/noreg64.s: Remove cvtsi2sd, cvtsi2ss,
789 vcvtsi2sd, vcvtsi2ss, vcvtusi2sd and vcvtusi2ss entries.
790 * testsuite/gas/i386/noreg64.d: Updated.
791 * testsuite/gas/i386/noreg64.l: Likewise.
792 * testsuite/gas/i386/x86-64-default-suffix-avx.d: New file.
793 * testsuite/gas/i386/x86-64-default-suffix.d: Likewise.
794 * testsuite/gas/i386/x86-64-default-suffix.s: Likewise.
795
8326546e
SB
7962020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
797
798 PR 25604
799 * config/tc-z80.c (contains_register): Prevent an illegal memory
800 access when checking an expression for a register name.
801
e3e896e6
AM
8022020-03-03 Alan Modra <amodra@gmail.com>
803
804 * config/obj-coff.h: Remove vestiges of coff-m68k and pe-mips
805 support.
806
a4dd6c97
AM
8072020-03-02 Alan Modra <amodra@gmail.com>
808
809 * config/tc-m32r.c (md_begin): Set SEC_SMALL_DATA on .scommon section.
810 * config/tc-mips.c (s_change_sec): Set SEC_SMALL_DATA for .sdata
811 and .sbss sections.
812 * config/tc-score.c: Delete !BFD_ASSEMBLER code throughout.
813 (s3_s_change_sec): Set SEC_SMALL_DATA for .sbss section.
814 (s3_s_score_lcomm): Likewise.
815 * config/tc-score7.c: Similarly.
816 * read.c (bss_alloc): Set SEC_SMALL_DATA for .sbss section.
817
dec7b24b
YS
8182020-02-28 YunQiang Su <syq@debian.org>
819
820 PR gas/25539
821 * config/tc-mips.c (fix_loongson3_llsc): Compare label value
822 to handle multi-labels.
823 (has_label_name): New.
824
cceb53b8
MM
8252020-02-26 Matthew Malcomson <matthew.malcomson@arm.com>
826
827 * config/tc-arm.c (enum pred_instruction_type): Remove
828 NEUTRAL_IT_NO_VPT_INSN predication type.
829 (cxn_handle_predication): Modify to require condition suffixes.
830 (handle_pred_state): Remove NEUTRAL_IT_NO_VPT_INSN cases.
831 * testsuite/gas/arm/cde-scalar.s: Update test.
832 * testsuite/gas/arm/cde-warnings.l: Update test.
833 * testsuite/gas/arm/cde-warnings.s: Update test.
834
da3ec71f
AM
8352020-02-26 Alan Modra <amodra@gmail.com>
836
837 * config/tc-arm.c (reg_expected_msgs[REG_TYPE_RNB]): Don't use
838 N_() on empty string.
839
42135cad
AM
8402020-02-26 Alan Modra <amodra@gmail.com>
841
842 * read.c (read_a_source_file): Call strncpy with length one
843 less than size of original_case_string.
844
dc1e8a47
AM
8452020-02-26 Alan Modra <amodra@gmail.com>
846
847 * config/obj-elf.c: Indent labels correctly.
848 * config/obj-macho.c: Likewise.
849 * config/tc-aarch64.c: Likewise.
850 * config/tc-alpha.c: Likewise.
851 * config/tc-arm.c: Likewise.
852 * config/tc-cr16.c: Likewise.
853 * config/tc-crx.c: Likewise.
854 * config/tc-frv.c: Likewise.
855 * config/tc-i386-intel.c: Likewise.
856 * config/tc-i386.c: Likewise.
857 * config/tc-ia64.c: Likewise.
858 * config/tc-mn10200.c: Likewise.
859 * config/tc-mn10300.c: Likewise.
860 * config/tc-nds32.c: Likewise.
861 * config/tc-riscv.c: Likewise.
862 * config/tc-s12z.c: Likewise.
863 * config/tc-xtensa.c: Likewise.
864 * config/tc-z80.c: Likewise.
865 * read.c: Likewise.
866 * symbols.c: Likewise.
867 * write.c: Likewise.
868
bd0cf5a6
NC
8692020-02-20 Nelson Chu <nelson.chu@sifive.com>
870
54b2aec1
NC
871 * config/tc-riscv.c (riscv_ip): New boolean insn_with_csr to indicate
872 we are assembling instruction with CSR. Call riscv_csr_read_only_check
873 after parsing all arguments.
874 (enum csr_insn_type): New enum is used to classify the CSR instruction.
875 (riscv_csr_insn_type, riscv_csr_read_only_check): New functions. These
876 are used to check if we write a read-only CSR by the CSR instruction.
877 * testsuite/gas/riscv/priv-reg-fail-read-only-01.s: New testcase. Test
878 all CSR for the read-only CSR checking.
879 * testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise.
880 * testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
881 * testsuite/gas/riscv/priv-reg-fail-read-only-02.s: New testcase. Test
882 all CSR instructions for the read-only CSR checking.
883 * testsuite/gas/riscv/priv-reg-fail-read-only-02.d: Likewise.
884 * testsuite/gas/riscv/priv-reg-fail-read-only-02.l: Likewise.
885
2ca89224
NC
886 * config/tc-riscv.c (struct riscv_set_options): New field csr_check.
887 (riscv_opts): Initialize it.
888 (reg_lookup_internal): Check the `riscv_opts.csr_check`
889 before doing the CSR checking.
890 (enum options): Add OPTION_CSR_CHECK and OPTION_NO_CSR_CHECK.
891 (md_longopts): Add mcsr-check and mno-csr-check.
892 (md_parse_option): Handle new enum option values.
893 (s_riscv_option): Handle new long options.
894 * doc/c-riscv.texi: Add description for the new .option and assembler
895 options.
896 * testsuite/gas/riscv/priv-reg-fail-fext.d: Add `-mcsr-check` to enable
897 the CSR checking.
898 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.
899
bd0cf5a6
NC
900 * config/tc-riscv.c (csr_extra_hash): New.
901 (enum riscv_csr_class): New enum. Used to decide
902 whether or not this CSR is legal in the current ISA string.
903 (struct riscv_csr_extra): New structure to hold all extra information
904 of CSR.
905 (riscv_init_csr_hashes): New. According to the DECLARE_CSR and
906 DECLARE_CSR_ALIAS, insert CSR extra information into csr_extra_hash.
907 Call hash_reg_name to insert CSR address into reg_names_hash.
908 (reg_csr_lookup_internal, riscv_csr_class_check): New functions.
909 Decide whether the CSR is valid according to the csr_extra_hash.
910 (reg_lookup_internal): Call reg_csr_lookup_internal for CSRs.
911 (init_opcode_hash): Update 'if (hash_error != NULL)' as hash_error is
912 not a boolean. This is same as riscv_init_csr_hash, so keep the
913 consistent usage.
914 (md_begin): Call riscv_init_csr_hashes for each DECLARE_CSR.
915 * testsuite/gas/riscv/csr-dw-regnums.d: Add -march=rv32if option.
916 * testsuite/gas/riscv/priv-reg.d: Add f-ext by -march option.
917 * testsuite/gas/riscv/priv-reg-fail-fext.d: New testcase. The source
918 file is `priv-reg.s`, and the ISA is rv32i without f-ext, so the
919 f-ext CSR are not allowed.
920 * testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise.
921 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: New testcase. The
922 source file is `priv-reg.s`, and the ISA is rv64if, so the
923 rv32-only CSR are not allowed.
924 * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
925
10a95fcc
AM
9262020-02-21 Alan Modra <amodra@gmail.com>
927
928 * config/tc-pdp11.c (md_apply_fix): Handle BFD_RELOC_32.
929 (tc_gen_reloc): Only give a BAD_CASE assertion on pcrel relocs.
930
dda2980f
AM
9312020-02-21 Alan Modra <amodra@gmail.com>
932
933 PR 25569
934 * config/obj-aout.c (obj_aout_frob_file_before_fix): Don't loop
935 on section size adjustment, instead perform another write if
936 exec header size is larger than section size.
937
bd3380bc
NC
9382020-02-19 Nelson Chu <nelson.chu@sifive.com>
939
940 * doc/c-riscv.texi: Add the doc entries for -march-attr/
941 -mno-arch-attr command line options.
942
fa164239
JW
9432020-02-19 Nelson Chu <nelson.chu@sifive.com>
944
945 * testsuite/gas/riscv/c-add-addi.d: New testcase.
946 * testsuite/gas/riscv/c-add-addi.s: Likewise.
947
fcaaac0a
SB
9482020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
949
950 PR 25576
951 * config/tc-z80.c (md_parse_option): Do not use an underscore
952 prefix for local labels in SDCC compatability mode.
953 (z80_start_line_hook): Remove SDCC dollar label support.
954 * testsuite/gas/z80/sdcc.d: Update expected disassembly.
955 * testsuite/gas/z80/sdcc.s: Likewise.
956
9572020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
958
959 PR 25517
960 * config/tc-z80.c: Add -march option.
961 * doc/as.texi: Update Z80 documentation.
962 * doc/c-z80.texi: Likewise.
963 * testsuite/gas/z80/ez80_adl_all.d: Update command line.
964 * testsuite/gas/z80/ez80_adl_suf.d: Likewise.
965 * testsuite/gas/z80/ez80_pref_dis.d: Likewise.
966 * testsuite/gas/z80/ez80_z80_all.d: Likewise.
967 * testsuite/gas/z80/ez80_z80_suf.d: Likewise.
968 * testsuite/gas/z80/gbz80_all.d: Likewise.
969 * testsuite/gas/z80/r800_extra.d: Likewise.
970 * testsuite/gas/z80/r800_ii8.d: Likewise.
971 * testsuite/gas/z80/r800_z80_doc.d: Likewise.
972 * testsuite/gas/z80/sdcc.d: Likewise.
973 * testsuite/gas/z80/z180.d: Likewise.
974 * testsuite/gas/z80/z180_z80_doc.d: Likewise.
975 * testsuite/gas/z80/z80_doc.d: Likewise.
976 * testsuite/gas/z80/z80_ii8.d: Likewise.
977 * testsuite/gas/z80/z80_in_f_c.d: Likewise.
978 * testsuite/gas/z80/z80_op_ii_ld.d: Likewise.
979 * testsuite/gas/z80/z80_out_c_0.d: Likewise.
980 * testsuite/gas/z80/z80_sli.d: Likewise.
981 * testsuite/gas/z80/z80n_all.d: Likewise.
982 * testsuite/gas/z80/z80n_reloc.d: Likewise.
983
a7e12755
L
9842020-02-19 H.J. Lu <hongjiu.lu@intel.com>
985
986 * config/tc-i386.c (output_insn): Mark cvtpi2ps and cvtpi2pd
987 with GNU_PROPERTY_X86_FEATURE_2_MMX.
988 * testsuite/gas/i386/i386.exp: Run property-3 and
989 x86-64-property-3.
990 * testsuite/gas/i386/property-3.d: New file.
991 * testsuite/gas/i386/property-3.s: Likewise.
992 * testsuite/gas/i386/x86-64-property-3.d: Likewise.
993
272a84b1
L
9942020-02-17 H.J. Lu <hongjiu.lu@intel.com>
995
996 * config/tc-i386.c (cpu_arch): Add .popcnt.
997 * doc/c-i386.texi: Remove abm and .abm. Add popcnt and .popcnt.
998 Add a tab before @samp{.sse4a}.
999
c8f8eebc
JB
10002020-02-17 Jan Beulich <jbeulich@suse.com>
1001
1002 * config/tc-i386.c (process_suffix): Don't try to guess a suffix
1003 for AddrPrefixOpReg templates. Combine the two pieces of
1004 addrprefixopreg handling. Reject 16-bit address reg in 64-bit
1005 mode.
1006
eedb0f2c
JB
10072020-02-17 Jan Beulich <jbeulich@suse.com>
1008
1009 PR gas/14439
1010 * config/tc-i386.c (md_assemble): Also suppress operand
1011 swapping for MONITOR{,X} and MWAIT{,X}.
1012 * testsuite/gas/i386/sse3.s, testsuite/gas/i386/x86-64-sse3.s:
1013 Add Intel syntax monitor/mwait tests.
1014 * testsuite/gas/i386/sse3.d, testsuite/gas/i386/x86-64-sse3.d:
1015 Adjust expectations.
1016 *testsuite/gas/i386/sse3-intel.d,
1017 testsuite/gas/i386/x86-64-sse3-intel.d: New.
1018 * testsuite/gas/i386/i386.exp: Run new tests.
1019
b9915cbc
JB
10202020-02-17 Jan Beulich <jbeulich@suse.com>
1021
1022 PR gas/6518
1023 * config/tc-i386.c (process_suffix): Re-work Intel-syntax
1024 [XYZ]MMWord memory operand ambiguity recognition logic (largely
1025 re-indentation).
1026 * testsuite/gas/i386/avx512dq-inval.s: Add vcvtqq2ps/vcvtuqq2ps
1027 cases.
1028 * testsuite/gas/i386/inval-avx512f.s: Also test vcvtneps2bf16.
1029 * testsuite/gas/i386/avx512dq-inval.l,
1030 testsuite/gas/i386/inval-avx.l,
1031 testsuite/gas/i386/inval-avx512f.l: Adjust expectations.
1032 * testsuite/gas/i386/avx512vl-ambig.s,
1033 testsuite/gas/i386/avx512vl-ambig.l: New.
1034 * testsuite/gas/i386/i386.exp: Run new test.
1035
af5c13b0
L
10362020-02-16 H.J. Lu <hongjiu.lu@intel.com>
1037
1038 * config/tc-i386.c (cpu_arch): Add .sse4a and nosse4a. Restore
1039 nosse4.
1040 * doc/c-i386.texi: Document sse4a and nosse4a.
1041
07d98387
L
10422020-02-14 H.J. Lu <hongjiu.lu@intel.com>
1043
1044 * doc/c-i386.texi: Remove the old movsx and movzx documentation
1045 for AT&T syntax.
1046
65fca059
JB
10472020-02-14 Jan Beulich <jbeulich@suse.com>
1048
1049 PR gas/25438
1050 * config/tc-i386.c (md_assemble): Move movsx/movzx special
1051 casing ...
1052 (process_suffix): ... here. Consider just the first operand
1053 initially.
1054 (check_long_reg): Drop opcode 0x63 special case again.
1055 * testsuite/gas/i386/i386.s, testsuite/gas/i386/iamcu-1.s,
1056 testsuite/gas/i386/ilp32/x86-64.s, testsuite/gas/i386/x86_64.s:
1057 Move ambiguous operand size tests ...
1058 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
1059 testsuite/gas/i386/noreg64.s: ... here.
1060 * testsuite/gas/i386/i386.d, testsuite/gas/i386/i386-intel.d
1061 testsuite/gas/i386/iamcu-1.d, testsuite/gas/i386/ilp32/x86-64.d,
1062 testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
1063 testsuite/gas/i386/movx16.l, testsuite/gas/i386/movx32.l,
1064 testsuite/gas/i386/movx64.l, testsuite/gas/i386/noreg16.d,
1065 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
1066 testsuite/gas/i386/x86-64-movsxd.d,
1067 testsuite/gas/i386/x86-64-movsxd-intel.d,
1068 testsuite/gas/i386/x86_64.d, testsuite/gas/i386/x86_64-intel.d:
1069 Adjust expectations.
1070 * testsuite/gas/i386/movx16.s, testsuite/gas/i386/movx16.l,
1071 testsuite/gas/i386/movx32.s, testsuite/gas/i386/movx32.l,
1072 testsuite/gas/i386/movx64.s, testsuite/gas/i386/movx64.l: New.
1073 * testsuite/gas/i386/i386.exp: Run new tests.
1074
b6773884
JB
10752020-02-14 Jan Beulich <jbeulich@suse.com>
1076
1077 * config/tc-i386.c (process_operands): Also skip segment
1078 override prefix emission if it matches an already present one.
1079 * testsuite/gas/i386/prefix32.s: Add double segment override
1080 cases.
1081 * testsuite/gas/i386/prefix32.l: Adjust expectations.
1082
92334ad2
JB
10832020-02-14 Jan Beulich <jbeulich@suse.com>
1084
1085 * config/tc-i386.c (process_operands): Drop ineffectual segment
1086 overrides when optimizing.
1087 * testsuite/gas/i386/lea-optimize.d: New.
1088 * testsuite/gas/i386/i386.exp: Run new test.
1089
10902020-02-14 Jan Beulich <jbeulich@suse.com>
514a8bb0
JB
1091
1092 * config/tc-i386.c (process_operands): Also check insn prefix
1093 for ineffectual segment override warning. Don't cover possible
1094 VEX/EVEX encoded insns there.
1095 * testsuite/gas/i386/lea.s, testsuite/gas/i386/lea.d,
1096 testsuite/gas/i386/lea.e: New.
1097 * testsuite/gas/i386/i386.exp: Run new test.
1098
0e6724de
L
10992020-02-14 H.J. Lu <hongjiu.lu@intel.com>
1100
1101 PR gas/25438
1102 * doc/c-i386.texi: Document movsx, movsxd and movzx for AT&T
1103 syntax.
1104
292676c1
L
11052020-02-13 Fangrui Song <maskray@google.com>
1106 H.J. Lu <hongjiu.lu@intel.com>
1107
1108 PR gas/25551
1109 * config/tc-i386.c (tc_i386_fix_adjustable): Don't check
1110 BFD_RELOC_386_PLT32 nor BFD_RELOC_X86_64_PLT32.
1111 * testsuite/gas/i386/i386.exp: Run relax-5 and x86-64-relax-4.
1112 * testsuite/gas/i386/relax-5.d: New file.
1113 * testsuite/gas/i386/relax-5.s: Likewise.
1114 * testsuite/gas/i386/x86-64-relax-4.d: Likewise.
1115 * testsuite/gas/i386/x86-64-relax-4.s: Likewise.
1116
7deea9aa
JB
11172020-02-13 Jan Beulich <jbeulich@suse.com>
1118
1119 * config/tc-i386.c (cpu_noarch): Use CPU_ANY_SSE4_FLAGS in
1120 "nosse4" entry.
1121
6c0946d0
JB
11222020-02-12 Jan Beulich <jbeulich@suse.com>
1123
1124 * config/tc-i386.c (avx512): New (at file scope), moved from
1125 (check_VecOperands): ... here.
1126 (process_suffix): Add [XYZ]MMword operand size handling.
1127 * testsuite/gas/i386/avx512dq-inval.s: Add VFPCLASS tests.
1128 * testsuite/gas/i386/noavx512-2.s: Add Intel syntax VFPCLASS
1129 tests.
1130 * testsuite/gas/i386/avx512dq-inval.l,
1131 testsuite/gas/i386/noavx512-2.l: Adjust expectations.
1132
5990e377
JB
11332020-02-12 Jan Beulich <jbeulich@suse.com>
1134
1135 PR gas/24546
1136 * config/tc-i386.c (match_template): Apply AMD64 check to 64-bit
1137 code only.
1138 * config/tc-i386-intel.c (i386_intel_operand): Also handle
1139 CALL/JMP in O_tbyte_ptr case.
1140 * doc/c-i386.texi: Mention far call and full pointer load ISA
1141 differences.
1142 * testsuite/gas/i386/x86-64-branch-3.s,
1143 testsuite/gas/i386/x86-64-intel64.s: Add 64-bit far call cases.
1144 * testsuite/gas/i386/x86-64-branch-3.d,
1145 testsuite/gas/i386/x86-64-intel64.d: Adjust expectations.
1146 * testsuite/gas/i386/x86-64-branch-5.l,
1147 testsuite/gas/i386/x86-64-branch-5.s: New.
1148 * testsuite/gas/i386/i386.exp: Run new test.
1149
9706160a
JB
11502020-02-12 Jan Beulich <jbeulich@suse.com>
1151
1152 PR gas/25438
1153 * config/tc-i386.c (REGISTER_WARNINGS): Delete.
1154 (check_byte_reg): Skip only source operand of CRC32. Drop Non-
1155 64-bit-only warning.
1156 (check_word_reg): Consistently error on mismatching register
1157 size and suffix.
1158 * testsuite/gas/i386/general.s: Replace dword GPR with word one
1159 for movw. Replace suffix / GPR for orb.
1160 * testsuite/gas/i386/inval.s: Add tests for movw with dword and
1161 byte GPRs as well as ones for inb/outb with a word accumulator.
1162 * testsuite/gas/i386/general.l, testsuite/gas/i386/intelbad.l,
1163 testsuite/gas/i386/inval.l: Adjust expectations.
1164
5de4d9ef
JB
11652020-02-12 Jan Beulich <jbeulich@suse.com>
1166
1167 * config/tc-i386.c (operand_type_register_match): Also fall
1168 through initial two if()-s when the template allows for a GPR
1169 operand. Adjust comment.
1170
50128d0c
JB
11712020-02-11 Jan Beulich <jbeulich@suse.com>
1172
1173 (struct _i386_insn): New field "short_form".
1174 (optimize_encoding): Drop setting of shortform field.
1175 (process_suffix): Set i.short_form. Replace shortform use.
1176 (process_operands): Replace shortform use.
1177
1ed818b4
MM
11782020-02-11 Matthew Malcomson <matthew.malcomson@arm.com>
1179
1180 * config/tc-arm.c (vcx_handle_register_arguments): Remove `for`
1181 loop initial declaration.
1182
5aae9ae9
MM
11832020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
1184
1185 * config/tc-arm.c (NEON_MAX_TYPE_ELS): Increment to account for
1186 instructions that can have 5 arguments.
1187 (enum operand_parse_code): Add new operands.
1188 (parse_operands): Account for new operands.
1189 (S5): New macro.
1190 (enum neon_shape_el): Introduce P suffixes for coprocessor.
1191 (neon_select_shape): Account for P suffix.
1192 (LOW1): Move macro to global position.
1193 (HI4): Move macro to global position.
1194 (vcx_assign_vec_d): New.
1195 (vcx_assign_vec_m): New.
1196 (vcx_assign_vec_n): New.
1197 (enum vcx_reg_type): New.
1198 (vcx_get_reg_type): New.
1199 (vcx_size_pos): New.
1200 (vcx_vec_pos): New.
1201 (vcx_handle_shape): New.
1202 (vcx_ensure_register_in_range): New.
1203 (vcx_handle_register_arguments): New.
1204 (vcx_handle_insn_block): New.
1205 (vcx_handle_common_checks): New.
1206 (do_vcx1): New.
1207 (do_vcx2): New.
1208 (do_vcx3): New.
1209 * testsuite/gas/arm/cde-missing-fp.d: New test.
1210 * testsuite/gas/arm/cde-missing-fp.l: New test.
1211 * testsuite/gas/arm/cde-missing-mve.d: New test.
1212 * testsuite/gas/arm/cde-missing-mve.l: New test.
1213 * testsuite/gas/arm/cde-mve-or-neon.d: New test.
1214 * testsuite/gas/arm/cde-mve-or-neon.s: New test.
1215 * testsuite/gas/arm/cde-mve.s: New test.
1216 * testsuite/gas/arm/cde-warnings.l:
1217 * testsuite/gas/arm/cde-warnings.s:
1218 * testsuite/gas/arm/cde.d:
1219 * testsuite/gas/arm/cde.s:
1220
4934a27c
MM
12212020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
1222 Matthew Malcomson <matthew.malcomson@arm.com>
1223
1224 * config/tc-arm.c (arm_ext_cde*): New feature sets for each
1225 CDE coprocessor that can be enabled.
1226 (enum pred_instruction_type): New pred type.
1227 (BAD_NO_VPT): New error message.
1228 (BAD_CDE): New error message.
1229 (BAD_CDE_COPROC): New error message.
1230 (enum operand_parse_code): Add new immediate operands.
1231 (parse_operands): Account for new immediate operands.
1232 (check_cde_operand): New.
1233 (cde_coproc_enabled): New.
1234 (cde_coproc_pos): New.
1235 (cde_handle_coproc): New.
1236 (cxn_handle_predication): New.
1237 (do_custom_instruction_1): New.
1238 (do_custom_instruction_2): New.
1239 (do_custom_instruction_3): New.
1240 (do_cx1): New.
1241 (do_cx1a): New.
1242 (do_cx1d): New.
1243 (do_cx1da): New.
1244 (do_cx2): New.
1245 (do_cx2a): New.
1246 (do_cx2d): New.
1247 (do_cx2da): New.
1248 (do_cx3): New.
1249 (do_cx3a): New.
1250 (do_cx3d): New.
1251 (do_cx3da): New.
1252 (handle_pred_state): Define new IT block behaviour.
1253 (insns): Add newn CX*{,d}{,a} instructions.
1254 (CDE_EXTENSIONS,armv8m_main_ext_table,armv8_1m_main_ext_table):
1255 Define new cdecp extension strings.
1256 * doc/c-arm.texi: Document new cdecp extension arguments.
1257 * testsuite/gas/arm/cde-scalar.d: New test.
1258 * testsuite/gas/arm/cde-scalar.s: New test.
1259 * testsuite/gas/arm/cde-warnings.d: New test.
1260 * testsuite/gas/arm/cde-warnings.l: New test.
1261 * testsuite/gas/arm/cde-warnings.s: New test.
1262 * testsuite/gas/arm/cde.d: New test.
1263 * testsuite/gas/arm/cde.s: New test.
1264
4b5aaf5f
L
12652020-02-10 H.J. Lu <hongjiu.lu@intel.com>
1266
1267 PR gas/25516
1268 * config/tc-i386.c (intel64): Renamed to ...
1269 (isa64): This.
1270 (match_template): Accept Intel64 only instruction by default.
1271 (i386_displacement): Updated.
1272 (md_parse_option): Updated.
1273 * c-i386.texi: Update -mamd64/-mintel64 documentation.
1274 * testsuite/gas/i386/i386.exp: Run x86-64-sysenter. Pass
1275 -mamd64 to x86-64-sysenter-amd.
1276 * testsuite/gas/i386/x86-64-sysenter.d: New file.
1277
33176d91
AM
12782020-02-10 Alan Modra <amodra@gmail.com>
1279
1280 * config/obj-elf.c (obj_elf_change_section): Error for section
1281 type, attr or entsize changes in assembly.
1282 * testsuite/gas/elf/elf.exp: Pass -Z to gas for section5 test.
1283 * testsuite/gas/elf/section5.l: Update.
1284
82194874
AM
12852020-02-10 Alan Modra <amodra@gmail.com>
1286
1287 * output-file.c (output_file_close): Do a normal close when
1288 flag_always_generate_output.
1289 * write.c (write_object_file): Don't stop output when
1290 flag_always_generate_output.
1291
9fc0b501
SB
12922020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
1293
1294 PR 25469
1295 * config/tc-z80.c: Add -gbz80 command line option to generate code
1296 for the GameBoy Z80. Add support for generating DWARF.
1297 * config/tc-z80.h: Add support for DWARF debug information
1298 generation.
1299 * doc/c-z80.texi: Document new command line option.
1300 * testsuite/gas/z80/gbz80_all.d: New file.
1301 * testsuite/gas/z80/gbz80_all.s: New file.
1302 * testsuite/gas/z80/z80.exp: Run the new tests.
1303 * testsuite/gas/z80/z80n_all.d: New file.
1304 * testsuite/gas/z80/z80n_all.s: New file.
1305 * testsuite/gas/z80/z80n_reloc.d: New file.
1306
b7d07216
L
13072020-02-06 H.J. Lu <hongjiu.lu@intel.com>
1308
1309 PR gas/25381
1310 * config/obj-elf.c (get_section): Also check
1311 linked_to_symbol_name.
1312 (obj_elf_change_section): Also set map_head.linked_to_symbol_name.
1313 (obj_elf_parse_section_letters): Handle the 'o' flag.
1314 (build_group_lists): Renamed to ...
1315 (build_additional_section_info): This. Set elf_linked_to_section
1316 from map_head.linked_to_symbol_name.
1317 (elf_adjust_symtab): Updated.
1318 * config/obj-elf.h (elf_section_match): Add linked_to_symbol_name.
1319 * doc/as.texi: Document the 'o' flag.
1320 * testsuite/gas/elf/elf.exp: Run PR gas/25381 tests.
1321 * testsuite/gas/elf/section18.d: New file.
1322 * testsuite/gas/elf/section18.s: Likewise.
1323 * testsuite/gas/elf/section19.d: Likewise.
1324 * testsuite/gas/elf/section19.s: Likewise.
1325 * testsuite/gas/elf/section20.d: Likewise.
1326 * testsuite/gas/elf/section20.s: Likewise.
1327 * testsuite/gas/elf/section21.d: Likewise.
1328 * testsuite/gas/elf/section21.l: Likewise.
1329 * testsuite/gas/elf/section21.s: Likewise.
1330
5eb617a7
L
13312020-02-06 H.J. Lu <hongjiu.lu@intel.com>
1332
1333 * NEWS: Mention x86 assembler options to align branches for
1334 binutils 2.34.
1335
986ac314
L
13362020-02-06 H.J. Lu <hongjiu.lu@intel.com>
1337
1338 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique
1339 only for ELF targets.
1340 * testsuite/gas/i386/unique.d: Don't xfail.
1341 * testsuite/gas/i386/x86-64-unique.d: Likewise.
1342
19234a6d
AM
13432020-02-06 Alan Modra <amodra@gmail.com>
1344
1345 * testsuite/gas/i386/unique.d: xfail for non-elf targets.
1346 * testsuite/gas/i386/x86-64-unique.d: Likewise.
1347
02e0be69
AM
13482020-02-06 Alan Modra <amodra@gmail.com>
1349
1350 * testsuite/gas/elf/section12a.d: Use supports_gnu_osabi in
1351 xfail, and rename test.
1352 * testsuite/gas/elf/section12b.d: Likewise.
1353 * testsuite/gas/elf/section16a.d: Likewise.
1354 * testsuite/gas/elf/section16b.d: Likewise.
1355
a8c4d40b
L
13562020-02-02 H.J. Lu <hongjiu.lu@intel.com>
1357
1358 PR gas/25380
1359 * config/obj-elf.c (section_match): Removed.
1360 (get_section): Also match SEC_ASSEMBLER_SECTION_ID and
1361 section_id.
1362 (obj_elf_change_section): Replace info and group_name arguments
1363 with match_p. Also update the section ID and flags from match_p.
1364 (obj_elf_section): Handle "unique,N". Update call to
1365 obj_elf_change_section.
1366 * config/obj-elf.h (elf_section_match): New.
1367 (obj_elf_change_section): Updated.
1368 * config/tc-arm.c (start_unwind_section): Update call to
1369 obj_elf_change_section.
1370 * config/tc-ia64.c (obj_elf_vms_common): Likewise.
1371 * config/tc-microblaze.c (microblaze_s_data): Likewise.
1372 (microblaze_s_sdata): Likewise.
1373 (microblaze_s_rdata): Likewise.
1374 (microblaze_s_bss): Likewise.
1375 * config/tc-mips.c (s_change_section): Likewise.
1376 * config/tc-msp430.c (msp430_profiler): Likewise.
1377 * config/tc-rx.c (parse_rx_section): Likewise.
1378 * config/tc-tic6x.c (tic6x_start_unwind_section): Likewise.
1379 * doc/as.texi: Document "unique,N" in .section directive.
1380 * testsuite/gas/elf/elf.exp: Run "unique,N" tests.
1381 * testsuite/gas/elf/section15.d: New file.
1382 * testsuite/gas/elf/section15.s: Likewise.
1383 * testsuite/gas/elf/section16.s: Likewise.
1384 * testsuite/gas/elf/section16a.d: Likewise.
1385 * testsuite/gas/elf/section16b.d: Likewise.
1386 * testsuite/gas/elf/section17.d: Likewise.
1387 * testsuite/gas/elf/section17.l: Likewise.
1388 * testsuite/gas/elf/section17.s: Likewise.
1389 * testsuite/gas/i386/unique.d: Likewise.
1390 * testsuite/gas/i386/unique.s: Likewise.
1391 * testsuite/gas/i386/x86-64-unique.d: Likewise.
1392 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique.
1393
575d37ae
L
13942020-02-02 H.J. Lu <hongjiu.lu@intel.com>
1395
1396 * testsuite/gas/elf/section13.s: Replace @nobits with %nobits.
1397
2384096c
G
13982020-02-01 Anthony Green <green@moxielogic.com>
1399
1400 * config/tc-moxie.c (md_begin): Don't force big-endian mode.
1401
95441c43
SL
14022020-01-31 Sandra Loosemore <sandra@codesourcery.com>
1403
1404 * config/tc-nios2.c (nios2_cons): Handle %gotoff as well as
1405 %tls_ldo.
1406
d465d695
AV
14072020-01-31 Andre Vieira <andre.simoesdiasvieira@arm.com>
1408
1409 PR gas/25472
1410 * config/tc-arm.c (armv8m_main_ext_table): Refactored +dsp adding.
1411 (armv8_1m_main_ext_table): Refactored +dsp adding and enabled dsp for
1412 +mve.
1413 * testsuite/gas/arm/mve_dsp.d: New test.
1414
d26cc8a9
NC
14152020-01-31 Nick Clifton <nickc@redhat.com>
1416
1417 * config/tc-s390.c (s390_elf_suffix): Return ELF_SUFFIX_NONE
1418 rather than BFD_RELOC_NONE.
1419
90e9955a
SP
14202020-01-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
1421
1422 * config/tc-arm.c (fldmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2"
1423 to support VLDMIA instruction for MVE.
1424 (fldmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VLDMDB
1425 instruction for MVE.
1426 (fstmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMIA
1427 instruction for MVE.
1428 (fstmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMDB
1429 instruction for MVE.
1430 * testsuite/gas/arm/mve-ldst.d: New test.
1431 * testsuite/gas/arm/mve-ldst.s: Likewise.
1432
53943f32
NC
14332020-01-31 Nick Clifton <nickc@redhat.com>
1434
1435 * po/fr.po: Updated French translation.
1436 * po/ru.po: Updated Russian translation.
1437
c3036ed0
RS
14382020-01-31 Richard Sandiford <richard.sandiford@arm.com>
1439
1440 * testsuite/gas/aarch64/sve-bfloat-movprfx.s: Use .h rather than
1441 .s for the movprfx.
1442 * testsuite/gas/aarch64/sve-bfloat-movprfx.d: Update accordingly.
1443 * testsuite/gas/aarch64/sve-movprfx_28.d,
1444 * testsuite/gas/aarch64/sve-movprfx_28.l,
1445 * testsuite/gas/aarch64/sve-movprfx_28.s: New test.
1446
2ae4c703
JB
14472020-01-30 Jan Beulich <jbeulich@suse.com>
1448
1449 * config/tc-i386.c (output_disp): Tighten base_opcode check.
1450 * testsuite/gas/i386/got.s: Add LSL, MOVLPS, and BNDCN cases.
1451 * testsuite/gas/i386/got-no-relax.d, testsuite/gas/i386/got.d:
1452 Adjust expectations.
1453
bd434cc4
JM
14542020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
1455
1456 * testsuite/gas/bpf/alu.d: Update expected opcode for `neg'.
1457 * testsuite/gas/bpf/alu-be.d: Likewise.
1458 * testsuite/gas/bpf/alu32.d: Likewise for `neg32'.
1459 * testsuite/gas/bpf/alu32-be.d: Likewise.
1460
aeab2b26
JB
14612020-01-30 Jan Beulich <jbeulich@suse.com>
1462
1463 * testsuite/gas/i386/x86-64-branch-2.s,
1464 testsuite/gas/i386/x86-64-branch-4.s,
1465 testsuite/gas/i386/x86-64-branch.s: Add RETW cases.
1466 * testsuite/gas/i386/ilp32/x86-64-branch.d,
1467 testsuite/gas/i386/x86-64-branch-2.d,
1468 testsuite/gas/i386/x86-64-branch-4.l,
1469 testsuite/gas/i386/x86-64-branch.d: Adjust expectations.
1470
873494c8
JB
14712020-01-30 Jan Beulich <jbeulich@suse.com>
1472
1473 * config/tc-i386.c (process_suffix): .
1474 testsuite/gas/i386/noreg64.s: Add IRET and LRET cases.
1475 testsuite/gas/i386/x86-64-opcode.s: Add suffix to IRET and LRET.
1476 Add LRETQ case.
1477 testsuite/gas/i386/x86-64-suffix.s: Drop IRET case without
1478 suffix.
1479 testsuite/gas/i386/x86_64.s: Add RETF cases.
1480 * testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
1481 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l,
1482 testsuite/gas/i386/x86-64-opcode.d,
1483 testsuite/gas/i386/x86-64-suffix-intel.d,
1484 testsuite/gas/i386/x86-64-suffix.d,
1485 testsuite/gas/i386/x86_64-intel.d
1486 testsuite/gas/i386/x86_64.d: Adjust expectations.
1487 * testsuite/gas/i386/x86-64-suffix.e,
1488 testsuite/gas/i386/x86_64.e: New.
1489
62b3f548
JB
14902020-01-30 Jan Beulich <jbeulich@suse.com>
1491
1492 * config/tc-i386.c (process_suffix): Redo and move FLDENV et al
1493 special case.
1494
bc31405e
L
14952020-01-27 H.J. Lu <hongjiu.lu@intel.com>
1496
1497 PR binutils/25445
1498 * config/tc-i386.c (check_long_reg): Also convert to QWORD for
1499 movsxd.
1500 * doc/c-i386.texi: Add a node for AMD64 vs. Intel64 ISA
1501 differences. Document movslq and movsxd.
1502 * testsuite/gas/i386/i386.exp: Run PR binutils/25445 tests.
1503 * testsuite/gas/i386/x86-64-movsxd-intel.d: New file.
1504 * testsuite/gas/i386/x86-64-movsxd-intel64-intel.d: Likewise.
1505 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.l: Likewise.
1506 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.s: Likewise.
1507 * testsuite/gas/i386/x86-64-movsxd-intel64.d: Likewise.
1508 * testsuite/gas/i386/x86-64-movsxd-intel64.s: Likewise.
1509 * testsuite/gas/i386/x86-64-movsxd-inval.l: Likewise.
1510 * testsuite/gas/i386/x86-64-movsxd-inval.s: Likewise.
1511 * testsuite/gas/i386/x86-64-movsxd.d: Likewise.
1512 * testsuite/gas/i386/x86-64-movsxd.s: Likewise.
1513
e3696f67
AM
15142020-01-27 Alan Modra <amodra@gmail.com>
1515
1516 * testsuite/gas/all/gas.exp: Replace case statements with switch
1517 statements.
1518 * testsuite/gas/elf/elf.exp: Likewise.
1519 * testsuite/gas/macros/macros.exp: Likewise.
1520 * testsuite/lib/gas-defs.exp: Likewise.
1521
7568c93b
TC
15222020-01-27 Tamar Christina <tamar.christina@arm.com>
1523
1524 PR 25403
1525 * testsuite/gas/aarch64/armv8_4-a.d: Add cfinv.
1526 * testsuite/gas/aarch64/armv8_4-a.s: Likewise.
1527
403d1bd9
JW
15282020-01-22 Maxim Blinov <maxim.blinov@embecosm.com>
1529
1530 * testsuite/gas/riscv/march-ok-s.d: sx is no longer valid and
1531 s exts must be known, so rename *ok* to *fail*.
1532 * testsuite/gas/riscv/march-ok-sx.d: Likewise.
1533 * testsuite/gas/riscv/march-ok-s-with-version: Likewise.
1534 * testsuite/gas/riscv/march-fail-s.l: Expected error messages for
1535 above change.
1536 * testsuite/gas/riscv/march-fail-sx.l: Likewise.
1537 * testsuite/gas/riscv/march-fail-sx-with-version.l: Likewise.
1538
be4c5e58
L
15392020-01-22 H.J. Lu <hongjiu.lu@intel.com>
1540
1541 PR gas/25438
1542 * config/tc-i386.c (check_long_reg): Always disallow double word
1543 suffix in mnemonic with word general register.
1544 * testsuite/gas/i386/general.s: Replace word general register
1545 with double word general register for movl.
1546 * testsuite/gas/i386/inval.s: Add tests for movl with word general
1547 register.
1548 * testsuite/gas/i386/general.l: Updated.
1549 * testsuite/gas/i386/inval.l: Likewise.
1550
9e7028aa
AM
15512020-01-22 Alan Modra <amodra@gmail.com>
1552
1553 * config/tc-ppc.c (parse_tls_arg): Handle tls arg for
1554 __tls_get_addr_desc and __tls_get_addr_opt.
1555
e3ed17f3
JB
15562020-01-21 Jan Beulich <jbeulich@suse.com>
1557
1558 * testsuite/gas/i386/inval-crc32.s,
1559 testsuite/gas/i386/x86-64-inval-crc32.s: Add alignment directive.
1560 * testsuite/gas/i386/inval-crc32.l,
1561 testsuite/gas/i386/x86-64-inval-crc32.l: Adjust expectations.
1562
1a035124
JB
15632020-01-21 Jan Beulich <jbeulich@suse.com>
1564
1565 * config/tc-i386.c (process_suffix): Merge CRC32 handling into
1566 generic code path. Deal with No_lSuf being set in a template.
1567 * testsuite/gas/i386/inval-crc32.l,
1568 testsuite/gas/i386/x86-64-inval-crc32.l: Expect warning(s)
1569 instead of error(s) when operand size is ambiguous.
1570 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
1571 testsuite/gas/i386/noreg64.s: Add CRC32 tests.
1572 * testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg16.l,
1573 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg32.l,
1574 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l:
1575 Adjust expectations.
1576
c006a730
JB
15772020-01-21 Jan Beulich <jbeulich@suse.com>
1578
1579 * config/tc-i386.c (process_suffix): Drop SYSRET special case
1580 and an intel_syntax check. Re-write lack-of-suffix processing
1581 logic.
1582 * doc/c-i386.texi: Document operand size defaults for suffix-
1583 less AT&T syntax insns.
1584 * testsuite/gas/i386/bundle.s, testsuite/gas/i386/lock-1.s,
1585 testsuite/gas/i386/opcode.s, testsuite/gas/i386/sse3.s,
1586 testsuite/gas/i386/x86-64-avx-scalar.s,
1587 testsuite/gas/i386/x86-64-avx.s,
1588 testsuite/gas/i386/x86-64-bundle.s,
1589 testsuite/gas/i386/x86-64-intel64.s,
1590 testsuite/gas/i386/x86-64-lock-1.s,
1591 testsuite/gas/i386/x86-64-opcode.s,
1592 testsuite/gas/i386/x86-64-sse2avx.s,
1593 testsuite/gas/i386/x86-64-sse3.s: Add missing suffixes.
1594 * testsuite/gas/i386/nops.s, testsuite/gas/i386/sse-noavx.s,
1595 testsuite/gas/i386/x86-64-nops.s,
1596 testsuite/gas/i386/x86-64-ptwrite.s,
1597 testsuite/gas/i386/x86-64-simd.s,
1598 testsuite/gas/i386/x86-64-sse-noavx.s,
1599 testsuite/gas/i386/x86-64-suffix.s: Drop bogus suffix-less
1600 insns.
1601 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
1602 testsuite/gas/i386/noreg64.s: Add further tests.
1603 * testsuite/gas/i386/ilp32/x86-64-nops.d,
1604 testsuite/gas/i386/nops.d, testsuite/gas/i386/noreg16.d,
1605 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
1606 testsuite/gas/i386/sse-noavx.d,
1607 testsuite/gas/i386/x86-64-intel64.d,
1608 testsuite/gas/i386/x86-64-nops.d,
1609 testsuite/gas/i386/x86-64-opcode.d,
1610 testsuite/gas/i386/x86-64-ptwrite-intel.d,
1611 testsuite/gas/i386/x86-64-ptwrite.d,
1612 testsuite/gas/i386/x86-64-simd-intel.d,
1613 testsuite/gas/i386/x86-64-simd-suffix.d,
1614 testsuite/gas/i386/x86-64-simd.d,
1615 testsuite/gas/i386/x86-64-sse-noavx.d
1616 testsuite/gas/i386/x86-64-suffix.d,
1617 testsuite/gas/i386/x86-64-suffix-intel.d: Adjust expectations.
1618 * testsuite/gas/i386/noreg16.l, testsuite/gas/i386/noreg32.l,
1619 testsuite/gas/i386/noreg64.l: New.
1620 * testsuite/gas/i386/i386.exp: Run new tests.
1621
c906a69a
JB
16222020-01-21 Jan Beulich <jbeulich@suse.com>
1623
1624 * testsuite/gas/i386/avx512_bf16_vl.s,
1625 testsuite/gas/i386/x86-64-avx512_bf16_vl.s: Add broadcast forms
1626 of VCVTNEPS2BF16{X,Y}. Add operand-size less Intel syntax
1627 broadcast forms of VCVTNEPS2BF16.
1628 * testsuite/gas/i386/avx512_bf16_vl.d,
1629 testsuite/gas/i386/x86-64-avx512_bf16_vl.d: Adjust expectations.
1630
26916852
NC
16312020-01-20 Nick Clifton <nickc@redhat.com>
1632
1633 * po/uk.po: Updated Ukranian translation.
1634
14470f07
L
16352020-01-20 H.J. Lu <hongjiu.lu@intel.com>
1636
1637 PR ld/25416
1638 * config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix
1639 for lea with R_X86_64_GOTPC32_TLSDESC relocation when generating
1640 x32 object.
1641 * testsuite/gas/i386/ilp32/x32-tls.d: Updated.
1642 * testsuite/gas/i386/ilp32/x32-tls.s: Add tests for lea with
1643 R_X86_64_GOTPC32_TLSDESC relocation.
1644
1b1bb2c6
NC
16452020-01-18 Nick Clifton <nickc@redhat.com>
1646
1647 * configure: Regenerate.
1648 * po/gas.pot: Regenerate.
1649
ae774686
NC
16502020-01-18 Nick Clifton <nickc@redhat.com>
1651
1652 Binutils 2.34 branch created.
1653
42e04b36
L
16542020-01-17 H.J. Lu <hongjiu.lu@intel.com>
1655
1656 * config/tc-i386.c (_i386_insn): Replace vex_encoding_vex2
1657 with vex_encoding_vex.
1658 (parse_insn): Likewise.
1659 * doc/c-i386.texi: Replace {vex2} with {vex}. Update {vex}
1660 and {vex3} documentation.
1661 * testsuite/gas/i386/pseudos.s: Replace 3 {vex2} tests with
1662 {vex}.
1663 * testsuite/gas/i386/x86-64-pseudos.s: Likewise.
1664
2da2eaf4
AV
16652020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
1666
1667 PR 25376
1668 * config/tc-arm.c (mve_ext, mve_fp_ext): Use CORE_HIGH.
1669 (armv8_1m_main_ext_table): Use CORE_HIGH for mve.
1670 * testsuite/arm/armv8_1-m-fpu-mve-1.s: New.
1671 * testsuite/arm/armv8_1-m-fpu-mve-1.d: New.
1672 * testsuite/arm/armv8_1-m-fpu-mve-2.s: New.
1673 * testsuite/arm/armv8_1-m-fpu-mve-2.d: New.
1674
45a4bb20
JB
16752020-01-16 Jan Beulich <jbeulich@suse.com>
1676
1677 * config/tc-i386.c (match_template): Drop found_cpu_match local
1678 variable.
1679
4814632e
JB
16802020-01-16 Jan Beulich <jbeulich@suse.com>
1681
1682 * testsuite/gas/i386/avx512dq-inval.l,
1683 testsuite/gas/i386/avx512dq-inval.s: New.
1684 * testsuite/gas/i386/i386.exp: Run new test.
1685
131cb553
JL
16862020-01-15 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1687
1688 * config/tc-msp430.c (CHECK_RELOC_MSP430): Always generate 430X
1689 relocations when the target is 430X, except when extracting part of an
1690 expression.
1691 (msp430_srcoperand): Adjust comment.
1692 Initialize the expp member of the msp430_operand_s struct as
1693 appropriate.
1694 (msp430_dstoperand): Likewise.
1695 * testsuite/gas/msp430/msp430.exp: Run new test.
1696 * testsuite/gas/msp430/reloc-lo-430x.d: New test.
1697 * testsuite/gas/msp430/reloc-lo-430x.s: New test.
1698
c24d0e8d
AM
16992020-01-15 Alan Modra <amodra@gmail.com>
1700
1701 * configure.tgt: Add sparc-*-freebsd case.
1702
e44925ae
LC
17032020-01-14 Lili Cui <lili.cui@intel.com>
1704
1705 * testsuite/gas/i386/align-branch-1a.d: Updated for Darwin.
1706 * testsuite/gas/i386/align-branch-1b.d: Likewise.
1707 * testsuite/gas/i386/align-branch-1c.d: Likewise.
1708 * testsuite/gas/i386/align-branch-1d.d: Likewise.
1709 * testsuite/gas/i386/align-branch-1e.d: Likewise.
1710 * testsuite/gas/i386/align-branch-1f.d: Likewise.
1711 * testsuite/gas/i386/align-branch-1g.d: Likewise.
1712 * testsuite/gas/i386/align-branch-1h.d: Likewise.
1713 * testsuite/gas/i386/align-branch-1i.d: Likewise.
1714 * testsuite/gas/i386/align-branch-5.d: Likewise.
1715 * testsuite/gas/i386/x86-64-align-branch-1a.d: Likewise.
1716 * testsuite/gas/i386/x86-64-align-branch-1b.d: Likewise.
1717 * testsuite/gas/i386/x86-64-align-branch-1c.d: Likewise.
1718 * testsuite/gas/i386/x86-64-align-branch-1d.d: Likewise.
1719 * testsuite/gas/i386/x86-64-align-branch-1e.d: Likewise.
1720 * testsuite/gas/i386/x86-64-align-branch-1f.d: Likewise.
1721 * testsuite/gas/i386/x86-64-align-branch-1g.d: Likewise.
1722 * testsuite/gas/i386/x86-64-align-branch-1h.d: Likewise.
1723 * testsuite/gas/i386/x86-64-align-branch-1i.d: Likewise.
1724 * testsuite/gas/i386/x86-64-align-branch-5.d: Likewise.
1725 * testsuite/gas/i386/i386.exp: Skip x86-64-align-branch-2a,
1726 x86-64-align-branch-2b and x86-64-align-branch-2c on Darwin.
1727
7a6bf3be
SB
17282020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
1729
1730 PR 25377
1731 * config/tc-z80.c: Add support for half precision, single
1732 precision and double precision floating point values.
1733 * config/tc-z80.h b/gas/config/tc-z80.h: Disable string escapes.
1734 * doc/as.texi: Add new z80 command line options.
1735 * doc/c-z80.texi: Document new z80 command line options.
1736 * testsuite/gas/z80/ez80_pref_dis.s: New test.
1737 * testsuite/gas/z80/ez80_pref_dis.d: New test driver.
1738 * testsuite/gas/z80/z80.exp: Run the new test.
1739 * testsuite/gas/z80/fp_math48.d: Use correct command line option.
1740 * testsuite/gas/z80/fp_zeda32.d: Likewise.
1741 * testsuite/gas/z80/strings.d: Update expected output.
1742
82e9597c
MM
17432020-01-13 Matthew Malcomson <matthew.malcomson@arm.com>
1744
1745 * config/tc-aarch64.c (f64mm, f32mm): Add sve as a feature
1746 dependency.
1747
5e4f7e05
CZ
17482020-01-13 Claudiu Zissulescu <claziss@gmail.com>
1749
1750 * config/tc-arc.c (arc_select_cpu): Re-init the bfd if we change
1751 the CPU.
1752 * config/tc-arc.h: Add header if/defs.
1753 * testsuite/gas/arc/pseudos.d: Improve matching pattern.
1754
febda64f
AM
17552020-01-13 Alan Modra <amodra@gmail.com>
1756
1757 * testsuite/gas/wasm32/allinsn.d: Update expected output.
1758
5496abe1
AM
17592020-01-13 Alan Modra <amodra@gmail.com>
1760
1761 * config/tc-tic4x.c (tic4x_operands_match): Correct tic3x trap
1762 insertion.
1763
ec4181f2
AM
17642020-01-10 Alan Modra <amodra@gmail.com>
1765
1766 * testsuite/gas/elf/pr14891.s: Don't start directives in first column.
1767 * testsuite/gas/elf/pr21661.d: Don't run on hpux.
1768
40c75bc8
SB
17692020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1770
1771 PR 25224
1772 * config/tc-z80.c (emit_ld_m_rr): Use integer types when checking
1773 opcode byte values.
1774 (emit_ld_r_r): Likewise.
1775 (emit_ld_rr_m): Likewise.
1776 (emit_ld_rr_nn): Likewise.
1777
72aea328
JB
17782020-01-09 Jan Beulich <jbeulich@suse.com>
1779
1780 * config/tc-i386.c (optimize_encoding): Add
1781 is_any_vex_encoding() invocations. Drop respective
1782 i.tm.extension_opcode == None checks.
1783
3f93af61
JB
17842020-01-09 Jan Beulich <jbeulich@suse.com>
1785
1786 * config/tc-i386.c (md_assemble): Check RegRex is clear during
1787 REX transformations. Correct comment indentation.
1788
7697afb6
JB
17892020-01-09 Jan Beulich <jbeulich@suse.com>
1790
1791 * config/tc-i386.c (optimize_encoding): Generalize register
1792 transformation for TEST optimization.
1793
d835a58b
JB
17942020-01-09 Jan Beulich <jbeulich@suse.com>
1795
1796 * testsuite/gas/i386/x86-64-sysenter-amd.s,
1797 testsuite/gas/i386/x86-64-sysenter-amd.d,
1798 testsuite/gas/i386/x86-64-sysenter-amd.l,
1799 testsuite/gas/i386/x86-64-sysenter-intel.d,
1800 testsuite/gas/i386/x86-64-sysenter-mixed.d: New.
1801 * testsuite/gas/i386/i386.exp: Run new tests.
1802
915808f6
NC
18032020-01-08 Nick Clifton <nickc@redhat.com>
1804
1805 PR 25284
1806 * doc/as.texi (Align): Document the fact that all arguments can be
1807 omitted.
1808 (Balign): Likewise.
1809 (P2align): Likewise.
1810
f1f28025
NC
18112020-01-08 Nick Clifton <nickc@redhat.com>
1812
1813 PR 14891
1814 * config/obj-elf.c (obj_elf_section): Fail if the section name is
1815 already defined as a different symbol type.
1816 * testsuite/gas/elf/pr14891.s: New test source file.
1817 * testsuite/gas/elf/pr14891.d: New test driver.
1818 * testsuite/gas/elf/pr14891.s: New test expected error output.
1819 * testsuite/gas/elf/elf.exp: Run the new test.
1820
030a2e78
AM
18212020-01-08 Alan Modra <amodra@gmail.com>
1822
1823 * config/tc-z8k.c (md_begin): Make idx unsigned.
1824 (get_specific): Likewise for this_index.
1825
2a1ebfb2
CZ
18262020-01-07 Claudiu Zissulescu <claziss@synopsys.com>
1827
1828 * onfig/tc-arc.c (parse_reloc_symbol): New function.
1829 (tokenize_arguments): Clean up, use parse_reloc_symbol function.
1830 (md_operand): Set X_md to absent.
1831 (arc_parse_name): Check for X_md.
1832
16d87673
SB
18332020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1834
1835 PR 25311
1836 * as.h (TC_STRING_ESCAPES): Provide a default definition.
1837 * app.c (do_scrub_chars): Use TC_STRING_ESCAPES instead of
1838 NO_STRING_ESCAPES.
1839 * read.c (next_char_of_string): Likewise.
1840 * config/tc-ppc.h (TC_STRING_ESCAPES): Define.
1841 * config/tc-z80.h (TC_STRING_ESCAPES): Define.
1842
a2322019
NC
18432020-01-03 Nick Clifton <nickc@redhat.com>
1844
1845 * po/sv.po: Updated Swedish translation.
1846
5437a02a
JB
18472020-01-03 Jan Beulich <jbeulich@suse.com>
1848
1849 * testsuite/gas/aarch64/f64mm.s: Scale index of LD1RO{H,W,D}.
1850 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1851
567dfba2
JB
18522020-01-03 Jan Beulich <jbeulich@suse.com>
1853
1854 * testsuite/gas/aarch64/i8mm.s: Add 128-bit form tests for
1855 by-element usdot. Add 64-bit form tests for by-element sudot.
1856 * testsuite/gas/aarch64/i8mm.d: Adjust expectations.
1857
8c45011a
JB
18582020-01-03 Jan Beulich <jbeulich@suse.com>
1859
1860 * testsuite/gas/aarch64/f64mm.s: Drop 'i' from uzip<n>.
1861 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1862
f4950f76
JB
18632020-01-03 Jan Beulich <jbeulich@suse.com>
1864
1865 * testsuite/gas/aarch64/f64mm.d,
1866 testsuite/gas/aarch64/sve-movprfx-mm.d: Adjust expectations.
1867
6655dba2
SB
18682020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
1869
1870 * config/tc-z80.c: Add new architectures: Z180 and eZ80. Add
1871 support for assembler code generated by SDCC. Add new relocation
1872 types. Add z80-elf target support.
1873 * config/tc-z80.h: Add z80-elf target support. Enable dollar local
1874 labels. Local labels starts from ".L".
1875 * NEWS: Mention the new support.
1876 * testsuite/gas/all/fwdexp.d: Fix failure due to symbol conflict.
1877 * testsuite/gas/all/fwdexp.s: Likewise.
1878 * testsuite/gas/all/cond.l: Likewise.
1879 * testsuite/gas/all/cond.s: Likewise.
1880 * testsuite/gas/all/fwdexp.d: Likewise.
1881 * testsuite/gas/all/fwdexp.s: Likewise.
1882 * testsuite/gas/elf/section2.e-mips: Likewise.
1883 * testsuite/gas/elf/section2.l: Likewise.
1884 * testsuite/gas/elf/section2.s: Likewise.
1885 * testsuite/gas/macros/app1.d: Likewise.
1886 * testsuite/gas/macros/app1.s: Likewise.
1887 * testsuite/gas/macros/app2.d: Likewise.
1888 * testsuite/gas/macros/app2.s: Likewise.
1889 * testsuite/gas/macros/app3.d: Likewise.
1890 * testsuite/gas/macros/app3.s: Likewise.
1891 * testsuite/gas/macros/app4.d: Likewise.
1892 * testsuite/gas/macros/app4.s: Likewise.
1893 * testsuite/gas/macros/app4b.s: Likewise.
1894 * testsuite/gas/z80/suffix.d: Fix failure on ELF target.
1895 * testsuite/gas/z80/z80.exp: Add new tests
1896 * testsuite/gas/z80/dollar.d: New file.
1897 * testsuite/gas/z80/dollar.s: New file.
1898 * testsuite/gas/z80/ez80_adl_all.d: New file.
1899 * testsuite/gas/z80/ez80_adl_all.s: New file.
1900 * testsuite/gas/z80/ez80_adl_suf.d: New file.
1901 * testsuite/gas/z80/ez80_isuf.s: New file.
1902 * testsuite/gas/z80/ez80_z80_all.d: New file.
1903 * testsuite/gas/z80/ez80_z80_all.s: New file.
1904 * testsuite/gas/z80/ez80_z80_suf.d: New file.
1905 * testsuite/gas/z80/r800_extra.d: New file.
1906 * testsuite/gas/z80/r800_extra.s: New file.
1907 * testsuite/gas/z80/r800_ii8.d: New file.
1908 * testsuite/gas/z80/r800_z80_doc.d: New file.
1909 * testsuite/gas/z80/z180.d: New file.
1910 * testsuite/gas/z80/z180.s: New file.
1911 * testsuite/gas/z80/z180_z80_doc.d: New file.
1912 * testsuite/gas/z80/z80_doc.d: New file.
1913 * testsuite/gas/z80/z80_doc.s: New file.
1914 * testsuite/gas/z80/z80_ii8.d: New file.
1915 * testsuite/gas/z80/z80_ii8.s: New file.
1916 * testsuite/gas/z80/z80_in_f_c.d: New file.
1917 * testsuite/gas/z80/z80_in_f_c.s: New file.
1918 * testsuite/gas/z80/z80_op_ii_ld.d: New file.
1919 * testsuite/gas/z80/z80_op_ii_ld.s: New file.
1920 * testsuite/gas/z80/z80_out_c_0.d: New file.
1921 * testsuite/gas/z80/z80_out_c_0.s: New file.
1922 * testsuite/gas/z80/z80_reloc.d: New file.
1923 * testsuite/gas/z80/z80_reloc.s: New file.
1924 * testsuite/gas/z80/z80_sli.d: New file.
1925 * testsuite/gas/z80/z80_sli.s: New file.
1926
a65b5de6
SN
19272020-01-02 Szabolcs Nagy <szabolcs.nagy@arm.com>
1928
1929 * config/tc-arm.c (parse_reg_list): Use REG_TYPE_RN instead of
1930 REGLIST_RN.
1931
b14ce8bf
AM
19322020-01-01 Alan Modra <amodra@gmail.com>
1933
1934 Update year range in copyright notice of all files.
1935
0b114740 1936For older changes see ChangeLog-2019
3499769a 1937\f
0b114740 1938Copyright (C) 2020 Free Software Foundation, Inc.
3499769a
AM
1939
1940Copying and distribution of this file, with or without modification,
1941are permitted in any medium without royalty provided the copyright
1942notice and this notice are preserved.
1943
1944Local Variables:
1945mode: change-log
1946left-margin: 8
1947fill-column: 74
1948version-control: never
1949End: