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[people/ms/u-boot.git] / drivers / mmc / mmc.c
CommitLineData
272cc70b
AF
1/*
2 * Copyright 2008, Freescale Semiconductor, Inc
3 * Andy Fleming
4 *
5 * Based vaguely on the Linux code
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include <config.h>
27#include <common.h>
28#include <command.h>
29#include <mmc.h>
30#include <part.h>
31#include <malloc.h>
32#include <linux/list.h>
9b1f942c 33#include <div64.h>
272cc70b 34
ce0fbcd2
MW
35/* Set block count limit because of 16 bit register limit on some hardware*/
36#ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT
37#define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535
38#endif
39
272cc70b
AF
40static struct list_head mmc_devices;
41static int cur_dev_num = -1;
42
d23d8d7e
NK
43int __weak board_mmc_getwp(struct mmc *mmc)
44{
45 return -1;
46}
47
48int mmc_getwp(struct mmc *mmc)
49{
50 int wp;
51
52 wp = board_mmc_getwp(mmc);
53
d4e1da4e
PK
54 if (wp < 0) {
55 if (mmc->getwp)
56 wp = mmc->getwp(mmc);
57 else
58 wp = 0;
59 }
d23d8d7e
NK
60
61 return wp;
62}
63
314284b1 64int __board_mmc_getcd(struct mmc *mmc) {
11fdade2
SB
65 return -1;
66}
67
314284b1 68int board_mmc_getcd(struct mmc *mmc)__attribute__((weak,
11fdade2
SB
69 alias("__board_mmc_getcd")));
70
fdbb873e
KP
71static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
72 struct mmc_data *data)
272cc70b 73{
8635ff9e 74 struct mmc_data backup;
5db2fe3a 75 int ret;
8635ff9e
MV
76
77 memset(&backup, 0, sizeof(backup));
78
8635ff9e 79#ifdef CONFIG_MMC_TRACE
5db2fe3a
RR
80 int i;
81 u8 *ptr;
82
83 printf("CMD_SEND:%d\n", cmd->cmdidx);
84 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
5db2fe3a
RR
85 ret = mmc->send_cmd(mmc, cmd, data);
86 switch (cmd->resp_type) {
87 case MMC_RSP_NONE:
88 printf("\t\tMMC_RSP_NONE\n");
89 break;
90 case MMC_RSP_R1:
91 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
92 cmd->response[0]);
93 break;
94 case MMC_RSP_R1b:
95 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
96 cmd->response[0]);
97 break;
98 case MMC_RSP_R2:
99 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
100 cmd->response[0]);
101 printf("\t\t \t\t 0x%08X \n",
102 cmd->response[1]);
103 printf("\t\t \t\t 0x%08X \n",
104 cmd->response[2]);
105 printf("\t\t \t\t 0x%08X \n",
106 cmd->response[3]);
107 printf("\n");
108 printf("\t\t\t\t\tDUMPING DATA\n");
109 for (i = 0; i < 4; i++) {
110 int j;
111 printf("\t\t\t\t\t%03d - ", i*4);
146bec79 112 ptr = (u8 *)&cmd->response[i];
5db2fe3a
RR
113 ptr += 3;
114 for (j = 0; j < 4; j++)
115 printf("%02X ", *ptr--);
116 printf("\n");
117 }
118 break;
119 case MMC_RSP_R3:
120 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
121 cmd->response[0]);
122 break;
123 default:
124 printf("\t\tERROR MMC rsp not supported\n");
125 break;
126 }
5db2fe3a 127#else
8635ff9e 128 ret = mmc->send_cmd(mmc, cmd, data);
5db2fe3a 129#endif
8635ff9e 130 return ret;
272cc70b
AF
131}
132
fdbb873e 133static int mmc_send_status(struct mmc *mmc, int timeout)
5d4fc8d9
RR
134{
135 struct mmc_cmd cmd;
d617c426 136 int err, retries = 5;
5d4fc8d9
RR
137#ifdef CONFIG_MMC_TRACE
138 int status;
139#endif
140
141 cmd.cmdidx = MMC_CMD_SEND_STATUS;
142 cmd.resp_type = MMC_RSP_R1;
aaf3d41a
MV
143 if (!mmc_host_is_spi(mmc))
144 cmd.cmdarg = mmc->rca << 16;
5d4fc8d9
RR
145
146 do {
147 err = mmc_send_cmd(mmc, &cmd, NULL);
d617c426
JK
148 if (!err) {
149 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
150 (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
151 MMC_STATE_PRG)
152 break;
153 else if (cmd.response[0] & MMC_STATUS_MASK) {
154 printf("Status Error: 0x%08X\n",
155 cmd.response[0]);
156 return COMM_ERR;
157 }
158 } else if (--retries < 0)
5d4fc8d9 159 return err;
5d4fc8d9
RR
160
161 udelay(1000);
162
5d4fc8d9
RR
163 } while (timeout--);
164
5db2fe3a
RR
165#ifdef CONFIG_MMC_TRACE
166 status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
167 printf("CURR STATE:%d\n", status);
168#endif
5b0c942f 169 if (timeout <= 0) {
5d4fc8d9
RR
170 printf("Timeout waiting card ready\n");
171 return TIMEOUT;
172 }
173
174 return 0;
175}
176
fdbb873e 177static int mmc_set_blocklen(struct mmc *mmc, int len)
272cc70b
AF
178{
179 struct mmc_cmd cmd;
180
181 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
182 cmd.resp_type = MMC_RSP_R1;
183 cmd.cmdarg = len;
272cc70b
AF
184
185 return mmc_send_cmd(mmc, &cmd, NULL);
186}
187
188struct mmc *find_mmc_device(int dev_num)
189{
190 struct mmc *m;
191 struct list_head *entry;
192
193 list_for_each(entry, &mmc_devices) {
194 m = list_entry(entry, struct mmc, link);
195
196 if (m->block_dev.dev == dev_num)
197 return m;
198 }
199
200 printf("MMC Device %d not found\n", dev_num);
201
202 return NULL;
203}
204
e6f99a56
LW
205static ulong mmc_erase_t(struct mmc *mmc, ulong start, lbaint_t blkcnt)
206{
207 struct mmc_cmd cmd;
208 ulong end;
209 int err, start_cmd, end_cmd;
210
211 if (mmc->high_capacity)
212 end = start + blkcnt - 1;
213 else {
214 end = (start + blkcnt - 1) * mmc->write_bl_len;
215 start *= mmc->write_bl_len;
216 }
217
218 if (IS_SD(mmc)) {
219 start_cmd = SD_CMD_ERASE_WR_BLK_START;
220 end_cmd = SD_CMD_ERASE_WR_BLK_END;
221 } else {
222 start_cmd = MMC_CMD_ERASE_GROUP_START;
223 end_cmd = MMC_CMD_ERASE_GROUP_END;
224 }
225
226 cmd.cmdidx = start_cmd;
227 cmd.cmdarg = start;
228 cmd.resp_type = MMC_RSP_R1;
e6f99a56
LW
229
230 err = mmc_send_cmd(mmc, &cmd, NULL);
231 if (err)
232 goto err_out;
233
234 cmd.cmdidx = end_cmd;
235 cmd.cmdarg = end;
236
237 err = mmc_send_cmd(mmc, &cmd, NULL);
238 if (err)
239 goto err_out;
240
241 cmd.cmdidx = MMC_CMD_ERASE;
242 cmd.cmdarg = SECURE_ERASE;
243 cmd.resp_type = MMC_RSP_R1b;
244
245 err = mmc_send_cmd(mmc, &cmd, NULL);
246 if (err)
247 goto err_out;
248
249 return 0;
250
251err_out:
252 puts("mmc erase failed\n");
253 return err;
254}
255
256static unsigned long
257mmc_berase(int dev_num, unsigned long start, lbaint_t blkcnt)
258{
259 int err = 0;
260 struct mmc *mmc = find_mmc_device(dev_num);
261 lbaint_t blk = 0, blk_r = 0;
d2d8afae 262 int timeout = 1000;
e6f99a56
LW
263
264 if (!mmc)
265 return -1;
266
267 if ((start % mmc->erase_grp_size) || (blkcnt % mmc->erase_grp_size))
268 printf("\n\nCaution! Your devices Erase group is 0x%x\n"
269 "The erase range would be change to 0x%lx~0x%lx\n\n",
270 mmc->erase_grp_size, start & ~(mmc->erase_grp_size - 1),
271 ((start + blkcnt + mmc->erase_grp_size)
272 & ~(mmc->erase_grp_size - 1)) - 1);
273
274 while (blk < blkcnt) {
275 blk_r = ((blkcnt - blk) > mmc->erase_grp_size) ?
276 mmc->erase_grp_size : (blkcnt - blk);
277 err = mmc_erase_t(mmc, start + blk, blk_r);
278 if (err)
279 break;
280
281 blk += blk_r;
d2d8afae
JH
282
283 /* Waiting for the ready status */
284 if (mmc_send_status(mmc, timeout))
285 return 0;
e6f99a56
LW
286 }
287
288 return blk;
289}
290
272cc70b 291static ulong
0158126e 292mmc_write_blocks(struct mmc *mmc, ulong start, lbaint_t blkcnt, const void*src)
272cc70b
AF
293{
294 struct mmc_cmd cmd;
295 struct mmc_data data;
5d4fc8d9 296 int timeout = 1000;
272cc70b 297
d2bf29e3 298 if ((start + blkcnt) > mmc->block_dev.lba) {
def412b6 299 printf("MMC: block number 0x%lx exceeds max(0x%lx)\n",
d2bf29e3
LW
300 start + blkcnt, mmc->block_dev.lba);
301 return 0;
302 }
272cc70b
AF
303
304 if (blkcnt > 1)
305 cmd.cmdidx = MMC_CMD_WRITE_MULTIPLE_BLOCK;
306 else
307 cmd.cmdidx = MMC_CMD_WRITE_SINGLE_BLOCK;
308
309 if (mmc->high_capacity)
310 cmd.cmdarg = start;
311 else
def412b6 312 cmd.cmdarg = start * mmc->write_bl_len;
272cc70b
AF
313
314 cmd.resp_type = MMC_RSP_R1;
272cc70b
AF
315
316 data.src = src;
317 data.blocks = blkcnt;
def412b6 318 data.blocksize = mmc->write_bl_len;
272cc70b
AF
319 data.flags = MMC_DATA_WRITE;
320
def412b6
SS
321 if (mmc_send_cmd(mmc, &cmd, &data)) {
322 printf("mmc write failed\n");
323 return 0;
272cc70b
AF
324 }
325
d52ebf10
TC
326 /* SPI multiblock writes terminate using a special
327 * token, not a STOP_TRANSMISSION request.
328 */
329 if (!mmc_host_is_spi(mmc) && blkcnt > 1) {
272cc70b
AF
330 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
331 cmd.cmdarg = 0;
332 cmd.resp_type = MMC_RSP_R1b;
def412b6
SS
333 if (mmc_send_cmd(mmc, &cmd, NULL)) {
334 printf("mmc fail to send stop cmd\n");
335 return 0;
0158126e 336 }
272cc70b
AF
337 }
338
93ad0d18
JK
339 /* Waiting for the ready status */
340 if (mmc_send_status(mmc, timeout))
341 return 0;
342
272cc70b
AF
343 return blkcnt;
344}
345
0158126e
LW
346static ulong
347mmc_bwrite(int dev_num, ulong start, lbaint_t blkcnt, const void*src)
348{
0158126e
LW
349 lbaint_t cur, blocks_todo = blkcnt;
350
def412b6 351 struct mmc *mmc = find_mmc_device(dev_num);
0158126e 352 if (!mmc)
def412b6 353 return 0;
0158126e 354
def412b6
SS
355 if (mmc_set_blocklen(mmc, mmc->write_bl_len))
356 return 0;
0158126e
LW
357
358 do {
8feafcc4 359 cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo;
0158126e 360 if(mmc_write_blocks(mmc, start, cur, src) != cur)
def412b6 361 return 0;
0158126e
LW
362 blocks_todo -= cur;
363 start += cur;
364 src += cur * mmc->write_bl_len;
365 } while (blocks_todo > 0);
366
367 return blkcnt;
368}
369
fdbb873e
KP
370static int mmc_read_blocks(struct mmc *mmc, void *dst, ulong start,
371 lbaint_t blkcnt)
272cc70b
AF
372{
373 struct mmc_cmd cmd;
374 struct mmc_data data;
375
4a1a06bc
AS
376 if (blkcnt > 1)
377 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
378 else
379 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
272cc70b
AF
380
381 if (mmc->high_capacity)
4a1a06bc 382 cmd.cmdarg = start;
272cc70b 383 else
4a1a06bc 384 cmd.cmdarg = start * mmc->read_bl_len;
272cc70b
AF
385
386 cmd.resp_type = MMC_RSP_R1;
272cc70b
AF
387
388 data.dest = dst;
4a1a06bc 389 data.blocks = blkcnt;
272cc70b
AF
390 data.blocksize = mmc->read_bl_len;
391 data.flags = MMC_DATA_READ;
392
4a1a06bc
AS
393 if (mmc_send_cmd(mmc, &cmd, &data))
394 return 0;
272cc70b 395
4a1a06bc
AS
396 if (blkcnt > 1) {
397 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
398 cmd.cmdarg = 0;
399 cmd.resp_type = MMC_RSP_R1b;
4a1a06bc
AS
400 if (mmc_send_cmd(mmc, &cmd, NULL)) {
401 printf("mmc fail to send stop cmd\n");
402 return 0;
403 }
272cc70b
AF
404 }
405
4a1a06bc 406 return blkcnt;
272cc70b
AF
407}
408
409static ulong mmc_bread(int dev_num, ulong start, lbaint_t blkcnt, void *dst)
410{
4a1a06bc
AS
411 lbaint_t cur, blocks_todo = blkcnt;
412
413 if (blkcnt == 0)
414 return 0;
272cc70b 415
4a1a06bc 416 struct mmc *mmc = find_mmc_device(dev_num);
272cc70b
AF
417 if (!mmc)
418 return 0;
419
d2bf29e3 420 if ((start + blkcnt) > mmc->block_dev.lba) {
4a1a06bc 421 printf("MMC: block number 0x%lx exceeds max(0x%lx)\n",
d2bf29e3
LW
422 start + blkcnt, mmc->block_dev.lba);
423 return 0;
424 }
272cc70b 425
4a1a06bc 426 if (mmc_set_blocklen(mmc, mmc->read_bl_len))
272cc70b 427 return 0;
272cc70b 428
4a1a06bc 429 do {
8feafcc4 430 cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo;
4a1a06bc
AS
431 if(mmc_read_blocks(mmc, dst, start, cur) != cur)
432 return 0;
433 blocks_todo -= cur;
434 start += cur;
435 dst += cur * mmc->read_bl_len;
436 } while (blocks_todo > 0);
272cc70b
AF
437
438 return blkcnt;
439}
440
fdbb873e 441static int mmc_go_idle(struct mmc *mmc)
272cc70b
AF
442{
443 struct mmc_cmd cmd;
444 int err;
445
446 udelay(1000);
447
448 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
449 cmd.cmdarg = 0;
450 cmd.resp_type = MMC_RSP_NONE;
272cc70b
AF
451
452 err = mmc_send_cmd(mmc, &cmd, NULL);
453
454 if (err)
455 return err;
456
457 udelay(2000);
458
459 return 0;
460}
461
fdbb873e 462static int sd_send_op_cond(struct mmc *mmc)
272cc70b
AF
463{
464 int timeout = 1000;
465 int err;
466 struct mmc_cmd cmd;
467
468 do {
469 cmd.cmdidx = MMC_CMD_APP_CMD;
470 cmd.resp_type = MMC_RSP_R1;
471 cmd.cmdarg = 0;
272cc70b
AF
472
473 err = mmc_send_cmd(mmc, &cmd, NULL);
474
475 if (err)
476 return err;
477
478 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
479 cmd.resp_type = MMC_RSP_R3;
250de12b
SB
480
481 /*
482 * Most cards do not answer if some reserved bits
483 * in the ocr are set. However, Some controller
484 * can set bit 7 (reserved for low voltages), but
485 * how to manage low voltages SD card is not yet
486 * specified.
487 */
d52ebf10
TC
488 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
489 (mmc->voltages & 0xff8000);
272cc70b
AF
490
491 if (mmc->version == SD_VERSION_2)
492 cmd.cmdarg |= OCR_HCS;
493
494 err = mmc_send_cmd(mmc, &cmd, NULL);
495
496 if (err)
497 return err;
498
499 udelay(1000);
500 } while ((!(cmd.response[0] & OCR_BUSY)) && timeout--);
501
502 if (timeout <= 0)
503 return UNUSABLE_ERR;
504
505 if (mmc->version != SD_VERSION_2)
506 mmc->version = SD_VERSION_1_0;
507
d52ebf10
TC
508 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
509 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
510 cmd.resp_type = MMC_RSP_R3;
511 cmd.cmdarg = 0;
d52ebf10
TC
512
513 err = mmc_send_cmd(mmc, &cmd, NULL);
514
515 if (err)
516 return err;
517 }
518
998be3dd 519 mmc->ocr = cmd.response[0];
272cc70b
AF
520
521 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
522 mmc->rca = 0;
523
524 return 0;
525}
526
e9550449
CLC
527/* We pass in the cmd since otherwise the init seems to fail */
528static int mmc_send_op_cond_iter(struct mmc *mmc, struct mmc_cmd *cmd,
529 int use_arg)
272cc70b 530{
272cc70b
AF
531 int err;
532
e9550449
CLC
533 cmd->cmdidx = MMC_CMD_SEND_OP_COND;
534 cmd->resp_type = MMC_RSP_R3;
535 cmd->cmdarg = 0;
536 if (use_arg && !mmc_host_is_spi(mmc)) {
537 cmd->cmdarg =
538 (mmc->voltages &
539 (mmc->op_cond_response & OCR_VOLTAGE_MASK)) |
540 (mmc->op_cond_response & OCR_ACCESS_MODE);
541
542 if (mmc->host_caps & MMC_MODE_HC)
543 cmd->cmdarg |= OCR_HCS;
544 }
545 err = mmc_send_cmd(mmc, cmd, NULL);
546 if (err)
547 return err;
548 mmc->op_cond_response = cmd->response[0];
549 return 0;
550}
551
552int mmc_send_op_cond(struct mmc *mmc)
553{
554 struct mmc_cmd cmd;
555 int err, i;
556
272cc70b
AF
557 /* Some cards seem to need this */
558 mmc_go_idle(mmc);
559
31cacbab 560 /* Asking to the card its capabilities */
e9550449
CLC
561 mmc->op_cond_pending = 1;
562 for (i = 0; i < 2; i++) {
563 err = mmc_send_op_cond_iter(mmc, &cmd, i != 0);
564 if (err)
565 return err;
cd6881b5 566
e9550449
CLC
567 /* exit if not busy (flag seems to be inverted) */
568 if (mmc->op_cond_response & OCR_BUSY)
569 return 0;
570 }
571 return IN_PROGRESS;
572}
cd6881b5 573
e9550449
CLC
574int mmc_complete_op_cond(struct mmc *mmc)
575{
576 struct mmc_cmd cmd;
577 int timeout = 1000;
578 uint start;
579 int err;
cd6881b5 580
e9550449
CLC
581 mmc->op_cond_pending = 0;
582 start = get_timer(0);
272cc70b 583 do {
e9550449 584 err = mmc_send_op_cond_iter(mmc, &cmd, 1);
272cc70b
AF
585 if (err)
586 return err;
e9550449
CLC
587 if (get_timer(start) > timeout)
588 return UNUSABLE_ERR;
589 udelay(100);
590 } while (!(mmc->op_cond_response & OCR_BUSY));
272cc70b 591
d52ebf10
TC
592 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
593 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
594 cmd.resp_type = MMC_RSP_R3;
595 cmd.cmdarg = 0;
d52ebf10
TC
596
597 err = mmc_send_cmd(mmc, &cmd, NULL);
598
599 if (err)
600 return err;
601 }
602
272cc70b 603 mmc->version = MMC_VERSION_UNKNOWN;
998be3dd 604 mmc->ocr = cmd.response[0];
272cc70b
AF
605
606 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
607 mmc->rca = 0;
608
609 return 0;
610}
611
612
fdbb873e 613static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
272cc70b
AF
614{
615 struct mmc_cmd cmd;
616 struct mmc_data data;
617 int err;
618
619 /* Get the Card Status Register */
620 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
621 cmd.resp_type = MMC_RSP_R1;
622 cmd.cmdarg = 0;
272cc70b 623
cdfd1ac6 624 data.dest = (char *)ext_csd;
272cc70b 625 data.blocks = 1;
8bfa195e 626 data.blocksize = MMC_MAX_BLOCK_LEN;
272cc70b
AF
627 data.flags = MMC_DATA_READ;
628
629 err = mmc_send_cmd(mmc, &cmd, &data);
630
631 return err;
632}
633
634
fdbb873e 635static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
272cc70b
AF
636{
637 struct mmc_cmd cmd;
5d4fc8d9
RR
638 int timeout = 1000;
639 int ret;
272cc70b
AF
640
641 cmd.cmdidx = MMC_CMD_SWITCH;
642 cmd.resp_type = MMC_RSP_R1b;
643 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
5d4fc8d9
RR
644 (index << 16) |
645 (value << 8);
272cc70b 646
5d4fc8d9
RR
647 ret = mmc_send_cmd(mmc, &cmd, NULL);
648
649 /* Waiting for the ready status */
93ad0d18
JK
650 if (!ret)
651 ret = mmc_send_status(mmc, timeout);
5d4fc8d9
RR
652
653 return ret;
654
272cc70b
AF
655}
656
fdbb873e 657static int mmc_change_freq(struct mmc *mmc)
272cc70b 658{
8bfa195e 659 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
272cc70b
AF
660 char cardtype;
661 int err;
662
663 mmc->card_caps = 0;
664
d52ebf10
TC
665 if (mmc_host_is_spi(mmc))
666 return 0;
667
272cc70b
AF
668 /* Only version 4 supports high-speed */
669 if (mmc->version < MMC_VERSION_4)
670 return 0;
671
272cc70b
AF
672 err = mmc_send_ext_csd(mmc, ext_csd);
673
674 if (err)
675 return err;
676
0560db18 677 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
272cc70b
AF
678
679 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
680
681 if (err)
682 return err;
683
684 /* Now check to see that it worked */
685 err = mmc_send_ext_csd(mmc, ext_csd);
686
687 if (err)
688 return err;
689
690 /* No high-speed support */
0560db18 691 if (!ext_csd[EXT_CSD_HS_TIMING])
272cc70b
AF
692 return 0;
693
694 /* High Speed is set, there are two types: 52MHz and 26MHz */
695 if (cardtype & MMC_HS_52MHZ)
696 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
697 else
698 mmc->card_caps |= MMC_MODE_HS;
699
700 return 0;
701}
702
bc897b1d
LW
703int mmc_switch_part(int dev_num, unsigned int part_num)
704{
705 struct mmc *mmc = find_mmc_device(dev_num);
706
707 if (!mmc)
708 return -1;
709
710 return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
711 (mmc->part_config & ~PART_ACCESS_MASK)
712 | (part_num & PART_ACCESS_MASK));
713}
714
48972d90
TR
715int mmc_getcd(struct mmc *mmc)
716{
717 int cd;
718
719 cd = board_mmc_getcd(mmc);
720
d4e1da4e
PK
721 if (cd < 0) {
722 if (mmc->getcd)
723 cd = mmc->getcd(mmc);
724 else
725 cd = 1;
726 }
48972d90
TR
727
728 return cd;
729}
730
fdbb873e 731static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
272cc70b
AF
732{
733 struct mmc_cmd cmd;
734 struct mmc_data data;
735
736 /* Switch the frequency */
737 cmd.cmdidx = SD_CMD_SWITCH_FUNC;
738 cmd.resp_type = MMC_RSP_R1;
739 cmd.cmdarg = (mode << 31) | 0xffffff;
740 cmd.cmdarg &= ~(0xf << (group * 4));
741 cmd.cmdarg |= value << (group * 4);
272cc70b
AF
742
743 data.dest = (char *)resp;
744 data.blocksize = 64;
745 data.blocks = 1;
746 data.flags = MMC_DATA_READ;
747
748 return mmc_send_cmd(mmc, &cmd, &data);
749}
750
751
fdbb873e 752static int sd_change_freq(struct mmc *mmc)
272cc70b
AF
753{
754 int err;
755 struct mmc_cmd cmd;
f781dd38
A
756 ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
757 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
272cc70b
AF
758 struct mmc_data data;
759 int timeout;
760
761 mmc->card_caps = 0;
762
d52ebf10
TC
763 if (mmc_host_is_spi(mmc))
764 return 0;
765
272cc70b
AF
766 /* Read the SCR to find out if this card supports higher speeds */
767 cmd.cmdidx = MMC_CMD_APP_CMD;
768 cmd.resp_type = MMC_RSP_R1;
769 cmd.cmdarg = mmc->rca << 16;
272cc70b
AF
770
771 err = mmc_send_cmd(mmc, &cmd, NULL);
772
773 if (err)
774 return err;
775
776 cmd.cmdidx = SD_CMD_APP_SEND_SCR;
777 cmd.resp_type = MMC_RSP_R1;
778 cmd.cmdarg = 0;
272cc70b
AF
779
780 timeout = 3;
781
782retry_scr:
f781dd38 783 data.dest = (char *)scr;
272cc70b
AF
784 data.blocksize = 8;
785 data.blocks = 1;
786 data.flags = MMC_DATA_READ;
787
788 err = mmc_send_cmd(mmc, &cmd, &data);
789
790 if (err) {
791 if (timeout--)
792 goto retry_scr;
793
794 return err;
795 }
796
4e3d89ba
YK
797 mmc->scr[0] = __be32_to_cpu(scr[0]);
798 mmc->scr[1] = __be32_to_cpu(scr[1]);
272cc70b
AF
799
800 switch ((mmc->scr[0] >> 24) & 0xf) {
801 case 0:
802 mmc->version = SD_VERSION_1_0;
803 break;
804 case 1:
805 mmc->version = SD_VERSION_1_10;
806 break;
807 case 2:
808 mmc->version = SD_VERSION_2;
1741c64d
JC
809 if ((mmc->scr[0] >> 15) & 0x1)
810 mmc->version = SD_VERSION_3;
272cc70b
AF
811 break;
812 default:
813 mmc->version = SD_VERSION_1_0;
814 break;
815 }
816
b44c7083
AS
817 if (mmc->scr[0] & SD_DATA_4BIT)
818 mmc->card_caps |= MMC_MODE_4BIT;
819
272cc70b
AF
820 /* Version 1.0 doesn't support switching */
821 if (mmc->version == SD_VERSION_1_0)
822 return 0;
823
824 timeout = 4;
825 while (timeout--) {
826 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
f781dd38 827 (u8 *)switch_status);
272cc70b
AF
828
829 if (err)
830 return err;
831
832 /* The high-speed function is busy. Try again */
4e3d89ba 833 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
272cc70b
AF
834 break;
835 }
836
272cc70b 837 /* If high-speed isn't supported, we return */
4e3d89ba 838 if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
272cc70b
AF
839 return 0;
840
2c3fbf4c
ML
841 /*
842 * If the host doesn't support SD_HIGHSPEED, do not switch card to
843 * HIGHSPEED mode even if the card support SD_HIGHSPPED.
844 * This can avoid furthur problem when the card runs in different
845 * mode between the host.
846 */
847 if (!((mmc->host_caps & MMC_MODE_HS_52MHz) &&
848 (mmc->host_caps & MMC_MODE_HS)))
849 return 0;
850
f781dd38 851 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
272cc70b
AF
852
853 if (err)
854 return err;
855
4e3d89ba 856 if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
272cc70b
AF
857 mmc->card_caps |= MMC_MODE_HS;
858
859 return 0;
860}
861
862/* frequency bases */
863/* divided by 10 to be nice to platforms without floating point */
5f837c2c 864static const int fbase[] = {
272cc70b
AF
865 10000,
866 100000,
867 1000000,
868 10000000,
869};
870
871/* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
872 * to platforms without floating point.
873 */
5f837c2c 874static const int multipliers[] = {
272cc70b
AF
875 0, /* reserved */
876 10,
877 12,
878 13,
879 15,
880 20,
881 25,
882 30,
883 35,
884 40,
885 45,
886 50,
887 55,
888 60,
889 70,
890 80,
891};
892
fdbb873e 893static void mmc_set_ios(struct mmc *mmc)
272cc70b
AF
894{
895 mmc->set_ios(mmc);
896}
897
898void mmc_set_clock(struct mmc *mmc, uint clock)
899{
900 if (clock > mmc->f_max)
901 clock = mmc->f_max;
902
903 if (clock < mmc->f_min)
904 clock = mmc->f_min;
905
906 mmc->clock = clock;
907
908 mmc_set_ios(mmc);
909}
910
fdbb873e 911static void mmc_set_bus_width(struct mmc *mmc, uint width)
272cc70b
AF
912{
913 mmc->bus_width = width;
914
915 mmc_set_ios(mmc);
916}
917
fdbb873e 918static int mmc_startup(struct mmc *mmc)
272cc70b 919{
7798f6db 920 int err;
272cc70b 921 uint mult, freq;
639b7827 922 u64 cmult, csize, capacity;
272cc70b 923 struct mmc_cmd cmd;
8bfa195e
SG
924 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
925 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
5d4fc8d9 926 int timeout = 1000;
272cc70b 927
d52ebf10
TC
928#ifdef CONFIG_MMC_SPI_CRC_ON
929 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
930 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
931 cmd.resp_type = MMC_RSP_R1;
932 cmd.cmdarg = 1;
d52ebf10
TC
933 err = mmc_send_cmd(mmc, &cmd, NULL);
934
935 if (err)
936 return err;
937 }
938#endif
939
272cc70b 940 /* Put the Card in Identify Mode */
d52ebf10
TC
941 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
942 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
272cc70b
AF
943 cmd.resp_type = MMC_RSP_R2;
944 cmd.cmdarg = 0;
272cc70b
AF
945
946 err = mmc_send_cmd(mmc, &cmd, NULL);
947
948 if (err)
949 return err;
950
951 memcpy(mmc->cid, cmd.response, 16);
952
953 /*
954 * For MMC cards, set the Relative Address.
955 * For SD cards, get the Relatvie Address.
956 * This also puts the cards into Standby State
957 */
d52ebf10
TC
958 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
959 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
960 cmd.cmdarg = mmc->rca << 16;
961 cmd.resp_type = MMC_RSP_R6;
272cc70b 962
d52ebf10 963 err = mmc_send_cmd(mmc, &cmd, NULL);
272cc70b 964
d52ebf10
TC
965 if (err)
966 return err;
272cc70b 967
d52ebf10
TC
968 if (IS_SD(mmc))
969 mmc->rca = (cmd.response[0] >> 16) & 0xffff;
970 }
272cc70b
AF
971
972 /* Get the Card-Specific Data */
973 cmd.cmdidx = MMC_CMD_SEND_CSD;
974 cmd.resp_type = MMC_RSP_R2;
975 cmd.cmdarg = mmc->rca << 16;
272cc70b
AF
976
977 err = mmc_send_cmd(mmc, &cmd, NULL);
978
5d4fc8d9
RR
979 /* Waiting for the ready status */
980 mmc_send_status(mmc, timeout);
981
272cc70b
AF
982 if (err)
983 return err;
984
998be3dd
RV
985 mmc->csd[0] = cmd.response[0];
986 mmc->csd[1] = cmd.response[1];
987 mmc->csd[2] = cmd.response[2];
988 mmc->csd[3] = cmd.response[3];
272cc70b
AF
989
990 if (mmc->version == MMC_VERSION_UNKNOWN) {
0b453ffe 991 int version = (cmd.response[0] >> 26) & 0xf;
272cc70b
AF
992
993 switch (version) {
994 case 0:
995 mmc->version = MMC_VERSION_1_2;
996 break;
997 case 1:
998 mmc->version = MMC_VERSION_1_4;
999 break;
1000 case 2:
1001 mmc->version = MMC_VERSION_2_2;
1002 break;
1003 case 3:
1004 mmc->version = MMC_VERSION_3;
1005 break;
1006 case 4:
1007 mmc->version = MMC_VERSION_4;
1008 break;
1009 default:
1010 mmc->version = MMC_VERSION_1_2;
1011 break;
1012 }
1013 }
1014
1015 /* divide frequency by 10, since the mults are 10x bigger */
0b453ffe
RV
1016 freq = fbase[(cmd.response[0] & 0x7)];
1017 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
272cc70b
AF
1018
1019 mmc->tran_speed = freq * mult;
1020
998be3dd 1021 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
272cc70b
AF
1022
1023 if (IS_SD(mmc))
1024 mmc->write_bl_len = mmc->read_bl_len;
1025 else
998be3dd 1026 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
272cc70b
AF
1027
1028 if (mmc->high_capacity) {
1029 csize = (mmc->csd[1] & 0x3f) << 16
1030 | (mmc->csd[2] & 0xffff0000) >> 16;
1031 cmult = 8;
1032 } else {
1033 csize = (mmc->csd[1] & 0x3ff) << 2
1034 | (mmc->csd[2] & 0xc0000000) >> 30;
1035 cmult = (mmc->csd[2] & 0x00038000) >> 15;
1036 }
1037
1038 mmc->capacity = (csize + 1) << (cmult + 2);
1039 mmc->capacity *= mmc->read_bl_len;
1040
8bfa195e
SG
1041 if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
1042 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
272cc70b 1043
8bfa195e
SG
1044 if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
1045 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
272cc70b
AF
1046
1047 /* Select the card, and put it into Transfer Mode */
d52ebf10
TC
1048 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1049 cmd.cmdidx = MMC_CMD_SELECT_CARD;
fe8f7066 1050 cmd.resp_type = MMC_RSP_R1;
d52ebf10 1051 cmd.cmdarg = mmc->rca << 16;
d52ebf10 1052 err = mmc_send_cmd(mmc, &cmd, NULL);
272cc70b 1053
d52ebf10
TC
1054 if (err)
1055 return err;
1056 }
272cc70b 1057
e6f99a56
LW
1058 /*
1059 * For SD, its erase group is always one sector
1060 */
1061 mmc->erase_grp_size = 1;
bc897b1d 1062 mmc->part_config = MMCPART_NOAVAILABLE;
d23e2c09
SG
1063 if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
1064 /* check ext_csd version and capacity */
1065 err = mmc_send_ext_csd(mmc, ext_csd);
fdbb873e 1066 if (!err && (ext_csd[EXT_CSD_REV] >= 2)) {
639b7827
YS
1067 /*
1068 * According to the JEDEC Standard, the value of
1069 * ext_csd's capacity is valid if the value is more
1070 * than 2GB
1071 */
0560db18
LW
1072 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
1073 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
1074 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
1075 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
8bfa195e 1076 capacity *= MMC_MAX_BLOCK_LEN;
b1f1e821 1077 if ((capacity >> 20) > 2 * 1024)
639b7827 1078 mmc->capacity = capacity;
d23e2c09 1079 }
bc897b1d 1080
64f4a619
JC
1081 switch (ext_csd[EXT_CSD_REV]) {
1082 case 1:
1083 mmc->version = MMC_VERSION_4_1;
1084 break;
1085 case 2:
1086 mmc->version = MMC_VERSION_4_2;
1087 break;
1088 case 3:
1089 mmc->version = MMC_VERSION_4_3;
1090 break;
1091 case 5:
1092 mmc->version = MMC_VERSION_4_41;
1093 break;
1094 case 6:
1095 mmc->version = MMC_VERSION_4_5;
1096 break;
1097 }
1098
e6f99a56
LW
1099 /*
1100 * Check whether GROUP_DEF is set, if yes, read out
1101 * group size from ext_csd directly, or calculate
1102 * the group size from the csd value.
1103 */
8bfa195e 1104 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF]) {
0560db18 1105 mmc->erase_grp_size =
8bfa195e
SG
1106 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] *
1107 MMC_MAX_BLOCK_LEN * 1024;
1108 } else {
e6f99a56
LW
1109 int erase_gsz, erase_gmul;
1110 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
1111 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
1112 mmc->erase_grp_size = (erase_gsz + 1)
1113 * (erase_gmul + 1);
1114 }
1115
bc897b1d 1116 /* store the partition info of emmc */
8948ea83
SW
1117 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
1118 ext_csd[EXT_CSD_BOOT_MULT])
0560db18 1119 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
d23e2c09
SG
1120 }
1121
272cc70b
AF
1122 if (IS_SD(mmc))
1123 err = sd_change_freq(mmc);
1124 else
1125 err = mmc_change_freq(mmc);
1126
1127 if (err)
1128 return err;
1129
1130 /* Restrict card's capabilities by what the host can do */
1131 mmc->card_caps &= mmc->host_caps;
1132
1133 if (IS_SD(mmc)) {
1134 if (mmc->card_caps & MMC_MODE_4BIT) {
1135 cmd.cmdidx = MMC_CMD_APP_CMD;
1136 cmd.resp_type = MMC_RSP_R1;
1137 cmd.cmdarg = mmc->rca << 16;
272cc70b
AF
1138
1139 err = mmc_send_cmd(mmc, &cmd, NULL);
1140 if (err)
1141 return err;
1142
1143 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1144 cmd.resp_type = MMC_RSP_R1;
1145 cmd.cmdarg = 2;
272cc70b
AF
1146 err = mmc_send_cmd(mmc, &cmd, NULL);
1147 if (err)
1148 return err;
1149
1150 mmc_set_bus_width(mmc, 4);
1151 }
1152
1153 if (mmc->card_caps & MMC_MODE_HS)
ad5fd922 1154 mmc->tran_speed = 50000000;
272cc70b 1155 else
ad5fd922 1156 mmc->tran_speed = 25000000;
272cc70b 1157 } else {
7798f6db
AF
1158 int idx;
1159
1160 /* An array of possible bus widths in order of preference */
1161 static unsigned ext_csd_bits[] = {
1162 EXT_CSD_BUS_WIDTH_8,
1163 EXT_CSD_BUS_WIDTH_4,
1164 EXT_CSD_BUS_WIDTH_1,
1165 };
1166
1167 /* An array to map CSD bus widths to host cap bits */
1168 static unsigned ext_to_hostcaps[] = {
1169 [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
1170 [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
1171 };
1172
1173 /* An array to map chosen bus width to an integer */
1174 static unsigned widths[] = {
1175 8, 4, 1,
1176 };
1177
1178 for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
1179 unsigned int extw = ext_csd_bits[idx];
1180
1181 /*
1182 * Check to make sure the controller supports
1183 * this bus width, if it's more than 1
1184 */
1185 if (extw != EXT_CSD_BUS_WIDTH_1 &&
1186 !(mmc->host_caps & ext_to_hostcaps[extw]))
1187 continue;
1188
272cc70b 1189 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
7798f6db 1190 EXT_CSD_BUS_WIDTH, extw);
272cc70b
AF
1191
1192 if (err)
4137894e 1193 continue;
272cc70b 1194
7798f6db 1195 mmc_set_bus_width(mmc, widths[idx]);
4137894e
LW
1196
1197 err = mmc_send_ext_csd(mmc, test_csd);
1198 if (!err && ext_csd[EXT_CSD_PARTITIONING_SUPPORT] \
1199 == test_csd[EXT_CSD_PARTITIONING_SUPPORT]
1200 && ext_csd[EXT_CSD_ERASE_GROUP_DEF] \
1201 == test_csd[EXT_CSD_ERASE_GROUP_DEF] \
1202 && ext_csd[EXT_CSD_REV] \
1203 == test_csd[EXT_CSD_REV]
1204 && ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] \
1205 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1206 && memcmp(&ext_csd[EXT_CSD_SEC_CNT], \
1207 &test_csd[EXT_CSD_SEC_CNT], 4) == 0) {
1208
7798f6db 1209 mmc->card_caps |= ext_to_hostcaps[extw];
4137894e
LW
1210 break;
1211 }
272cc70b
AF
1212 }
1213
1214 if (mmc->card_caps & MMC_MODE_HS) {
1215 if (mmc->card_caps & MMC_MODE_HS_52MHz)
ad5fd922 1216 mmc->tran_speed = 52000000;
272cc70b 1217 else
ad5fd922
JC
1218 mmc->tran_speed = 26000000;
1219 }
272cc70b
AF
1220 }
1221
ad5fd922
JC
1222 mmc_set_clock(mmc, mmc->tran_speed);
1223
272cc70b
AF
1224 /* fill in device description */
1225 mmc->block_dev.lun = 0;
1226 mmc->block_dev.type = 0;
1227 mmc->block_dev.blksz = mmc->read_bl_len;
0472fbfd 1228 mmc->block_dev.log2blksz = LOG2(mmc->block_dev.blksz);
9b1f942c 1229 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
babce5f6
TH
1230 sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x",
1231 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
1232 (mmc->cid[3] >> 16) & 0xffff);
1233 sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
1234 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1235 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
1236 (mmc->cid[2] >> 24) & 0xff);
1237 sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
1238 (mmc->cid[2] >> 16) & 0xf);
122efd43 1239#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
272cc70b 1240 init_part(&mmc->block_dev);
122efd43 1241#endif
272cc70b
AF
1242
1243 return 0;
1244}
1245
fdbb873e 1246static int mmc_send_if_cond(struct mmc *mmc)
272cc70b
AF
1247{
1248 struct mmc_cmd cmd;
1249 int err;
1250
1251 cmd.cmdidx = SD_CMD_SEND_IF_COND;
1252 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
1253 cmd.cmdarg = ((mmc->voltages & 0xff8000) != 0) << 8 | 0xaa;
1254 cmd.resp_type = MMC_RSP_R7;
272cc70b
AF
1255
1256 err = mmc_send_cmd(mmc, &cmd, NULL);
1257
1258 if (err)
1259 return err;
1260
998be3dd 1261 if ((cmd.response[0] & 0xff) != 0xaa)
272cc70b
AF
1262 return UNUSABLE_ERR;
1263 else
1264 mmc->version = SD_VERSION_2;
1265
1266 return 0;
1267}
1268
1269int mmc_register(struct mmc *mmc)
1270{
1271 /* Setup the universal parts of the block interface just once */
1272 mmc->block_dev.if_type = IF_TYPE_MMC;
1273 mmc->block_dev.dev = cur_dev_num++;
1274 mmc->block_dev.removable = 1;
1275 mmc->block_dev.block_read = mmc_bread;
1276 mmc->block_dev.block_write = mmc_bwrite;
e6f99a56 1277 mmc->block_dev.block_erase = mmc_berase;
8feafcc4
JR
1278 if (!mmc->b_max)
1279 mmc->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
272cc70b
AF
1280
1281 INIT_LIST_HEAD (&mmc->link);
1282
1283 list_add_tail (&mmc->link, &mmc_devices);
1284
1285 return 0;
1286}
1287
df3fc526 1288#ifdef CONFIG_PARTITIONS
272cc70b
AF
1289block_dev_desc_t *mmc_get_dev(int dev)
1290{
1291 struct mmc *mmc = find_mmc_device(dev);
6bb4b4bc 1292 if (!mmc || mmc_init(mmc))
40242bc3 1293 return NULL;
272cc70b 1294
40242bc3 1295 return &mmc->block_dev;
272cc70b 1296}
df3fc526 1297#endif
272cc70b 1298
e9550449 1299int mmc_start_init(struct mmc *mmc)
272cc70b 1300{
afd5932b 1301 int err;
272cc70b 1302
48972d90
TR
1303 if (mmc_getcd(mmc) == 0) {
1304 mmc->has_init = 0;
1305 printf("MMC: no card present\n");
1306 return NO_CARD_ERR;
1307 }
1308
bc897b1d
LW
1309 if (mmc->has_init)
1310 return 0;
1311
272cc70b
AF
1312 err = mmc->init(mmc);
1313
1314 if (err)
1315 return err;
1316
b86b85e2
IY
1317 mmc_set_bus_width(mmc, 1);
1318 mmc_set_clock(mmc, 1);
1319
272cc70b
AF
1320 /* Reset the Card */
1321 err = mmc_go_idle(mmc);
1322
1323 if (err)
1324 return err;
1325
bc897b1d
LW
1326 /* The internal partition reset to user partition(0) at every CMD0*/
1327 mmc->part_num = 0;
1328
272cc70b 1329 /* Test for SD version 2 */
afd5932b 1330 err = mmc_send_if_cond(mmc);
272cc70b 1331
272cc70b
AF
1332 /* Now try to get the SD card's operating condition */
1333 err = sd_send_op_cond(mmc);
1334
1335 /* If the command timed out, we check for an MMC card */
1336 if (err == TIMEOUT) {
1337 err = mmc_send_op_cond(mmc);
1338
e9550449 1339 if (err && err != IN_PROGRESS) {
272cc70b
AF
1340 printf("Card did not respond to voltage select!\n");
1341 return UNUSABLE_ERR;
1342 }
1343 }
1344
e9550449
CLC
1345 if (err == IN_PROGRESS)
1346 mmc->init_in_progress = 1;
1347
1348 return err;
1349}
1350
1351static int mmc_complete_init(struct mmc *mmc)
1352{
1353 int err = 0;
1354
1355 if (mmc->op_cond_pending)
1356 err = mmc_complete_op_cond(mmc);
1357
1358 if (!err)
1359 err = mmc_startup(mmc);
bc897b1d
LW
1360 if (err)
1361 mmc->has_init = 0;
1362 else
1363 mmc->has_init = 1;
e9550449
CLC
1364 mmc->init_in_progress = 0;
1365 return err;
1366}
1367
1368int mmc_init(struct mmc *mmc)
1369{
1370 int err = IN_PROGRESS;
1371 unsigned start = get_timer(0);
1372
1373 if (mmc->has_init)
1374 return 0;
1375 if (!mmc->init_in_progress)
1376 err = mmc_start_init(mmc);
1377
1378 if (!err || err == IN_PROGRESS)
1379 err = mmc_complete_init(mmc);
1380 debug("%s: %d, time %lu\n", __func__, err, get_timer(start));
bc897b1d 1381 return err;
272cc70b
AF
1382}
1383
1384/*
1385 * CPU and board-specific MMC initializations. Aliased function
1386 * signals caller to move on
1387 */
1388static int __def_mmc_init(bd_t *bis)
1389{
1390 return -1;
1391}
1392
f9a109b3
PT
1393int cpu_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init")));
1394int board_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init")));
272cc70b
AF
1395
1396void print_mmc_devices(char separator)
1397{
1398 struct mmc *m;
1399 struct list_head *entry;
1400
1401 list_for_each(entry, &mmc_devices) {
1402 m = list_entry(entry, struct mmc, link);
1403
1404 printf("%s: %d", m->name, m->block_dev.dev);
1405
1406 if (entry->next != &mmc_devices)
1407 printf("%c ", separator);
1408 }
1409
1410 printf("\n");
1411}
1412
ea6ebe21
LW
1413int get_mmc_num(void)
1414{
1415 return cur_dev_num;
1416}
1417
e9550449
CLC
1418void mmc_set_preinit(struct mmc *mmc, int preinit)
1419{
1420 mmc->preinit = preinit;
1421}
1422
1423static void do_preinit(void)
1424{
1425 struct mmc *m;
1426 struct list_head *entry;
1427
1428 list_for_each(entry, &mmc_devices) {
1429 m = list_entry(entry, struct mmc, link);
1430
1431 if (m->preinit)
1432 mmc_start_init(m);
1433 }
1434}
1435
1436
272cc70b
AF
1437int mmc_initialize(bd_t *bis)
1438{
1439 INIT_LIST_HEAD (&mmc_devices);
1440 cur_dev_num = 0;
1441
1442 if (board_mmc_init(bis) < 0)
1443 cpu_mmc_init(bis);
1444
1445 print_mmc_devices(',');
1446
e9550449 1447 do_preinit();
272cc70b
AF
1448 return 0;
1449}