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c609719b 1#
eca3aeb3 2# (C) Copyright 2000 - 2013
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3# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4#
eca3aeb3 5# SPDX-License-Identifier: GPL-2.0+
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6#
7
8Summary:
9========
10
24ee89b9 11This directory contains the source code for U-Boot, a boot loader for
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12Embedded boards based on PowerPC, ARM, MIPS and several other
13processors, which can be installed in a boot ROM and used to
14initialize and test the hardware or to download and run application
15code.
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16
17The development of U-Boot is closely related to Linux: some parts of
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18the source code originate in the Linux source tree, we have some
19header files in common, and special provision has been made to
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20support booting of Linux images.
21
22Some attention has been paid to make this software easily
23configurable and extendable. For instance, all monitor commands are
24implemented with the same call interface, so that it's very easy to
25add new commands. Also, instead of permanently adding rarely used
26code (for instance hardware test utilities) to the monitor, you can
27load and run it dynamically.
28
29
30Status:
31=======
32
33In general, all boards for which a configuration option exists in the
24ee89b9 34Makefile have been tested to some extent and can be considered
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35"working". In fact, many of them are used in production systems.
36
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37In case of problems see the CHANGELOG file to find out who contributed
38the specific port. In addition, there are various MAINTAINERS files
39scattered throughout the U-Boot source identifying the people or
40companies responsible for various boards and subsystems.
c609719b 41
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42Note: As of August, 2010, there is no longer a CHANGELOG file in the
43actual U-Boot source tree; however, it can be created dynamically
44from the Git log using:
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45
46 make CHANGELOG
47
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48
49Where to get help:
50==================
51
24ee89b9 52In case you have questions about, problems with or contributions for
7207b366 53U-Boot, you should send a message to the U-Boot mailing list at
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54<u-boot@lists.denx.de>. There is also an archive of previous traffic
55on the mailing list - please search the archive before asking FAQ's.
56Please see http://lists.denx.de/pipermail/u-boot and
57http://dir.gmane.org/gmane.comp.boot-loaders.u-boot
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58
59
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60Where to get source code:
61=========================
62
7207b366 63The U-Boot source code is maintained in the Git repository at
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64git://www.denx.de/git/u-boot.git ; you can browse it online at
65http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=summary
66
67The "snapshot" links on this page allow you to download tarballs of
11ccc33f 68any version you might be interested in. Official releases are also
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69available for FTP download from the ftp://ftp.denx.de/pub/u-boot/
70directory.
71
d4ee711d 72Pre-built (and tested) images are available from
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73ftp://ftp.denx.de/pub/u-boot/images/
74
75
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76Where we come from:
77===================
78
79- start from 8xxrom sources
24ee89b9 80- create PPCBoot project (http://sourceforge.net/projects/ppcboot)
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81- clean up code
82- make it easier to add custom boards
83- make it possible to add other [PowerPC] CPUs
84- extend functions, especially:
85 * Provide extended interface to Linux boot loader
86 * S-Record download
87 * network boot
11ccc33f 88 * PCMCIA / CompactFlash / ATA disk / SCSI ... boot
24ee89b9 89- create ARMBoot project (http://sourceforge.net/projects/armboot)
c609719b 90- add other CPU families (starting with ARM)
24ee89b9 91- create U-Boot project (http://sourceforge.net/projects/u-boot)
0d28f34b 92- current project page: see http://www.denx.de/wiki/U-Boot
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93
94
95Names and Spelling:
96===================
97
98The "official" name of this project is "Das U-Boot". The spelling
99"U-Boot" shall be used in all written text (documentation, comments
100in source files etc.). Example:
101
102 This is the README file for the U-Boot project.
103
104File names etc. shall be based on the string "u-boot". Examples:
105
106 include/asm-ppc/u-boot.h
107
108 #include <asm/u-boot.h>
109
110Variable names, preprocessor constants etc. shall be either based on
111the string "u_boot" or on "U_BOOT". Example:
112
113 U_BOOT_VERSION u_boot_logo
114 IH_OS_U_BOOT u_boot_hush_start
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115
116
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117Versioning:
118===========
119
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120Starting with the release in October 2008, the names of the releases
121were changed from numerical release numbers without deeper meaning
122into a time stamp based numbering. Regular releases are identified by
123names consisting of the calendar year and month of the release date.
124Additional fields (if present) indicate release candidates or bug fix
125releases in "stable" maintenance trees.
126
127Examples:
c0f40859 128 U-Boot v2009.11 - Release November 2009
360d883a 129 U-Boot v2009.11.1 - Release 1 in version November 2009 stable tree
0de21ecb 130 U-Boot v2010.09-rc1 - Release candidate 1 for September 2010 release
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131
132
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133Directory Hierarchy:
134====================
135
8d321b81 136/arch Architecture specific files
6eae68e4 137 /arc Files generic to ARC architecture
8d321b81 138 /arm Files generic to ARM architecture
8d321b81 139 /avr32 Files generic to AVR32 architecture
8d321b81 140 /blackfin Files generic to Analog Devices Blackfin architecture
8d321b81 141 /m68k Files generic to m68k architecture
8d321b81 142 /microblaze Files generic to microblaze architecture
8d321b81 143 /mips Files generic to MIPS architecture
afc1ce82 144 /nds32 Files generic to NDS32 architecture
8d321b81 145 /nios2 Files generic to Altera NIOS2 architecture
33c7731b 146 /openrisc Files generic to OpenRISC architecture
a47a12be 147 /powerpc Files generic to PowerPC architecture
7207b366 148 /sandbox Files generic to HW-independent "sandbox"
8d321b81 149 /sh Files generic to SH architecture
8d321b81 150 /sparc Files generic to SPARC architecture
33c7731b 151 /x86 Files generic to x86 architecture
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152/api Machine/arch independent API for external apps
153/board Board dependent files
740f7e5c 154/cmd U-Boot commands functions
8d321b81 155/common Misc architecture independent functions
7207b366 156/configs Board default configuration files
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157/disk Code for disk drive partition handling
158/doc Documentation (don't expect too much)
159/drivers Commonly used device drivers
33c7731b 160/dts Contains Makefile for building internal U-Boot fdt.
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161/examples Example code for standalone applications, etc.
162/fs Filesystem code (cramfs, ext2, jffs2, etc.)
163/include Header Files
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164/lib Library routines generic to all architectures
165/Licenses Various license files
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166/net Networking code
167/post Power On Self Test
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168/scripts Various build scripts and Makefiles
169/test Various unit test files
8d321b81 170/tools Tools to build S-Record or U-Boot images, etc.
c609719b 171
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172Software Configuration:
173=======================
174
175Configuration is usually done using C preprocessor defines; the
176rationale behind that is to avoid dead code whenever possible.
177
178There are two classes of configuration variables:
179
180* Configuration _OPTIONS_:
181 These are selectable by the user and have names beginning with
182 "CONFIG_".
183
184* Configuration _SETTINGS_:
185 These depend on the hardware etc. and should not be meddled with if
186 you don't know what you're doing; they have names beginning with
6d0f6bcf 187 "CONFIG_SYS_".
c609719b 188
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189Previously, all configuration was done by hand, which involved creating
190symbolic links and editing configuration files manually. More recently,
191U-Boot has added the Kbuild infrastructure used by the Linux kernel,
192allowing you to use the "make menuconfig" command to configure your
193build.
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194
195
196Selection of Processor Architecture and Board Type:
197---------------------------------------------------
198
199For all supported boards there are ready-to-use default
ab584d67 200configurations available; just type "make <board_name>_defconfig".
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201
202Example: For a TQM823L module type:
203
204 cd u-boot
ab584d67 205 make TQM823L_defconfig
c609719b 206
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207Note: If you're looking for the default configuration file for a board
208you're sure used to be there but is now missing, check the file
209doc/README.scrapyard for a list of no longer supported boards.
c609719b 210
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211Sandbox Environment:
212--------------------
213
214U-Boot can be built natively to run on a Linux host using the 'sandbox'
215board. This allows feature development which is not board- or architecture-
216specific to be undertaken on a native platform. The sandbox is also used to
217run some of U-Boot's tests.
218
6b1978f8 219See board/sandbox/README.sandbox for more details.
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220
221
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222Board Initialisation Flow:
223--------------------------
224
225This is the intended start-up flow for boards. This should apply for both
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226SPL and U-Boot proper (i.e. they both follow the same rules).
227
228Note: "SPL" stands for "Secondary Program Loader," which is explained in
229more detail later in this file.
230
231At present, SPL mostly uses a separate code path, but the function names
232and roles of each function are the same. Some boards or architectures
233may not conform to this. At least most ARM boards which use
234CONFIG_SPL_FRAMEWORK conform to this.
235
236Execution typically starts with an architecture-specific (and possibly
237CPU-specific) start.S file, such as:
238
239 - arch/arm/cpu/armv7/start.S
240 - arch/powerpc/cpu/mpc83xx/start.S
241 - arch/mips/cpu/start.S
db910353 242
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243and so on. From there, three functions are called; the purpose and
244limitations of each of these functions are described below.
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245
246lowlevel_init():
247 - purpose: essential init to permit execution to reach board_init_f()
248 - no global_data or BSS
249 - there is no stack (ARMv7 may have one but it will soon be removed)
250 - must not set up SDRAM or use console
251 - must only do the bare minimum to allow execution to continue to
252 board_init_f()
253 - this is almost never needed
254 - return normally from this function
255
256board_init_f():
257 - purpose: set up the machine ready for running board_init_r():
258 i.e. SDRAM and serial UART
259 - global_data is available
260 - stack is in SRAM
261 - BSS is not available, so you cannot use global/static variables,
262 only stack variables and global_data
263
264 Non-SPL-specific notes:
265 - dram_init() is called to set up DRAM. If already done in SPL this
266 can do nothing
267
268 SPL-specific notes:
269 - you can override the entire board_init_f() function with your own
270 version as needed.
271 - preloader_console_init() can be called here in extremis
272 - should set up SDRAM, and anything needed to make the UART work
273 - these is no need to clear BSS, it will be done by crt0.S
274 - must return normally from this function (don't call board_init_r()
275 directly)
276
277Here the BSS is cleared. For SPL, if CONFIG_SPL_STACK_R is defined, then at
278this point the stack and global_data are relocated to below
279CONFIG_SPL_STACK_R_ADDR. For non-SPL, U-Boot is relocated to run at the top of
280memory.
281
282board_init_r():
283 - purpose: main execution, common code
284 - global_data is available
285 - SDRAM is available
286 - BSS is available, all static/global variables can be used
287 - execution eventually continues to main_loop()
288
289 Non-SPL-specific notes:
290 - U-Boot is relocated to the top of memory and is now running from
291 there.
292
293 SPL-specific notes:
294 - stack is optionally in SDRAM, if CONFIG_SPL_STACK_R is defined and
295 CONFIG_SPL_STACK_R_ADDR points into SDRAM
296 - preloader_console_init() can be called here - typically this is
297 done by defining CONFIG_SPL_BOARD_INIT and then supplying a
298 spl_board_init() function containing this call
299 - loads U-Boot or (in falcon mode) Linux
300
301
302
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303Configuration Options:
304----------------------
305
306Configuration depends on the combination of board and CPU type; all
307such information is kept in a configuration file
308"include/configs/<board_name>.h".
309
310Example: For a TQM823L module, all configuration settings are in
311"include/configs/TQM823L.h".
312
313
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314Many of the options are named exactly as the corresponding Linux
315kernel configuration options. The intention is to make it easier to
316build a config tool - later.
317
318
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319The following options need to be configured:
320
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321- CPU Type: Define exactly one, e.g. CONFIG_MPC85XX.
322
323- Board Type: Define exactly one, e.g. CONFIG_MPC8540ADS.
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324
325- CPU Daughterboard Type: (if CONFIG_ATSTK1000 is defined)
09ea0de0 326 Define exactly one, e.g. CONFIG_ATSTK1002
c609719b 327
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328- Marvell Family Member
329 CONFIG_SYS_MVFS - define it if you want to enable
330 multiple fs option at one time
331 for marvell soc family
332
11ccc33f 333- 8xx CPU Options: (if using an MPC8xx CPU)
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334 CONFIG_8xx_GCLK_FREQ - deprecated: CPU clock if
335 get_gclk_freq() cannot work
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336 e.g. if there is no 32KHz
337 reference PIT/RTC clock
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338 CONFIG_8xx_OSCLK - PLL input clock (either EXTCLK
339 or XTAL/EXTAL)
c609719b 340
66ca92a5 341- 859/866/885 CPU options: (if using a MPC859 or MPC866 or MPC885 CPU):
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342 CONFIG_SYS_8xx_CPUCLK_MIN
343 CONFIG_SYS_8xx_CPUCLK_MAX
66ca92a5 344 CONFIG_8xx_CPUCLK_DEFAULT
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345 See doc/README.MPC866
346
6d0f6bcf 347 CONFIG_SYS_MEASURE_CPUCLK
75d1ea7f 348
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349 Define this to measure the actual CPU clock instead
350 of relying on the correctness of the configured
351 values. Mostly useful for board bringup to make sure
352 the PLL is locked at the intended frequency. Note
353 that this requires a (stable) reference clock (32 kHz
6d0f6bcf 354 RTC clock or CONFIG_SYS_8XX_XIN)
75d1ea7f 355
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356 CONFIG_SYS_DELAYED_ICACHE
357
358 Define this option if you want to enable the
359 ICache only when Code runs from RAM.
360
66412c63 361- 85xx CPU Options:
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362 CONFIG_SYS_PPC64
363
364 Specifies that the core is a 64-bit PowerPC implementation (implements
365 the "64" category of the Power ISA). This is necessary for ePAPR
366 compliance, among other possible reasons.
367
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368 CONFIG_SYS_FSL_TBCLK_DIV
369
370 Defines the core time base clock divider ratio compared to the
371 system clock. On most PQ3 devices this is 8, on newer QorIQ
372 devices it can be 16 or 32. The ratio varies from SoC to Soc.
373
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374 CONFIG_SYS_FSL_PCIE_COMPAT
375
376 Defines the string to utilize when trying to match PCIe device
377 tree nodes for the given platform.
378
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379 CONFIG_SYS_FSL_ERRATUM_A004510
380
381 Enables a workaround for erratum A004510. If set,
382 then CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV and
383 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY must be set.
384
385 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV
386 CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2 (optional)
387
388 Defines one or two SoC revisions (low 8 bits of SVR)
389 for which the A004510 workaround should be applied.
390
391 The rest of SVR is either not relevant to the decision
392 of whether the erratum is present (e.g. p2040 versus
393 p2041) or is implied by the build target, which controls
394 whether CONFIG_SYS_FSL_ERRATUM_A004510 is set.
395
396 See Freescale App Note 4493 for more information about
397 this erratum.
398
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399 CONFIG_A003399_NOR_WORKAROUND
400 Enables a workaround for IFC erratum A003399. It is only
b445bbb4 401 required during NOR boot.
74fa22ed 402
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403 CONFIG_A008044_WORKAROUND
404 Enables a workaround for T1040/T1042 erratum A008044. It is only
b445bbb4 405 required during NAND boot and valid for Rev 1.0 SoC revision
9f074e67 406
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407 CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY
408
409 This is the value to write into CCSR offset 0x18600
410 according to the A004510 workaround.
411
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412 CONFIG_SYS_FSL_DSP_DDR_ADDR
413 This value denotes start offset of DDR memory which is
414 connected exclusively to the DSP cores.
415
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416 CONFIG_SYS_FSL_DSP_M2_RAM_ADDR
417 This value denotes start offset of M2 memory
418 which is directly connected to the DSP core.
419
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420 CONFIG_SYS_FSL_DSP_M3_RAM_ADDR
421 This value denotes start offset of M3 memory which is directly
422 connected to the DSP core.
423
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424 CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT
425 This value denotes start offset of DSP CCSR space.
426
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427 CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
428 Single Source Clock is clocking mode present in some of FSL SoC's.
429 In this mode, a single differential clock is used to supply
430 clocks to the sysclock, ddrclock and usbclock.
431
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432 CONFIG_SYS_CPC_REINIT_F
433 This CONFIG is defined when the CPC is configured as SRAM at the
a187559e 434 time of U-Boot entry and is required to be re-initialized.
fb4a2409 435
aade2004 436 CONFIG_DEEP_SLEEP
b445bbb4 437 Indicates this SoC supports deep sleep feature. If deep sleep is
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438 supported, core will start to execute uboot when wakes up.
439
6cb461b4 440- Generic CPU options:
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441 CONFIG_SYS_GENERIC_GLOBAL_DATA
442 Defines global data is initialized in generic board board_init_f().
443 If this macro is defined, global data is created and cleared in
444 generic board board_init_f(). Without this macro, architecture/board
445 should initialize global data before calling board_init_f().
446
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447 CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN
448
449 Defines the endianess of the CPU. Implementation of those
450 values is arch specific.
451
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452 CONFIG_SYS_FSL_DDR
453 Freescale DDR driver in use. This type of DDR controller is
454 found in mpc83xx, mpc85xx, mpc86xx as well as some ARM core
455 SoCs.
456
457 CONFIG_SYS_FSL_DDR_ADDR
458 Freescale DDR memory-mapped register base.
459
460 CONFIG_SYS_FSL_DDR_EMU
461 Specify emulator support for DDR. Some DDR features such as
462 deskew training are not available.
463
464 CONFIG_SYS_FSL_DDRC_GEN1
465 Freescale DDR1 controller.
466
467 CONFIG_SYS_FSL_DDRC_GEN2
468 Freescale DDR2 controller.
469
470 CONFIG_SYS_FSL_DDRC_GEN3
471 Freescale DDR3 controller.
472
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473 CONFIG_SYS_FSL_DDRC_GEN4
474 Freescale DDR4 controller.
475
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476 CONFIG_SYS_FSL_DDRC_ARM_GEN3
477 Freescale DDR3 controller for ARM-based SoCs.
478
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479 CONFIG_SYS_FSL_DDR1
480 Board config to use DDR1. It can be enabled for SoCs with
481 Freescale DDR1 or DDR2 controllers, depending on the board
482 implemetation.
483
484 CONFIG_SYS_FSL_DDR2
62a3b7dd 485 Board config to use DDR2. It can be enabled for SoCs with
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486 Freescale DDR2 or DDR3 controllers, depending on the board
487 implementation.
488
489 CONFIG_SYS_FSL_DDR3
490 Board config to use DDR3. It can be enabled for SoCs with
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491 Freescale DDR3 or DDR3L controllers.
492
493 CONFIG_SYS_FSL_DDR3L
494 Board config to use DDR3L. It can be enabled for SoCs with
495 DDR3L controllers.
496
497 CONFIG_SYS_FSL_DDR4
498 Board config to use DDR4. It can be enabled for SoCs with
499 DDR4 controllers.
5614e71b 500
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501 CONFIG_SYS_FSL_IFC_BE
502 Defines the IFC controller register space as Big Endian
503
504 CONFIG_SYS_FSL_IFC_LE
505 Defines the IFC controller register space as Little Endian
506
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507 CONFIG_SYS_FSL_IFC_CLK_DIV
508 Defines divider of platform clock(clock input to IFC controller).
509
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510 CONFIG_SYS_FSL_LBC_CLK_DIV
511 Defines divider of platform clock(clock input to eLBC controller).
512
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513 CONFIG_SYS_FSL_PBL_PBI
514 It enables addition of RCW (Power on reset configuration) in built image.
515 Please refer doc/README.pblimage for more details
516
517 CONFIG_SYS_FSL_PBL_RCW
518 It adds PBI(pre-boot instructions) commands in u-boot build image.
519 PBI commands can be used to configure SoC before it starts the execution.
520 Please refer doc/README.pblimage for more details
521
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522 CONFIG_SPL_FSL_PBL
523 It adds a target to create boot binary having SPL binary in PBI format
524 concatenated with u-boot binary.
525
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526 CONFIG_SYS_FSL_DDR_BE
527 Defines the DDR controller register space as Big Endian
528
529 CONFIG_SYS_FSL_DDR_LE
530 Defines the DDR controller register space as Little Endian
531
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532 CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY
533 Physical address from the view of DDR controllers. It is the
534 same as CONFIG_SYS_DDR_SDRAM_BASE for all Power SoCs. But
535 it could be different for ARM SoCs.
536
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537 CONFIG_SYS_FSL_DDR_INTLV_256B
538 DDR controller interleaving on 256-byte. This is a special
539 interleaving mode, handled by Dickens for Freescale layerscape
540 SoCs with ARM core.
541
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542 CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS
543 Number of controllers used as main memory.
544
545 CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS
546 Number of controllers used for other than main memory.
547
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548 CONFIG_SYS_FSL_HAS_DP_DDR
549 Defines the SoC has DP-DDR used for DPAA.
550
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551 CONFIG_SYS_FSL_SEC_BE
552 Defines the SEC controller register space as Big Endian
553
554 CONFIG_SYS_FSL_SEC_LE
555 Defines the SEC controller register space as Little Endian
556
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557- MIPS CPU options:
558 CONFIG_SYS_INIT_SP_OFFSET
559
560 Offset relative to CONFIG_SYS_SDRAM_BASE for initial stack
561 pointer. This is needed for the temporary stack before
562 relocation.
563
564 CONFIG_SYS_MIPS_CACHE_MODE
565
566 Cache operation mode for the MIPS CPU.
567 See also arch/mips/include/asm/mipsregs.h.
568 Possible values are:
569 CONF_CM_CACHABLE_NO_WA
570 CONF_CM_CACHABLE_WA
571 CONF_CM_UNCACHED
572 CONF_CM_CACHABLE_NONCOHERENT
573 CONF_CM_CACHABLE_CE
574 CONF_CM_CACHABLE_COW
575 CONF_CM_CACHABLE_CUW
576 CONF_CM_CACHABLE_ACCELERATED
577
578 CONFIG_SYS_XWAY_EBU_BOOTCFG
579
580 Special option for Lantiq XWAY SoCs for booting from NOR flash.
581 See also arch/mips/cpu/mips32/start.S.
582
583 CONFIG_XWAY_SWAP_BYTES
584
585 Enable compilation of tools/xway-swap-bytes needed for Lantiq
586 XWAY SoCs for booting from NOR flash. The U-Boot image needs to
587 be swapped if a flash programmer is used.
588
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589- ARM options:
590 CONFIG_SYS_EXCEPTION_VECTORS_HIGH
591
592 Select high exception vectors of the ARM core, e.g., do not
593 clear the V bit of the c1 register of CP15.
594
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595 CONFIG_SYS_THUMB_BUILD
596
597 Use this flag to build U-Boot using the Thumb instruction
598 set for ARM architectures. Thumb instruction set provides
599 better code density. For ARM architectures that support
600 Thumb2 this flag will result in Thumb2 code generated by
601 GCC.
602
c5d4752c 603 CONFIG_ARM_ERRATA_716044
0678587f
SW
604 CONFIG_ARM_ERRATA_742230
605 CONFIG_ARM_ERRATA_743622
606 CONFIG_ARM_ERRATA_751472
b7588e3b 607 CONFIG_ARM_ERRATA_761320
e392b923
IC
608 CONFIG_ARM_ERRATA_773022
609 CONFIG_ARM_ERRATA_774769
610 CONFIG_ARM_ERRATA_794072
0678587f
SW
611
612 If set, the workarounds for these ARM errata are applied early
613 during U-Boot startup. Note that these options force the
614 workarounds to be applied; no CPU-type/version detection
615 exists, unlike the similar options in the Linux kernel. Do not
616 set these options unless they apply!
617
207774b2
YS
618 COUNTER_FREQUENCY
619 Generic timer clock source frequency.
620
621 COUNTER_FREQUENCY_REAL
622 Generic timer clock source frequency if the real clock is
623 different from COUNTER_FREQUENCY, and can only be determined
624 at run time.
625
c616a0df
NM
626 NOTE: The following can be machine specific errata. These
627 do have ability to provide rudimentary version and machine
628 specific checks, but expect no product checks.
5902f4ce 629 CONFIG_ARM_ERRATA_430973
b45c48a7 630 CONFIG_ARM_ERRATA_454179
9b4d65f9 631 CONFIG_ARM_ERRATA_621766
c616a0df 632 CONFIG_ARM_ERRATA_798870
a615d0be 633 CONFIG_ARM_ERRATA_801819
c616a0df 634
73c38934
SW
635- Tegra SoC options:
636 CONFIG_TEGRA_SUPPORT_NON_SECURE
637
638 Support executing U-Boot in non-secure (NS) mode. Certain
639 impossible actions will be skipped if the CPU is in NS mode,
640 such as ARM architectural timer initialization.
641
5da627a4 642- Linux Kernel Interface:
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WD
643 CONFIG_CLOCKS_IN_MHZ
644
645 U-Boot stores all clock information in Hz
646 internally. For binary compatibility with older Linux
647 kernels (which expect the clocks passed in the
648 bd_info data to be in MHz) the environment variable
649 "clocks_in_mhz" can be defined so that U-Boot
650 converts clock data to MHZ before passing it to the
651 Linux kernel.
c609719b 652 When CONFIG_CLOCKS_IN_MHZ is defined, a definition of
218ca724 653 "clocks_in_mhz=1" is automatically included in the
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WD
654 default environment.
655
5da627a4
WD
656 CONFIG_MEMSIZE_IN_BYTES [relevant for MIPS only]
657
b445bbb4 658 When transferring memsize parameter to Linux, some versions
5da627a4
WD
659 expect it to be in bytes, others in MB.
660 Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes.
661
fec6d9ee 662 CONFIG_OF_LIBFDT
f57f70aa
WD
663
664 New kernel versions are expecting firmware settings to be
213bf8c8
GVB
665 passed using flattened device trees (based on open firmware
666 concepts).
667
668 CONFIG_OF_LIBFDT
669 * New libfdt-based support
670 * Adds the "fdt" command
3bb342fc 671 * The bootm command automatically updates the fdt
213bf8c8 672
b55ae402
MZ
673 OF_CPU - The proper name of the cpus node (only required for
674 MPC512X and MPC5xxx based boards).
675 OF_SOC - The proper name of the soc node (only required for
676 MPC512X and MPC5xxx based boards).
f57f70aa 677 OF_TBCLK - The timebase frequency.
c2871f03 678 OF_STDOUT_PATH - The path to the console device
f57f70aa 679
11ccc33f
MZ
680 boards with QUICC Engines require OF_QE to set UCC MAC
681 addresses
3bb342fc 682
4e253137
KG
683 CONFIG_OF_BOARD_SETUP
684
685 Board code has addition modification that it wants to make
686 to the flat device tree before handing it off to the kernel
f57f70aa 687
c654b517
SG
688 CONFIG_OF_SYSTEM_SETUP
689
690 Other code has addition modification that it wants to make
691 to the flat device tree before handing it off to the kernel.
692 This causes ft_system_setup() to be called before booting
693 the kernel.
694
3887c3fb
HS
695 CONFIG_OF_IDE_FIXUP
696
697 U-Boot can detect if an IDE device is present or not.
698 If not, and this new config option is activated, U-Boot
699 removes the ATA node from the DTS before booting Linux,
700 so the Linux IDE driver does not probe the device and
701 crash. This is needed for buggy hardware (uc101) where
702 no pull down resistor is connected to the signal IDE5V_DD7.
703
7eb29398
IG
704 CONFIG_MACH_TYPE [relevant for ARM only][mandatory]
705
706 This setting is mandatory for all boards that have only one
707 machine type and must be used to specify the machine type
708 number as it appears in the ARM machine registry
709 (see http://www.arm.linux.org.uk/developer/machines/).
710 Only boards that have multiple machine types supported
711 in a single configuration file and the machine type is
712 runtime discoverable, do not have to use this setting.
713
0b2f4eca
NG
714- vxWorks boot parameters:
715
716 bootvx constructs a valid bootline using the following
9e98b7e3
BM
717 environments variables: bootdev, bootfile, ipaddr, netmask,
718 serverip, gatewayip, hostname, othbootargs.
0b2f4eca
NG
719 It loads the vxWorks image pointed bootfile.
720
0b2f4eca
NG
721 Note: If a "bootargs" environment is defined, it will overwride
722 the defaults discussed just above.
723
2c451f78
A
724- Cache Configuration:
725 CONFIG_SYS_ICACHE_OFF - Do not enable instruction cache in U-Boot
726 CONFIG_SYS_DCACHE_OFF - Do not enable data cache in U-Boot
727 CONFIG_SYS_L2CACHE_OFF- Do not enable L2 cache in U-Boot
728
93bc2193
A
729- Cache Configuration for ARM:
730 CONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache
731 controller
732 CONFIG_SYS_PL310_BASE - Physical base address of PL310
733 controller register space
734
6705d81e 735- Serial Ports:
48d0192f 736 CONFIG_PL010_SERIAL
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WD
737
738 Define this if you want support for Amba PrimeCell PL010 UARTs.
739
48d0192f 740 CONFIG_PL011_SERIAL
6705d81e
WD
741
742 Define this if you want support for Amba PrimeCell PL011 UARTs.
743
744 CONFIG_PL011_CLOCK
745
746 If you have Amba PrimeCell PL011 UARTs, set this variable to
747 the clock speed of the UARTs.
748
749 CONFIG_PL01x_PORTS
750
751 If you have Amba PrimeCell PL010 or PL011 UARTs on your board,
752 define this to a list of base addresses for each (supported)
753 port. See e.g. include/configs/versatile.h
754
d57dee57
KM
755 CONFIG_SERIAL_HW_FLOW_CONTROL
756
757 Define this variable to enable hw flow control in serial driver.
758 Current user of this option is drivers/serial/nsl16550.c driver
6705d81e 759
c609719b 760- Console Interface:
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WD
761 Depending on board, define exactly one serial port
762 (like CONFIG_8xx_CONS_SMC1, CONFIG_8xx_CONS_SMC2,
763 CONFIG_8xx_CONS_SCC1, ...), or switch off the serial
764 console by defining CONFIG_8xx_CONS_NONE
c609719b
WD
765
766 Note: if CONFIG_8xx_CONS_NONE is defined, the serial
767 port routines must be defined elsewhere
768 (i.e. serial_init(), serial_getc(), ...)
769
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WD
770- Console Baudrate:
771 CONFIG_BAUDRATE - in bps
772 Select one of the baudrates listed in
6d0f6bcf
JCPV
773 CONFIG_SYS_BAUDRATE_TABLE, see below.
774 CONFIG_SYS_BRGCLK_PRESCALE, baudrate prescale
c609719b 775
c92fac91
HS
776- Console Rx buffer length
777 With CONFIG_SYS_SMC_RXBUFLEN it is possible to define
778 the maximum receive buffer length for the SMC.
2b3f12c2 779 This option is actual only for 82xx and 8xx possible.
c92fac91
HS
780 If using CONFIG_SYS_SMC_RXBUFLEN also CONFIG_SYS_MAXIDLE
781 must be defined, to setup the maximum idle timeout for
782 the SMC.
783
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784- Autoboot Command:
785 CONFIG_BOOTCOMMAND
786 Only needed when CONFIG_BOOTDELAY is enabled;
787 define a command string that is automatically executed
788 when no character is read on the console interface
789 within "Boot Delay" after reset.
790
791 CONFIG_BOOTARGS
43d9616c
WD
792 This can be used to pass arguments to the bootm
793 command. The value of CONFIG_BOOTARGS goes into the
794 environment value "bootargs".
c609719b
WD
795
796 CONFIG_RAMBOOT and CONFIG_NFSBOOT
43d9616c
WD
797 The value of these goes into the environment as
798 "ramboot" and "nfsboot" respectively, and can be used
799 as a convenience, when switching between booting from
11ccc33f 800 RAM and NFS.
c609719b 801
eda0ba38
HS
802- Bootcount:
803 CONFIG_BOOTCOUNT_LIMIT
804 Implements a mechanism for detecting a repeating reboot
805 cycle, see:
806 http://www.denx.de/wiki/view/DULG/UBootBootCountLimit
807
808 CONFIG_BOOTCOUNT_ENV
809 If no softreset save registers are found on the hardware
810 "bootcount" is stored in the environment. To prevent a
811 saveenv on all reboots, the environment variable
812 "upgrade_available" is used. If "upgrade_available" is
813 0, "bootcount" is always 0, if "upgrade_available" is
814 1 "bootcount" is incremented in the environment.
815 So the Userspace Applikation must set the "upgrade_available"
816 and "bootcount" variable to 0, if a boot was successfully.
817
c609719b
WD
818- Pre-Boot Commands:
819 CONFIG_PREBOOT
820
821 When this option is #defined, the existence of the
822 environment variable "preboot" will be checked
823 immediately before starting the CONFIG_BOOTDELAY
824 countdown and/or running the auto-boot command resp.
825 entering interactive mode.
826
827 This feature is especially useful when "preboot" is
828 automatically generated or modified. For an example
829 see the LWMON board specific code: here "preboot" is
830 modified when the user holds down a certain
831 combination of keys on the (special) keyboard when
832 booting the systems
833
834- Serial Download Echo Mode:
835 CONFIG_LOADS_ECHO
836 If defined to 1, all characters received during a
837 serial download (using the "loads" command) are
838 echoed back. This might be needed by some terminal
839 emulations (like "cu"), but may as well just take
840 time on others. This setting #define's the initial
841 value of the "loads_echo" environment variable.
842
602ad3b3 843- Kgdb Serial Baudrate: (if CONFIG_CMD_KGDB is defined)
c609719b
WD
844 CONFIG_KGDB_BAUDRATE
845 Select one of the baudrates listed in
6d0f6bcf 846 CONFIG_SYS_BAUDRATE_TABLE, see below.
c609719b
WD
847
848- Monitor Functions:
602ad3b3
JL
849 Monitor commands can be included or excluded
850 from the build by using the #include files
c6c621bd 851 <config_cmd_all.h> and #undef'ing unwanted
ef0f2f57 852 commands, or adding #define's for wanted commands.
602ad3b3
JL
853
854 The default command configuration includes all commands
855 except those marked below with a "*".
856
b401b73d 857 CONFIG_CMD_AES AES 128 CBC encrypt/decrypt
602ad3b3 858 CONFIG_CMD_ASKENV * ask for env variable
602ad3b3
JL
859 CONFIG_CMD_BDI bdinfo
860 CONFIG_CMD_BEDBUG * Include BedBug Debugger
861 CONFIG_CMD_BMP * BMP support
862 CONFIG_CMD_BSP * Board specific commands
863 CONFIG_CMD_BOOTD bootd
d2b2ffe3 864 CONFIG_CMD_BOOTI * ARM64 Linux kernel Image support
602ad3b3 865 CONFIG_CMD_CACHE * icache, dcache
08d0d6f3 866 CONFIG_CMD_CLK * clock command support
602ad3b3 867 CONFIG_CMD_CONSOLE coninfo
710b9938 868 CONFIG_CMD_CRC32 * crc32
602ad3b3
JL
869 CONFIG_CMD_DATE * support for RTC, date/time...
870 CONFIG_CMD_DHCP * DHCP support
871 CONFIG_CMD_DIAG * Diagnostics
a7c93104
PT
872 CONFIG_CMD_DS4510 * ds4510 I2C gpio commands
873 CONFIG_CMD_DS4510_INFO * ds4510 I2C info command
874 CONFIG_CMD_DS4510_MEM * ds4510 I2C eeprom/sram commansd
875 CONFIG_CMD_DS4510_RST * ds4510 I2C rst command
602ad3b3
JL
876 CONFIG_CMD_DTT * Digital Therm and Thermostat
877 CONFIG_CMD_ECHO echo arguments
246c6922 878 CONFIG_CMD_EDITENV edit env variable
602ad3b3 879 CONFIG_CMD_EEPROM * EEPROM read/write support
aa9e6044 880 CONFIG_CMD_EEPROM_LAYOUT* EEPROM layout aware commands
602ad3b3 881 CONFIG_CMD_ELF * bootelf, bootvx
5e2b3e0c 882 CONFIG_CMD_ENV_CALLBACK * display details about env callbacks
fffad71b 883 CONFIG_CMD_ENV_FLAGS * display details about env flags
88733e2c 884 CONFIG_CMD_ENV_EXISTS * check existence of env variable
0c79cda0 885 CONFIG_CMD_EXPORTENV * export the environment
03e2ecf6
SW
886 CONFIG_CMD_EXT2 * ext2 command support
887 CONFIG_CMD_EXT4 * ext4 command support
16f4d933
SW
888 CONFIG_CMD_FS_GENERIC * filesystem commands (e.g. load, ls)
889 that work for multiple fs types
59e890ef 890 CONFIG_CMD_FS_UUID * Look up a filesystem UUID
bdab39d3 891 CONFIG_CMD_SAVEENV saveenv
602ad3b3 892 CONFIG_CMD_FDC * Floppy Disk Support
03e2ecf6 893 CONFIG_CMD_FAT * FAT command support
602ad3b3
JL
894 CONFIG_CMD_FLASH flinfo, erase, protect
895 CONFIG_CMD_FPGA FPGA device initialization support
4d98b5c8 896 CONFIG_CMD_FUSE * Device fuse support
53fdc7ef 897 CONFIG_CMD_GETTIME * Get time since boot
a641b979 898 CONFIG_CMD_GO * the 'go' command (exec code)
a000b795 899 CONFIG_CMD_GREPENV * search environment
bf36c5d5 900 CONFIG_CMD_HASH * calculate hash / digest
602ad3b3
JL
901 CONFIG_CMD_I2C * I2C serial bus support
902 CONFIG_CMD_IDE * IDE harddisk support
903 CONFIG_CMD_IMI iminfo
8fdf1e0f 904 CONFIG_CMD_IMLS List all images found in NOR flash
4d98b5c8 905 CONFIG_CMD_IMLS_NAND * List all images found in NAND flash
602ad3b3 906 CONFIG_CMD_IMMAP * IMMR dump support
aa53233a 907 CONFIG_CMD_IOTRACE * I/O tracing for debugging
0c79cda0 908 CONFIG_CMD_IMPORTENV * import an environment
c167cc02 909 CONFIG_CMD_INI * import data from an ini file into the env
602ad3b3
JL
910 CONFIG_CMD_IRQ * irqinfo
911 CONFIG_CMD_ITEST Integer/string test of 2 values
912 CONFIG_CMD_JFFS2 * JFFS2 Support
913 CONFIG_CMD_KGDB * kgdb
4d98b5c8 914 CONFIG_CMD_LDRINFO * ldrinfo (display Blackfin loader)
d22c338e
JH
915 CONFIG_CMD_LINK_LOCAL * link-local IP address auto-configuration
916 (169.254.*.*)
602ad3b3
JL
917 CONFIG_CMD_LOADB loadb
918 CONFIG_CMD_LOADS loads
4d98b5c8 919 CONFIG_CMD_MD5SUM * print md5 message digest
02c9aa1d 920 (requires CONFIG_CMD_MEMORY and CONFIG_MD5)
15a33e49 921 CONFIG_CMD_MEMINFO * Display detailed memory information
602ad3b3 922 CONFIG_CMD_MEMORY md, mm, nm, mw, cp, cmp, crc, base,
a2681707 923 loop, loopw
4d98b5c8 924 CONFIG_CMD_MEMTEST * mtest
602ad3b3
JL
925 CONFIG_CMD_MISC Misc functions like sleep etc
926 CONFIG_CMD_MMC * MMC memory mapped support
927 CONFIG_CMD_MII * MII utility commands
68d7d651 928 CONFIG_CMD_MTDPARTS * MTD partition support
602ad3b3
JL
929 CONFIG_CMD_NAND * NAND support
930 CONFIG_CMD_NET bootp, tftpboot, rarpboot
4d98b5c8 931 CONFIG_CMD_NFS NFS support
e92739d3 932 CONFIG_CMD_PCA953X * PCA953x I2C gpio commands
c0f40859 933 CONFIG_CMD_PCA953X_INFO * PCA953x I2C gpio info command
602ad3b3
JL
934 CONFIG_CMD_PCI * pciinfo
935 CONFIG_CMD_PCMCIA * PCMCIA support
936 CONFIG_CMD_PING * send ICMP ECHO_REQUEST to network
937 host
938 CONFIG_CMD_PORTIO * Port I/O
ff048ea9 939 CONFIG_CMD_READ * Read raw data from partition
602ad3b3
JL
940 CONFIG_CMD_REGINFO * Register dump
941 CONFIG_CMD_RUN run command in env variable
d304931f 942 CONFIG_CMD_SANDBOX * sb command to access sandbox features
602ad3b3 943 CONFIG_CMD_SAVES * save S record dump
c649e3c9 944 CONFIG_SCSI * SCSI Support
602ad3b3
JL
945 CONFIG_CMD_SDRAM * print SDRAM configuration information
946 (requires CONFIG_CMD_I2C)
947 CONFIG_CMD_SETGETDCR Support for DCR Register access
948 (4xx only)
f61ec45e 949 CONFIG_CMD_SF * Read/write/erase SPI NOR flash
4d98b5c8 950 CONFIG_CMD_SHA1SUM * print sha1 memory digest
02c9aa1d 951 (requires CONFIG_CMD_MEMORY)
7d861d95 952 CONFIG_CMD_SOFTSWITCH * Soft switch setting command for BF60x
74de7aef 953 CONFIG_CMD_SOURCE "source" command Support
602ad3b3 954 CONFIG_CMD_SPI * SPI serial bus support
7a83af07 955 CONFIG_CMD_TFTPSRV * TFTP transfer in server mode
1fb7cd49 956 CONFIG_CMD_TFTPPUT * TFTP put command (upload)
da83bcd7
JH
957 CONFIG_CMD_TIME * run command and report execution time (ARM specific)
958 CONFIG_CMD_TIMER * access to the system tick timer
602ad3b3 959 CONFIG_CMD_USB * USB support
602ad3b3 960 CONFIG_CMD_CDP * Cisco Discover Protocol support
c8339f51 961 CONFIG_CMD_MFSL * Microblaze FSL support
4d98b5c8 962 CONFIG_CMD_XIMG Load part of Multi Image
89c8230d 963 CONFIG_CMD_UUID * Generate random UUID or GUID string
c609719b
WD
964
965 EXAMPLE: If you want all functions except of network
966 support you can write:
967
602ad3b3
JL
968 #include "config_cmd_all.h"
969 #undef CONFIG_CMD_NET
c609719b 970
213bf8c8
GVB
971 Other Commands:
972 fdt (flattened device tree) command: CONFIG_OF_LIBFDT
c609719b
WD
973
974 Note: Don't enable the "icache" and "dcache" commands
602ad3b3 975 (configuration option CONFIG_CMD_CACHE) unless you know
43d9616c
WD
976 what you (and your U-Boot users) are doing. Data
977 cache cannot be enabled on systems like the 8xx or
978 8260 (where accesses to the IMMR region must be
979 uncached), and it cannot be disabled on all other
980 systems where we (mis-) use the data cache to hold an
981 initial stack and some data.
c609719b
WD
982
983
984 XXX - this list needs to get updated!
985
302a6487
SG
986- Removal of commands
987 If no commands are needed to boot, you can disable
988 CONFIG_CMDLINE to remove them. In this case, the command line
989 will not be available, and when U-Boot wants to execute the
990 boot command (on start-up) it will call board_run_command()
991 instead. This can reduce image size significantly for very
992 simple boot procedures.
993
a5ecbe62
WD
994- Regular expression support:
995 CONFIG_REGEX
93e14596
WD
996 If this variable is defined, U-Boot is linked against
997 the SLRE (Super Light Regular Expression) library,
998 which adds regex support to some commands, as for
999 example "env grep" and "setexpr".
a5ecbe62 1000
45ba8077
SG
1001- Device tree:
1002 CONFIG_OF_CONTROL
1003 If this variable is defined, U-Boot will use a device tree
1004 to configure its devices, instead of relying on statically
1005 compiled #defines in the board file. This option is
1006 experimental and only available on a few boards. The device
1007 tree is available in the global data as gd->fdt_blob.
1008
2c0f79e4
SG
1009 U-Boot needs to get its device tree from somewhere. This can
1010 be done using one of the two options below:
bbb0b128
SG
1011
1012 CONFIG_OF_EMBED
1013 If this variable is defined, U-Boot will embed a device tree
1014 binary in its image. This device tree file should be in the
1015 board directory and called <soc>-<board>.dts. The binary file
1016 is then picked up in board_init_f() and made available through
1017 the global data structure as gd->blob.
45ba8077 1018
2c0f79e4
SG
1019 CONFIG_OF_SEPARATE
1020 If this variable is defined, U-Boot will build a device tree
1021 binary. It will be called u-boot.dtb. Architecture-specific
1022 code will locate it at run-time. Generally this works by:
1023
1024 cat u-boot.bin u-boot.dtb >image.bin
1025
1026 and in fact, U-Boot does this for you, creating a file called
1027 u-boot-dtb.bin which is useful in the common case. You can
1028 still use the individual files if you need something more
1029 exotic.
1030
c609719b
WD
1031- Watchdog:
1032 CONFIG_WATCHDOG
1033 If this variable is defined, it enables watchdog
6abe6fb6
DZ
1034 support for the SoC. There must be support in the SoC
1035 specific code for a watchdog. For the 8xx and 8260
1036 CPUs, the SIU Watchdog feature is enabled in the SYPCR
1037 register. When supported for a specific SoC is
1038 available, then no further board specific code should
1039 be needed to use it.
1040
1041 CONFIG_HW_WATCHDOG
1042 When using a watchdog circuitry external to the used
1043 SoC, then define this variable and provide board
1044 specific code for the "hw_watchdog_reset" function.
c609719b 1045
7bae0d6f
HS
1046 CONFIG_AT91_HW_WDT_TIMEOUT
1047 specify the timeout in seconds. default 2 seconds.
1048
c1551ea8
SR
1049- U-Boot Version:
1050 CONFIG_VERSION_VARIABLE
1051 If this variable is defined, an environment variable
1052 named "ver" is created by U-Boot showing the U-Boot
1053 version as printed by the "version" command.
a1ea8e51
BT
1054 Any change to this variable will be reverted at the
1055 next reset.
c1551ea8 1056
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WD
1057- Real-Time Clock:
1058
602ad3b3 1059 When CONFIG_CMD_DATE is selected, the type of the RTC
c609719b
WD
1060 has to be selected, too. Define exactly one of the
1061 following options:
1062
1063 CONFIG_RTC_MPC8xx - use internal RTC of MPC8xx
1064 CONFIG_RTC_PCF8563 - use Philips PCF8563 RTC
4e8b7544 1065 CONFIG_RTC_MC13XXX - use MC13783 or MC13892 RTC
c609719b 1066 CONFIG_RTC_MC146818 - use MC146818 RTC
1cb8e980 1067 CONFIG_RTC_DS1307 - use Maxim, Inc. DS1307 RTC
c609719b 1068 CONFIG_RTC_DS1337 - use Maxim, Inc. DS1337 RTC
7f70e853 1069 CONFIG_RTC_DS1338 - use Maxim, Inc. DS1338 RTC
412921d2 1070 CONFIG_RTC_DS1339 - use Maxim, Inc. DS1339 RTC
3bac3513 1071 CONFIG_RTC_DS164x - use Dallas DS164x RTC
9536dfcc 1072 CONFIG_RTC_ISL1208 - use Intersil ISL1208 RTC
4c0d4c3b 1073 CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC
6d0f6bcf 1074 CONFIG_SYS_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337
71d19f30
HS
1075 CONFIG_SYS_RV3029_TCR - enable trickle charger on
1076 RV3029 RTC.
c609719b 1077
b37c7e5e
WD
1078 Note that if the RTC uses I2C, then the I2C interface
1079 must also be configured. See I2C Support, below.
1080
e92739d3
PT
1081- GPIO Support:
1082 CONFIG_PCA953X - use NXP's PCA953X series I2C GPIO
e92739d3 1083
5dec49ca
CP
1084 The CONFIG_SYS_I2C_PCA953X_WIDTH option specifies a list of
1085 chip-ngpio pairs that tell the PCA953X driver the number of
1086 pins supported by a particular chip.
1087
e92739d3
PT
1088 Note that if the GPIO device uses I2C, then the I2C interface
1089 must also be configured. See I2C Support, below.
1090
aa53233a
SG
1091- I/O tracing:
1092 When CONFIG_IO_TRACE is selected, U-Boot intercepts all I/O
1093 accesses and can checksum them or write a list of them out
1094 to memory. See the 'iotrace' command for details. This is
1095 useful for testing device drivers since it can confirm that
1096 the driver behaves the same way before and after a code
1097 change. Currently this is supported on sandbox and arm. To
1098 add support for your architecture, add '#include <iotrace.h>'
1099 to the bottom of arch/<arch>/include/asm/io.h and test.
1100
1101 Example output from the 'iotrace stats' command is below.
1102 Note that if the trace buffer is exhausted, the checksum will
1103 still continue to operate.
1104
1105 iotrace is enabled
1106 Start: 10000000 (buffer start address)
1107 Size: 00010000 (buffer size)
1108 Offset: 00000120 (current buffer offset)
1109 Output: 10000120 (start + offset)
1110 Count: 00000018 (number of trace records)
1111 CRC32: 9526fb66 (CRC32 of all trace records)
1112
c609719b
WD
1113- Timestamp Support:
1114
43d9616c
WD
1115 When CONFIG_TIMESTAMP is selected, the timestamp
1116 (date and time) of an image is printed by image
1117 commands like bootm or iminfo. This option is
602ad3b3 1118 automatically enabled when you select CONFIG_CMD_DATE .
c609719b 1119
923c46f9
KP
1120- Partition Labels (disklabels) Supported:
1121 Zero or more of the following:
1122 CONFIG_MAC_PARTITION Apple's MacOS partition table.
1123 CONFIG_DOS_PARTITION MS Dos partition table, traditional on the
1124 Intel architecture, USB sticks, etc.
1125 CONFIG_ISO_PARTITION ISO partition table, used on CDROM etc.
1126 CONFIG_EFI_PARTITION GPT partition table, common when EFI is the
1127 bootloader. Note 2TB partition limit; see
1128 disk/part_efi.c
1129 CONFIG_MTD_PARTITIONS Memory Technology Device partition table.
c609719b 1130
218ca724 1131 If IDE or SCSI support is enabled (CONFIG_CMD_IDE or
c649e3c9 1132 CONFIG_SCSI) you must configure support for at
923c46f9 1133 least one non-MTD partition type as well.
c609719b
WD
1134
1135- IDE Reset method:
4d13cbad
WD
1136 CONFIG_IDE_RESET_ROUTINE - this is defined in several
1137 board configurations files but used nowhere!
c609719b 1138
4d13cbad
WD
1139 CONFIG_IDE_RESET - is this is defined, IDE Reset will
1140 be performed by calling the function
1141 ide_set_reset(int reset)
1142 which has to be defined in a board specific file
c609719b
WD
1143
1144- ATAPI Support:
1145 CONFIG_ATAPI
1146
1147 Set this to enable ATAPI support.
1148
c40b2956
WD
1149- LBA48 Support
1150 CONFIG_LBA48
1151
1152 Set this to enable support for disks larger than 137GB
4b142feb 1153 Also look at CONFIG_SYS_64BIT_LBA.
c40b2956
WD
1154 Whithout these , LBA48 support uses 32bit variables and will 'only'
1155 support disks up to 2.1TB.
1156
6d0f6bcf 1157 CONFIG_SYS_64BIT_LBA:
c40b2956
WD
1158 When enabled, makes the IDE subsystem use 64bit sector addresses.
1159 Default is 32bit.
1160
c609719b
WD
1161- SCSI Support:
1162 At the moment only there is only support for the
1163 SYM53C8XX SCSI controller; define
1164 CONFIG_SCSI_SYM53C8XX to enable it.
1165
6d0f6bcf
JCPV
1166 CONFIG_SYS_SCSI_MAX_LUN [8], CONFIG_SYS_SCSI_MAX_SCSI_ID [7] and
1167 CONFIG_SYS_SCSI_MAX_DEVICE [CONFIG_SYS_SCSI_MAX_SCSI_ID *
1168 CONFIG_SYS_SCSI_MAX_LUN] can be adjusted to define the
c609719b
WD
1169 maximum numbers of LUNs, SCSI ID's and target
1170 devices.
6d0f6bcf 1171 CONFIG_SYS_SCSI_SYM53C8XX_CCF to fix clock timing (80Mhz)
c609719b 1172
93e14596
WD
1173 The environment variable 'scsidevs' is set to the number of
1174 SCSI devices found during the last scan.
447c031b 1175
c609719b 1176- NETWORK Support (PCI):
682011ff 1177 CONFIG_E1000
ce5207e1
KM
1178 Support for Intel 8254x/8257x gigabit chips.
1179
1180 CONFIG_E1000_SPI
1181 Utility code for direct access to the SPI bus on Intel 8257x.
1182 This does not do anything useful unless you set at least one
1183 of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC.
1184
1185 CONFIG_E1000_SPI_GENERIC
1186 Allow generic access to the SPI bus on the Intel 8257x, for
1187 example with the "sspi" command.
1188
1189 CONFIG_CMD_E1000
1190 Management command for E1000 devices. When used on devices
1191 with SPI support you can reprogram the EEPROM from U-Boot.
53cf9435 1192
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WD
1193 CONFIG_EEPRO100
1194 Support for Intel 82557/82559/82559ER chips.
11ccc33f 1195 Optional CONFIG_EEPRO100_SROM_WRITE enables EEPROM
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WD
1196 write routine for first time initialisation.
1197
1198 CONFIG_TULIP
1199 Support for Digital 2114x chips.
1200 Optional CONFIG_TULIP_SELECT_MEDIA for board specific
1201 modem chip initialisation (KS8761/QS6611).
1202
1203 CONFIG_NATSEMI
1204 Support for National dp83815 chips.
1205
1206 CONFIG_NS8382X
1207 Support for National dp8382[01] gigabit chips.
1208
45219c46
WD
1209- NETWORK Support (other):
1210
c041e9d2
JS
1211 CONFIG_DRIVER_AT91EMAC
1212 Support for AT91RM9200 EMAC.
1213
1214 CONFIG_RMII
1215 Define this to use reduced MII inteface
1216
1217 CONFIG_DRIVER_AT91EMAC_QUIET
1218 If this defined, the driver is quiet.
1219 The driver doen't show link status messages.
1220
efdd7319
RH
1221 CONFIG_CALXEDA_XGMAC
1222 Support for the Calxeda XGMAC device
1223
3bb46d23 1224 CONFIG_LAN91C96
45219c46
WD
1225 Support for SMSC's LAN91C96 chips.
1226
45219c46
WD
1227 CONFIG_LAN91C96_USE_32_BIT
1228 Define this to enable 32 bit addressing
1229
3bb46d23 1230 CONFIG_SMC91111
f39748ae
WD
1231 Support for SMSC's LAN91C111 chip
1232
1233 CONFIG_SMC91111_BASE
1234 Define this to hold the physical address
1235 of the device (I/O space)
1236
1237 CONFIG_SMC_USE_32_BIT
1238 Define this if data bus is 32 bits
1239
1240 CONFIG_SMC_USE_IOFUNCS
1241 Define this to use i/o functions instead of macros
1242 (some hardware wont work with macros)
1243
dc02bada
HS
1244 CONFIG_DRIVER_TI_EMAC
1245 Support for davinci emac
1246
1247 CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
1248 Define this if you have more then 3 PHYs.
1249
b3dbf4a5
ML
1250 CONFIG_FTGMAC100
1251 Support for Faraday's FTGMAC100 Gigabit SoC Ethernet
1252
1253 CONFIG_FTGMAC100_EGIGA
1254 Define this to use GE link update with gigabit PHY.
1255 Define this if FTGMAC100 is connected to gigabit PHY.
1256 If your system has 10/100 PHY only, it might not occur
1257 wrong behavior. Because PHY usually return timeout or
1258 useless data when polling gigabit status and gigabit
1259 control registers. This behavior won't affect the
1260 correctnessof 10/100 link speed update.
1261
c2fff331 1262 CONFIG_SMC911X
557b377d
JG
1263 Support for SMSC's LAN911x and LAN921x chips
1264
c2fff331 1265 CONFIG_SMC911X_BASE
557b377d
JG
1266 Define this to hold the physical address
1267 of the device (I/O space)
1268
c2fff331 1269 CONFIG_SMC911X_32_BIT
557b377d
JG
1270 Define this if data bus is 32 bits
1271
c2fff331 1272 CONFIG_SMC911X_16_BIT
557b377d
JG
1273 Define this if data bus is 16 bits. If your processor
1274 automatically converts one 32 bit word to two 16 bit
c2fff331 1275 words you may also try CONFIG_SMC911X_32_BIT.
557b377d 1276
3d0075fa
YS
1277 CONFIG_SH_ETHER
1278 Support for Renesas on-chip Ethernet controller
1279
1280 CONFIG_SH_ETHER_USE_PORT
1281 Define the number of ports to be used
1282
1283 CONFIG_SH_ETHER_PHY_ADDR
1284 Define the ETH PHY's address
1285
68260aab
YS
1286 CONFIG_SH_ETHER_CACHE_WRITEBACK
1287 If this option is set, the driver enables cache flush.
1288
b2f97cf2
HS
1289- PWM Support:
1290 CONFIG_PWM_IMX
5052e819 1291 Support for PWM module on the imx6.
b2f97cf2 1292
5e124724 1293- TPM Support:
90899cc0
CC
1294 CONFIG_TPM
1295 Support TPM devices.
1296
0766ad2f
CR
1297 CONFIG_TPM_TIS_INFINEON
1298 Support for Infineon i2c bus TPM devices. Only one device
1b393db5
TWHT
1299 per system is supported at this time.
1300
1b393db5
TWHT
1301 CONFIG_TPM_TIS_I2C_BURST_LIMITATION
1302 Define the burst count bytes upper limit
1303
3aa74088
CR
1304 CONFIG_TPM_ST33ZP24
1305 Support for STMicroelectronics TPM devices. Requires DM_TPM support.
1306
1307 CONFIG_TPM_ST33ZP24_I2C
1308 Support for STMicroelectronics ST33ZP24 I2C devices.
1309 Requires TPM_ST33ZP24 and I2C.
1310
b75fdc11
CR
1311 CONFIG_TPM_ST33ZP24_SPI
1312 Support for STMicroelectronics ST33ZP24 SPI devices.
1313 Requires TPM_ST33ZP24 and SPI.
1314
c01939c7
DE
1315 CONFIG_TPM_ATMEL_TWI
1316 Support for Atmel TWI TPM device. Requires I2C support.
1317
90899cc0 1318 CONFIG_TPM_TIS_LPC
5e124724
VB
1319 Support for generic parallel port TPM devices. Only one device
1320 per system is supported at this time.
1321
1322 CONFIG_TPM_TIS_BASE_ADDRESS
1323 Base address where the generic TPM device is mapped
1324 to. Contemporary x86 systems usually map it at
1325 0xfed40000.
1326
be6c1529
RP
1327 CONFIG_CMD_TPM
1328 Add tpm monitor functions.
1329 Requires CONFIG_TPM. If CONFIG_TPM_AUTH_SESSIONS is set, also
1330 provides monitor access to authorized functions.
1331
1332 CONFIG_TPM
1333 Define this to enable the TPM support library which provides
1334 functional interfaces to some TPM commands.
1335 Requires support for a TPM device.
1336
1337 CONFIG_TPM_AUTH_SESSIONS
1338 Define this to enable authorized functions in the TPM library.
1339 Requires CONFIG_TPM and CONFIG_SHA1.
1340
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WD
1341- USB Support:
1342 At the moment only the UHCI host controller is
4d13cbad 1343 supported (PIP405, MIP405, MPC5200); define
c609719b
WD
1344 CONFIG_USB_UHCI to enable it.
1345 define CONFIG_USB_KEYBOARD to enable the USB Keyboard
30d56fae 1346 and define CONFIG_USB_STORAGE to enable the USB
c609719b
WD
1347 storage devices.
1348 Note:
1349 Supported are USB Keyboards and USB Floppy drives
1350 (TEAC FD-05PUB).
4d13cbad
WD
1351 MPC5200 USB requires additional defines:
1352 CONFIG_USB_CLOCK
1353 for 528 MHz Clock: 0x0001bbbb
307ecb6d
EM
1354 CONFIG_PSC3_USB
1355 for USB on PSC3
4d13cbad
WD
1356 CONFIG_USB_CONFIG
1357 for differential drivers: 0x00001000
1358 for single ended drivers: 0x00005000
307ecb6d
EM
1359 for differential drivers on PSC3: 0x00000100
1360 for single ended drivers on PSC3: 0x00004100
6d0f6bcf 1361 CONFIG_SYS_USB_EVENT_POLL
fdcfaa1b
ZW
1362 May be defined to allow interrupt polling
1363 instead of using asynchronous interrupts
4d13cbad 1364
9ab4ce22
SG
1365 CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the
1366 txfilltuning field in the EHCI controller on reset.
1367
6e9e0626
OT
1368 CONFIG_USB_DWC2_REG_ADDR the physical CPU address of the DWC2
1369 HW module registers.
1370
16c8d5e7
WD
1371- USB Device:
1372 Define the below if you wish to use the USB console.
1373 Once firmware is rebuilt from a serial console issue the
1374 command "setenv stdin usbtty; setenv stdout usbtty" and
11ccc33f 1375 attach your USB cable. The Unix command "dmesg" should print
16c8d5e7
WD
1376 it has found a new device. The environment variable usbtty
1377 can be set to gserial or cdc_acm to enable your device to
386eda02 1378 appear to a USB host as a Linux gserial device or a
16c8d5e7
WD
1379 Common Device Class Abstract Control Model serial device.
1380 If you select usbtty = gserial you should be able to enumerate
1381 a Linux host by
1382 # modprobe usbserial vendor=0xVendorID product=0xProductID
1383 else if using cdc_acm, simply setting the environment
1384 variable usbtty to be cdc_acm should suffice. The following
1385 might be defined in YourBoardName.h
386eda02 1386
16c8d5e7
WD
1387 CONFIG_USB_DEVICE
1388 Define this to build a UDC device
1389
1390 CONFIG_USB_TTY
1391 Define this to have a tty type of device available to
1392 talk to the UDC device
386eda02 1393
f9da0f89
VK
1394 CONFIG_USBD_HS
1395 Define this to enable the high speed support for usb
1396 device and usbtty. If this feature is enabled, a routine
1397 int is_usbd_high_speed(void)
1398 also needs to be defined by the driver to dynamically poll
1399 whether the enumeration has succeded at high speed or full
1400 speed.
1401
6d0f6bcf 1402 CONFIG_SYS_CONSOLE_IS_IN_ENV
16c8d5e7
WD
1403 Define this if you want stdin, stdout &/or stderr to
1404 be set to usbtty.
1405
1406 mpc8xx:
6d0f6bcf 1407 CONFIG_SYS_USB_EXTC_CLK 0xBLAH
16c8d5e7 1408 Derive USB clock from external clock "blah"
6d0f6bcf 1409 - CONFIG_SYS_USB_EXTC_CLK 0x02
386eda02 1410
386eda02 1411 If you have a USB-IF assigned VendorID then you may wish to
16c8d5e7 1412 define your own vendor specific values either in BoardName.h
386eda02 1413 or directly in usbd_vendor_info.h. If you don't define
16c8d5e7
WD
1414 CONFIG_USBD_MANUFACTURER, CONFIG_USBD_PRODUCT_NAME,
1415 CONFIG_USBD_VENDORID and CONFIG_USBD_PRODUCTID, then U-Boot
1416 should pretend to be a Linux device to it's target host.
1417
1418 CONFIG_USBD_MANUFACTURER
1419 Define this string as the name of your company for
1420 - CONFIG_USBD_MANUFACTURER "my company"
386eda02 1421
16c8d5e7
WD
1422 CONFIG_USBD_PRODUCT_NAME
1423 Define this string as the name of your product
1424 - CONFIG_USBD_PRODUCT_NAME "acme usb device"
1425
1426 CONFIG_USBD_VENDORID
1427 Define this as your assigned Vendor ID from the USB
1428 Implementors Forum. This *must* be a genuine Vendor ID
1429 to avoid polluting the USB namespace.
1430 - CONFIG_USBD_VENDORID 0xFFFF
386eda02 1431
16c8d5e7
WD
1432 CONFIG_USBD_PRODUCTID
1433 Define this as the unique Product ID
1434 for your device
1435 - CONFIG_USBD_PRODUCTID 0xFFFF
4d13cbad 1436
d70a560f
IG
1437- ULPI Layer Support:
1438 The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via
1439 the generic ULPI layer. The generic layer accesses the ULPI PHY
1440 via the platform viewport, so you need both the genric layer and
1441 the viewport enabled. Currently only Chipidea/ARC based
1442 viewport is supported.
1443 To enable the ULPI layer support, define CONFIG_USB_ULPI and
1444 CONFIG_USB_ULPI_VIEWPORT in your board configuration file.
6d365ea0
LS
1445 If your ULPI phy needs a different reference clock than the
1446 standard 24 MHz then you have to define CONFIG_ULPI_REF_CLK to
1447 the appropriate value in Hz.
c609719b 1448
71f95118 1449- MMC Support:
8bde7f77
WD
1450 The MMC controller on the Intel PXA is supported. To
1451 enable this define CONFIG_MMC. The MMC can be
1452 accessed from the boot prompt by mapping the device
71f95118 1453 to physical memory similar to flash. Command line is
602ad3b3
JL
1454 enabled with CONFIG_CMD_MMC. The MMC driver also works with
1455 the FAT fs. This is enabled with CONFIG_CMD_FAT.
71f95118 1456
afb35666
YS
1457 CONFIG_SH_MMCIF
1458 Support for Renesas on-chip MMCIF controller
1459
1460 CONFIG_SH_MMCIF_ADDR
1461 Define the base address of MMCIF registers
1462
1463 CONFIG_SH_MMCIF_CLK
1464 Define the clock frequency for MMCIF
1465
1fd93c6e
PA
1466 CONFIG_SUPPORT_EMMC_BOOT
1467 Enable some additional features of the eMMC boot partitions.
1468
1469 CONFIG_SUPPORT_EMMC_RPMB
1470 Enable the commands for reading, writing and programming the
1471 key for the Replay Protection Memory Block partition in eMMC.
1472
b3ba6e94 1473- USB Device Firmware Update (DFU) class support:
01acd6ab 1474 CONFIG_USB_FUNCTION_DFU
b3ba6e94
TR
1475 This enables the USB portion of the DFU USB class
1476
1477 CONFIG_CMD_DFU
1478 This enables the command "dfu" which is used to have
1479 U-Boot create a DFU class device via USB. This command
1480 requires that the "dfu_alt_info" environment variable be
1481 set and define the alt settings to expose to the host.
1482
1483 CONFIG_DFU_MMC
1484 This enables support for exposing (e)MMC devices via DFU.
1485
c6631764
PA
1486 CONFIG_DFU_NAND
1487 This enables support for exposing NAND devices via DFU.
1488
a9479f04
AM
1489 CONFIG_DFU_RAM
1490 This enables support for exposing RAM via DFU.
1491 Note: DFU spec refer to non-volatile memory usage, but
1492 allow usages beyond the scope of spec - here RAM usage,
1493 one that would help mostly the developer.
1494
e7e75c70
HS
1495 CONFIG_SYS_DFU_DATA_BUF_SIZE
1496 Dfu transfer uses a buffer before writing data to the
1497 raw storage device. Make the size (in bytes) of this buffer
1498 configurable. The size of this buffer is also configurable
1499 through the "dfu_bufsiz" environment variable.
1500
ea2453d5
PA
1501 CONFIG_SYS_DFU_MAX_FILE_SIZE
1502 When updating files rather than the raw storage device,
1503 we use a static buffer to copy the file into and then write
1504 the buffer once we've been given the whole file. Define
1505 this to the maximum filesize (in bytes) for the buffer.
1506 Default is 4 MiB if undefined.
1507
001a8319
HS
1508 DFU_DEFAULT_POLL_TIMEOUT
1509 Poll timeout [ms], is the timeout a device can send to the
1510 host. The host must wait for this timeout before sending
1511 a subsequent DFU_GET_STATUS request to the device.
1512
1513 DFU_MANIFEST_POLL_TIMEOUT
1514 Poll timeout [ms], which the device sends to the host when
1515 entering dfuMANIFEST state. Host waits this timeout, before
1516 sending again an USB request to the device.
1517
3aab70af 1518- USB Device Android Fastboot support:
17da3c0c
PK
1519 CONFIG_USB_FUNCTION_FASTBOOT
1520 This enables the USB part of the fastboot gadget
1521
3aab70af
SS
1522 CONFIG_CMD_FASTBOOT
1523 This enables the command "fastboot" which enables the Android
1524 fastboot mode for the platform's USB device. Fastboot is a USB
1525 protocol for downloading images, flashing and device control
1526 used on Android devices.
1527 See doc/README.android-fastboot for more information.
1528
1529 CONFIG_ANDROID_BOOT_IMAGE
1530 This enables support for booting images which use the Android
1531 image format header.
1532
a588d99a 1533 CONFIG_FASTBOOT_BUF_ADDR
3aab70af
SS
1534 The fastboot protocol requires a large memory buffer for
1535 downloads. Define this to the starting RAM address to use for
1536 downloaded images.
1537
a588d99a 1538 CONFIG_FASTBOOT_BUF_SIZE
3aab70af
SS
1539 The fastboot protocol requires a large memory buffer for
1540 downloads. This buffer should be as large as possible for a
1541 platform. Define this to the size available RAM for fastboot.
d1b5ed07
SR
1542
1543 CONFIG_FASTBOOT_FLASH
1544 The fastboot protocol includes a "flash" command for writing
1545 the downloaded image to a non-volatile storage device. Define
1546 this to enable the "fastboot flash" command.
1547
1548 CONFIG_FASTBOOT_FLASH_MMC_DEV
1549 The fastboot "flash" command requires additional information
1550 regarding the non-volatile storage device. Define this to
1551 the eMMC device that fastboot should use to store the image.
3aab70af 1552
0ff7e585
SR
1553 CONFIG_FASTBOOT_GPT_NAME
1554 The fastboot "flash" command supports writing the downloaded
1555 image to the Protective MBR and the Primary GUID Partition
1556 Table. (Additionally, this downloaded image is post-processed
1557 to generate and write the Backup GUID Partition Table.)
1558 This occurs when the specified "partition name" on the
1559 "fastboot flash" command line matches this value.
6f6c8630 1560 The default is "gpt" if undefined.
0ff7e585 1561
b6dd69a4
PK
1562 CONFIG_FASTBOOT_MBR_NAME
1563 The fastboot "flash" command supports writing the downloaded
1564 image to DOS MBR.
1565 This occurs when the "partition name" specified on the
1566 "fastboot flash" command line matches this value.
1567 If not defined the default value "mbr" is used.
1568
6705d81e 1569- Journaling Flash filesystem support:
b2482dff 1570 CONFIG_JFFS2_NAND
6705d81e
WD
1571 Define these for a default partition on a NAND device
1572
6d0f6bcf
JCPV
1573 CONFIG_SYS_JFFS2_FIRST_SECTOR,
1574 CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS
6705d81e
WD
1575 Define these for a default partition on a NOR device
1576
c30a15e5
DK
1577- FAT(File Allocation Table) filesystem write function support:
1578 CONFIG_FAT_WRITE
656f4c65
DK
1579
1580 Define this to enable support for saving memory data as a
1581 file in FAT formatted partition.
1582
1583 This will also enable the command "fatwrite" enabling the
1584 user to write files to FAT.
c30a15e5 1585
edb42dba 1586- CBFS (Coreboot Filesystem) support:
84cd9327
GB
1587 CONFIG_CMD_CBFS
1588
1589 Define this to enable support for reading from a Coreboot
1590 filesystem. Available commands are cbfsinit, cbfsinfo, cbfsls
1591 and cbfsload.
1592
4f0d1a2a
SDPP
1593- FAT(File Allocation Table) filesystem cluster size:
1594 CONFIG_FS_FAT_MAX_CLUSTSIZE
1595
1596 Define the max cluster size for fat operations else
1597 a default value of 65536 will be defined.
1598
c609719b 1599- Keyboard Support:
39f615ed
SG
1600 See Kconfig help for available keyboard drivers.
1601
1602 CONFIG_KEYBOARD
1603
1604 Define this to enable a custom keyboard support.
1605 This simply calls drv_keyboard_init() which must be
1606 defined in your board-specific files. This option is deprecated
1607 and is only used by novena. For new boards, use driver model
1608 instead.
c609719b
WD
1609
1610- Video support:
7d3053fb 1611 CONFIG_FSL_DIU_FB
04e5ae79 1612 Enable the Freescale DIU video driver. Reference boards for
7d3053fb
TT
1613 SOCs that have a DIU should define this macro to enable DIU
1614 support, and should also define these other macros:
1615
1616 CONFIG_SYS_DIU_ADDR
1617 CONFIG_VIDEO
1618 CONFIG_CMD_BMP
1619 CONFIG_CFB_CONSOLE
1620 CONFIG_VIDEO_SW_CURSOR
1621 CONFIG_VGA_AS_SINGLE_DEVICE
1622 CONFIG_VIDEO_LOGO
1623 CONFIG_VIDEO_BMP_LOGO
1624
ba8e76bd
TT
1625 The DIU driver will look for the 'video-mode' environment
1626 variable, and if defined, enable the DIU as a console during
8eca9439 1627 boot. See the documentation file doc/README.video for a
ba8e76bd 1628 description of this variable.
7d3053fb 1629
c609719b
WD
1630- LCD Support: CONFIG_LCD
1631
1632 Define this to enable LCD support (for output to LCD
1633 display); also select one of the supported displays
1634 by defining one of these:
1635
39cf4804
SP
1636 CONFIG_ATMEL_LCD:
1637
1638 HITACHI TX09D70VM1CCA, 3.5", 240x320.
1639
fd3103bb 1640 CONFIG_NEC_NL6448AC33:
c609719b 1641
fd3103bb 1642 NEC NL6448AC33-18. Active, color, single scan.
c609719b 1643
fd3103bb 1644 CONFIG_NEC_NL6448BC20
c609719b 1645
fd3103bb
WD
1646 NEC NL6448BC20-08. 6.5", 640x480.
1647 Active, color, single scan.
1648
1649 CONFIG_NEC_NL6448BC33_54
1650
1651 NEC NL6448BC33-54. 10.4", 640x480.
c609719b
WD
1652 Active, color, single scan.
1653
1654 CONFIG_SHARP_16x9
1655
1656 Sharp 320x240. Active, color, single scan.
1657 It isn't 16x9, and I am not sure what it is.
1658
1659 CONFIG_SHARP_LQ64D341
1660
1661 Sharp LQ64D341 display, 640x480.
1662 Active, color, single scan.
1663
1664 CONFIG_HLD1045
1665
1666 HLD1045 display, 640x480.
1667 Active, color, single scan.
1668
1669 CONFIG_OPTREX_BW
1670
1671 Optrex CBL50840-2 NF-FW 99 22 M5
1672 or
1673 Hitachi LMG6912RPFC-00T
1674 or
1675 Hitachi SP14Q002
1676
1677 320x240. Black & white.
1678
1679 Normally display is black on white background; define
6d0f6bcf 1680 CONFIG_SYS_WHITE_ON_BLACK to get it inverted.
c609719b 1681
676d319e
SG
1682 CONFIG_LCD_ALIGNMENT
1683
b445bbb4 1684 Normally the LCD is page-aligned (typically 4KB). If this is
676d319e
SG
1685 defined then the LCD will be aligned to this value instead.
1686 For ARM it is sometimes useful to use MMU_SECTION_SIZE
1687 here, since it is cheaper to change data cache settings on
1688 a per-section basis.
1689
1690
604c7d4a
HP
1691 CONFIG_LCD_ROTATION
1692
1693 Sometimes, for example if the display is mounted in portrait
1694 mode or even if it's mounted landscape but rotated by 180degree,
1695 we need to rotate our content of the display relative to the
1696 framebuffer, so that user can read the messages which are
1697 printed out.
1698 Once CONFIG_LCD_ROTATION is defined, the lcd_console will be
1699 initialized with a given rotation from "vl_rot" out of
1700 "vidinfo_t" which is provided by the board specific code.
1701 The value for vl_rot is coded as following (matching to
1702 fbcon=rotate:<n> linux-kernel commandline):
1703 0 = no rotation respectively 0 degree
1704 1 = 90 degree rotation
1705 2 = 180 degree rotation
1706 3 = 270 degree rotation
1707
1708 If CONFIG_LCD_ROTATION is not defined, the console will be
1709 initialized with 0degree rotation.
1710
45d7f525
TWHT
1711 CONFIG_LCD_BMP_RLE8
1712
1713 Support drawing of RLE8-compressed bitmaps on the LCD.
1714
735987c5
TWHT
1715 CONFIG_I2C_EDID
1716
1717 Enables an 'i2c edid' command which can read EDID
1718 information over I2C from an attached LCD display.
1719
7152b1d0 1720- Splash Screen Support: CONFIG_SPLASH_SCREEN
d791b1dc 1721
8bde7f77
WD
1722 If this option is set, the environment is checked for
1723 a variable "splashimage". If found, the usual display
1724 of logo, copyright and system information on the LCD
e94d2cd9 1725 is suppressed and the BMP image at the address
8bde7f77
WD
1726 specified in "splashimage" is loaded instead. The
1727 console is redirected to the "nulldev", too. This
1728 allows for a "silent" boot where a splash screen is
1729 loaded very quickly after power-on.
d791b1dc 1730
c0880485
NK
1731 CONFIG_SPLASHIMAGE_GUARD
1732
1733 If this option is set, then U-Boot will prevent the environment
1734 variable "splashimage" from being set to a problematic address
ab5645f1 1735 (see doc/README.displaying-bmps).
c0880485
NK
1736 This option is useful for targets where, due to alignment
1737 restrictions, an improperly aligned BMP image will cause a data
1738 abort. If you think you will not have problems with unaligned
1739 accesses (for example because your toolchain prevents them)
1740 there is no need to set this option.
1741
1ca298ce
MW
1742 CONFIG_SPLASH_SCREEN_ALIGN
1743
1744 If this option is set the splash image can be freely positioned
1745 on the screen. Environment variable "splashpos" specifies the
1746 position as "x,y". If a positive number is given it is used as
1747 number of pixel from left/top. If a negative number is given it
1748 is used as number of pixel from right/bottom. You can also
1749 specify 'm' for centering the image.
1750
1751 Example:
1752 setenv splashpos m,m
1753 => image at center of screen
1754
1755 setenv splashpos 30,20
1756 => image at x = 30 and y = 20
1757
1758 setenv splashpos -10,m
1759 => vertically centered image
1760 at x = dspWidth - bmpWidth - 9
1761
98f4a3df
SR
1762- Gzip compressed BMP image support: CONFIG_VIDEO_BMP_GZIP
1763
1764 If this option is set, additionally to standard BMP
1765 images, gzipped BMP images can be displayed via the
1766 splashscreen support or the bmp command.
1767
d5011762
AG
1768- Run length encoded BMP image (RLE8) support: CONFIG_VIDEO_BMP_RLE8
1769
1770 If this option is set, 8-bit RLE compressed BMP images
1771 can be displayed via the splashscreen support or the
1772 bmp command.
1773
c29fdfc1 1774- Compression support:
8ef70478
KC
1775 CONFIG_GZIP
1776
1777 Enabled by default to support gzip compressed images.
1778
c29fdfc1
WD
1779 CONFIG_BZIP2
1780
1781 If this option is set, support for bzip2 compressed
1782 images is included. If not, only uncompressed and gzip
1783 compressed images are supported.
1784
42d1f039 1785 NOTE: the bzip2 algorithm requires a lot of RAM, so
6d0f6bcf 1786 the malloc area (as defined by CONFIG_SYS_MALLOC_LEN) should
42d1f039 1787 be at least 4MB.
d791b1dc 1788
fc9c1727
LCM
1789 CONFIG_LZMA
1790
1791 If this option is set, support for lzma compressed
1792 images is included.
1793
1794 Note: The LZMA algorithm adds between 2 and 4KB of code and it
1795 requires an amount of dynamic memory that is given by the
1796 formula:
1797
1798 (1846 + 768 << (lc + lp)) * sizeof(uint16)
1799
1800 Where lc and lp stand for, respectively, Literal context bits
1801 and Literal pos bits.
1802
1803 This value is upper-bounded by 14MB in the worst case. Anyway,
1804 for a ~4MB large kernel image, we have lc=3 and lp=0 for a
1805 total amount of (1846 + 768 << (3 + 0)) * 2 = ~41KB... that is
1806 a very small buffer.
1807
1808 Use the lzmainfo tool to determinate the lc and lp values and
1809 then calculate the amount of needed dynamic memory (ensuring
6d0f6bcf 1810 the appropriate CONFIG_SYS_MALLOC_LEN value).
fc9c1727 1811
8ef70478
KC
1812 CONFIG_LZO
1813
1814 If this option is set, support for LZO compressed images
1815 is included.
1816
17ea1177
WD
1817- MII/PHY support:
1818 CONFIG_PHY_ADDR
1819
1820 The address of PHY on MII bus.
1821
1822 CONFIG_PHY_CLOCK_FREQ (ppc4xx)
1823
1824 The clock frequency of the MII bus
1825
1826 CONFIG_PHY_GIGE
1827
1828 If this option is set, support for speed/duplex
11ccc33f 1829 detection of gigabit PHY is included.
17ea1177
WD
1830
1831 CONFIG_PHY_RESET_DELAY
1832
1833 Some PHY like Intel LXT971A need extra delay after
1834 reset before any MII register access is possible.
1835 For such PHY, set this option to the usec delay
1836 required. (minimum 300usec for LXT971A)
1837
1838 CONFIG_PHY_CMD_DELAY (ppc4xx)
1839
1840 Some PHY like Intel LXT971A need extra delay after
1841 command issued before MII status register can be read
1842
c609719b
WD
1843- IP address:
1844 CONFIG_IPADDR
1845
1846 Define a default value for the IP address to use for
11ccc33f 1847 the default Ethernet interface, in case this is not
c609719b 1848 determined through e.g. bootp.
1ebcd654 1849 (Environment variable "ipaddr")
c609719b
WD
1850
1851- Server IP address:
1852 CONFIG_SERVERIP
1853
11ccc33f 1854 Defines a default value for the IP address of a TFTP
c609719b 1855 server to contact when using the "tftboot" command.
1ebcd654 1856 (Environment variable "serverip")
c609719b 1857
97cfe861
RG
1858 CONFIG_KEEP_SERVERADDR
1859
1860 Keeps the server's MAC address, in the env 'serveraddr'
1861 for passing to bootargs (like Linux's netconsole option)
1862
1ebcd654
WD
1863- Gateway IP address:
1864 CONFIG_GATEWAYIP
1865
1866 Defines a default value for the IP address of the
1867 default router where packets to other networks are
1868 sent to.
1869 (Environment variable "gatewayip")
1870
1871- Subnet mask:
1872 CONFIG_NETMASK
1873
1874 Defines a default value for the subnet mask (or
1875 routing prefix) which is used to determine if an IP
1876 address belongs to the local subnet or needs to be
1877 forwarded through a router.
1878 (Environment variable "netmask")
1879
53a5c424
DU
1880- Multicast TFTP Mode:
1881 CONFIG_MCAST_TFTP
1882
1883 Defines whether you want to support multicast TFTP as per
1884 rfc-2090; for example to work with atftp. Lets lots of targets
11ccc33f 1885 tftp down the same boot image concurrently. Note: the Ethernet
53a5c424
DU
1886 driver in use must provide a function: mcast() to join/leave a
1887 multicast group.
1888
c609719b
WD
1889- BOOTP Recovery Mode:
1890 CONFIG_BOOTP_RANDOM_DELAY
1891
1892 If you have many targets in a network that try to
1893 boot using BOOTP, you may want to avoid that all
1894 systems send out BOOTP requests at precisely the same
1895 moment (which would happen for instance at recovery
1896 from a power failure, when all systems will try to
1897 boot, thus flooding the BOOTP server. Defining
1898 CONFIG_BOOTP_RANDOM_DELAY causes a random delay to be
1899 inserted before sending out BOOTP requests. The
6c33c785 1900 following delays are inserted then:
c609719b
WD
1901
1902 1st BOOTP request: delay 0 ... 1 sec
1903 2nd BOOTP request: delay 0 ... 2 sec
1904 3rd BOOTP request: delay 0 ... 4 sec
1905 4th and following
1906 BOOTP requests: delay 0 ... 8 sec
1907
92ac8acc
TR
1908 CONFIG_BOOTP_ID_CACHE_SIZE
1909
1910 BOOTP packets are uniquely identified using a 32-bit ID. The
1911 server will copy the ID from client requests to responses and
1912 U-Boot will use this to determine if it is the destination of
1913 an incoming response. Some servers will check that addresses
1914 aren't in use before handing them out (usually using an ARP
1915 ping) and therefore take up to a few hundred milliseconds to
1916 respond. Network congestion may also influence the time it
1917 takes for a response to make it back to the client. If that
1918 time is too long, U-Boot will retransmit requests. In order
1919 to allow earlier responses to still be accepted after these
1920 retransmissions, U-Boot's BOOTP client keeps a small cache of
1921 IDs. The CONFIG_BOOTP_ID_CACHE_SIZE controls the size of this
1922 cache. The default is to keep IDs for up to four outstanding
1923 requests. Increasing this will allow U-Boot to accept offers
1924 from a BOOTP client in networks with unusually high latency.
1925
fe389a82 1926- DHCP Advanced Options:
1fe80d79
JL
1927 You can fine tune the DHCP functionality by defining
1928 CONFIG_BOOTP_* symbols:
1929
1930 CONFIG_BOOTP_SUBNETMASK
1931 CONFIG_BOOTP_GATEWAY
1932 CONFIG_BOOTP_HOSTNAME
1933 CONFIG_BOOTP_NISDOMAIN
1934 CONFIG_BOOTP_BOOTPATH
1935 CONFIG_BOOTP_BOOTFILESIZE
1936 CONFIG_BOOTP_DNS
1937 CONFIG_BOOTP_DNS2
1938 CONFIG_BOOTP_SEND_HOSTNAME
1939 CONFIG_BOOTP_NTPSERVER
1940 CONFIG_BOOTP_TIMEOFFSET
1941 CONFIG_BOOTP_VENDOREX
2c00e099 1942 CONFIG_BOOTP_MAY_FAIL
fe389a82 1943
5d110f0a
WC
1944 CONFIG_BOOTP_SERVERIP - TFTP server will be the serverip
1945 environment variable, not the BOOTP server.
fe389a82 1946
2c00e099
JH
1947 CONFIG_BOOTP_MAY_FAIL - If the DHCP server is not found
1948 after the configured retry count, the call will fail
1949 instead of starting over. This can be used to fail over
1950 to Link-local IP address configuration if the DHCP server
1951 is not available.
1952
fe389a82
SR
1953 CONFIG_BOOTP_DNS2 - If a DHCP client requests the DNS
1954 serverip from a DHCP server, it is possible that more
1955 than one DNS serverip is offered to the client.
1956 If CONFIG_BOOTP_DNS2 is enabled, the secondary DNS
1957 serverip will be stored in the additional environment
1958 variable "dnsip2". The first DNS serverip is always
1959 stored in the variable "dnsip", when CONFIG_BOOTP_DNS
1fe80d79 1960 is defined.
fe389a82
SR
1961
1962 CONFIG_BOOTP_SEND_HOSTNAME - Some DHCP servers are capable
1963 to do a dynamic update of a DNS server. To do this, they
1964 need the hostname of the DHCP requester.
5d110f0a 1965 If CONFIG_BOOTP_SEND_HOSTNAME is defined, the content
1fe80d79
JL
1966 of the "hostname" environment variable is passed as
1967 option 12 to the DHCP server.
fe389a82 1968
d9a2f416
AV
1969 CONFIG_BOOTP_DHCP_REQUEST_DELAY
1970
1971 A 32bit value in microseconds for a delay between
1972 receiving a "DHCP Offer" and sending the "DHCP Request".
1973 This fixes a problem with certain DHCP servers that don't
1974 respond 100% of the time to a "DHCP request". E.g. On an
1975 AT91RM9200 processor running at 180MHz, this delay needed
1976 to be *at least* 15,000 usec before a Windows Server 2003
1977 DHCP server would reply 100% of the time. I recommend at
1978 least 50,000 usec to be safe. The alternative is to hope
1979 that one of the retries will be successful but note that
1980 the DHCP timeout and retry process takes a longer than
1981 this delay.
1982
d22c338e
JH
1983 - Link-local IP address negotiation:
1984 Negotiate with other link-local clients on the local network
1985 for an address that doesn't require explicit configuration.
1986 This is especially useful if a DHCP server cannot be guaranteed
1987 to exist in all environments that the device must operate.
1988
1989 See doc/README.link-local for more information.
1990
a3d991bd 1991 - CDP Options:
6e592385 1992 CONFIG_CDP_DEVICE_ID
a3d991bd
WD
1993
1994 The device id used in CDP trigger frames.
1995
1996 CONFIG_CDP_DEVICE_ID_PREFIX
1997
1998 A two character string which is prefixed to the MAC address
1999 of the device.
2000
2001 CONFIG_CDP_PORT_ID
2002
2003 A printf format string which contains the ascii name of
2004 the port. Normally is set to "eth%d" which sets
11ccc33f 2005 eth0 for the first Ethernet, eth1 for the second etc.
a3d991bd
WD
2006
2007 CONFIG_CDP_CAPABILITIES
2008
2009 A 32bit integer which indicates the device capabilities;
2010 0x00000010 for a normal host which does not forwards.
2011
2012 CONFIG_CDP_VERSION
2013
2014 An ascii string containing the version of the software.
2015
2016 CONFIG_CDP_PLATFORM
2017
2018 An ascii string containing the name of the platform.
2019
2020 CONFIG_CDP_TRIGGER
2021
2022 A 32bit integer sent on the trigger.
2023
2024 CONFIG_CDP_POWER_CONSUMPTION
2025
2026 A 16bit integer containing the power consumption of the
2027 device in .1 of milliwatts.
2028
2029 CONFIG_CDP_APPLIANCE_VLAN_TYPE
2030
2031 A byte containing the id of the VLAN.
2032
79267edd 2033- Status LED: CONFIG_LED_STATUS
c609719b
WD
2034
2035 Several configurations allow to display the current
2036 status using a LED. For instance, the LED will blink
2037 fast while running U-Boot code, stop blinking as
2038 soon as a reply to a BOOTP request was received, and
2039 start blinking slow once the Linux kernel is running
2040 (supported by a status LED driver in the Linux
79267edd 2041 kernel). Defining CONFIG_LED_STATUS enables this
c609719b
WD
2042 feature in U-Boot.
2043
1df7bbba
IG
2044 Additional options:
2045
79267edd 2046 CONFIG_LED_STATUS_GPIO
1df7bbba
IG
2047 The status LED can be connected to a GPIO pin.
2048 In such cases, the gpio_led driver can be used as a
79267edd 2049 status LED backend implementation. Define CONFIG_LED_STATUS_GPIO
1df7bbba
IG
2050 to include the gpio_led driver in the U-Boot binary.
2051
9dfdcdfe
IG
2052 CONFIG_GPIO_LED_INVERTED_TABLE
2053 Some GPIO connected LEDs may have inverted polarity in which
2054 case the GPIO high value corresponds to LED off state and
2055 GPIO low value corresponds to LED on state.
2056 In such cases CONFIG_GPIO_LED_INVERTED_TABLE may be defined
2057 with a list of GPIO LEDs that have inverted polarity.
2058
c609719b
WD
2059- CAN Support: CONFIG_CAN_DRIVER
2060
2061 Defining CONFIG_CAN_DRIVER enables CAN driver support
2062 on those systems that support this (optional)
2063 feature, like the TQM8xxL modules.
2064
3f4978c7
HS
2065- I2C Support: CONFIG_SYS_I2C
2066
2067 This enable the NEW i2c subsystem, and will allow you to use
2068 i2c commands at the u-boot command line (as long as you set
2069 CONFIG_CMD_I2C in CONFIG_COMMANDS) and communicate with i2c
2070 based realtime clock chips or other i2c devices. See
2071 common/cmd_i2c.c for a description of the command line
2072 interface.
2073
2074 ported i2c driver to the new framework:
ea818dbb
HS
2075 - drivers/i2c/soft_i2c.c:
2076 - activate first bus with CONFIG_SYS_I2C_SOFT define
2077 CONFIG_SYS_I2C_SOFT_SPEED and CONFIG_SYS_I2C_SOFT_SLAVE
2078 for defining speed and slave address
2079 - activate second bus with I2C_SOFT_DECLARATIONS2 define
2080 CONFIG_SYS_I2C_SOFT_SPEED_2 and CONFIG_SYS_I2C_SOFT_SLAVE_2
2081 for defining speed and slave address
2082 - activate third bus with I2C_SOFT_DECLARATIONS3 define
2083 CONFIG_SYS_I2C_SOFT_SPEED_3 and CONFIG_SYS_I2C_SOFT_SLAVE_3
2084 for defining speed and slave address
2085 - activate fourth bus with I2C_SOFT_DECLARATIONS4 define
2086 CONFIG_SYS_I2C_SOFT_SPEED_4 and CONFIG_SYS_I2C_SOFT_SLAVE_4
2087 for defining speed and slave address
3f4978c7 2088
00f792e0
HS
2089 - drivers/i2c/fsl_i2c.c:
2090 - activate i2c driver with CONFIG_SYS_I2C_FSL
2091 define CONFIG_SYS_FSL_I2C_OFFSET for setting the register
2092 offset CONFIG_SYS_FSL_I2C_SPEED for the i2c speed and
2093 CONFIG_SYS_FSL_I2C_SLAVE for the slave addr of the first
2094 bus.
93e14596 2095 - If your board supports a second fsl i2c bus, define
00f792e0
HS
2096 CONFIG_SYS_FSL_I2C2_OFFSET for the register offset
2097 CONFIG_SYS_FSL_I2C2_SPEED for the speed and
2098 CONFIG_SYS_FSL_I2C2_SLAVE for the slave address of the
2099 second bus.
2100
1f2ba722 2101 - drivers/i2c/tegra_i2c.c:
10cee516
NI
2102 - activate this driver with CONFIG_SYS_I2C_TEGRA
2103 - This driver adds 4 i2c buses with a fix speed from
2104 100000 and the slave addr 0!
1f2ba722 2105
880540de
DE
2106 - drivers/i2c/ppc4xx_i2c.c
2107 - activate this driver with CONFIG_SYS_I2C_PPC4XX
2108 - CONFIG_SYS_I2C_PPC4XX_CH0 activate hardware channel 0
2109 - CONFIG_SYS_I2C_PPC4XX_CH1 activate hardware channel 1
2110
fac96408 2111 - drivers/i2c/i2c_mxc.c
2112 - activate this driver with CONFIG_SYS_I2C_MXC
03544c66
AA
2113 - enable bus 1 with CONFIG_SYS_I2C_MXC_I2C1
2114 - enable bus 2 with CONFIG_SYS_I2C_MXC_I2C2
2115 - enable bus 3 with CONFIG_SYS_I2C_MXC_I2C3
2116 - enable bus 4 with CONFIG_SYS_I2C_MXC_I2C4
fac96408 2117 - define speed for bus 1 with CONFIG_SYS_MXC_I2C1_SPEED
2118 - define slave for bus 1 with CONFIG_SYS_MXC_I2C1_SLAVE
2119 - define speed for bus 2 with CONFIG_SYS_MXC_I2C2_SPEED
2120 - define slave for bus 2 with CONFIG_SYS_MXC_I2C2_SLAVE
2121 - define speed for bus 3 with CONFIG_SYS_MXC_I2C3_SPEED
2122 - define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE
03544c66
AA
2123 - define speed for bus 4 with CONFIG_SYS_MXC_I2C4_SPEED
2124 - define slave for bus 4 with CONFIG_SYS_MXC_I2C4_SLAVE
b445bbb4 2125 If those defines are not set, default value is 100000
fac96408 2126 for speed, and 0 for slave.
2127
1086bfa9
NI
2128 - drivers/i2c/rcar_i2c.c:
2129 - activate this driver with CONFIG_SYS_I2C_RCAR
2130 - This driver adds 4 i2c buses
2131
2132 - CONFIG_SYS_RCAR_I2C0_BASE for setting the register channel 0
2133 - CONFIG_SYS_RCAR_I2C0_SPEED for for the speed channel 0
2134 - CONFIG_SYS_RCAR_I2C1_BASE for setting the register channel 1
2135 - CONFIG_SYS_RCAR_I2C1_SPEED for for the speed channel 1
2136 - CONFIG_SYS_RCAR_I2C2_BASE for setting the register channel 2
2137 - CONFIG_SYS_RCAR_I2C2_SPEED for for the speed channel 2
2138 - CONFIG_SYS_RCAR_I2C3_BASE for setting the register channel 3
2139 - CONFIG_SYS_RCAR_I2C3_SPEED for for the speed channel 3
2140 - CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS for number of i2c buses
2141
2035d77d
NI
2142 - drivers/i2c/sh_i2c.c:
2143 - activate this driver with CONFIG_SYS_I2C_SH
2144 - This driver adds from 2 to 5 i2c buses
2145
2146 - CONFIG_SYS_I2C_SH_BASE0 for setting the register channel 0
2147 - CONFIG_SYS_I2C_SH_SPEED0 for for the speed channel 0
2148 - CONFIG_SYS_I2C_SH_BASE1 for setting the register channel 1
2149 - CONFIG_SYS_I2C_SH_SPEED1 for for the speed channel 1
2150 - CONFIG_SYS_I2C_SH_BASE2 for setting the register channel 2
2151 - CONFIG_SYS_I2C_SH_SPEED2 for for the speed channel 2
2152 - CONFIG_SYS_I2C_SH_BASE3 for setting the register channel 3
2153 - CONFIG_SYS_I2C_SH_SPEED3 for for the speed channel 3
2154 - CONFIG_SYS_I2C_SH_BASE4 for setting the register channel 4
2155 - CONFIG_SYS_I2C_SH_SPEED4 for for the speed channel 4
b445bbb4 2156 - CONFIG_SYS_I2C_SH_NUM_CONTROLLERS for number of i2c buses
2035d77d 2157
6789e84e
HS
2158 - drivers/i2c/omap24xx_i2c.c
2159 - activate this driver with CONFIG_SYS_I2C_OMAP24XX
2160 - CONFIG_SYS_OMAP24_I2C_SPEED speed channel 0
2161 - CONFIG_SYS_OMAP24_I2C_SLAVE slave addr channel 0
2162 - CONFIG_SYS_OMAP24_I2C_SPEED1 speed channel 1
2163 - CONFIG_SYS_OMAP24_I2C_SLAVE1 slave addr channel 1
2164 - CONFIG_SYS_OMAP24_I2C_SPEED2 speed channel 2
2165 - CONFIG_SYS_OMAP24_I2C_SLAVE2 slave addr channel 2
2166 - CONFIG_SYS_OMAP24_I2C_SPEED3 speed channel 3
2167 - CONFIG_SYS_OMAP24_I2C_SLAVE3 slave addr channel 3
2168 - CONFIG_SYS_OMAP24_I2C_SPEED4 speed channel 4
2169 - CONFIG_SYS_OMAP24_I2C_SLAVE4 slave addr channel 4
2170
0bdffe71
HS
2171 - drivers/i2c/zynq_i2c.c
2172 - activate this driver with CONFIG_SYS_I2C_ZYNQ
2173 - set CONFIG_SYS_I2C_ZYNQ_SPEED for speed setting
2174 - set CONFIG_SYS_I2C_ZYNQ_SLAVE for slave addr
2175
e717fc6d
NKC
2176 - drivers/i2c/s3c24x0_i2c.c:
2177 - activate this driver with CONFIG_SYS_I2C_S3C24X0
2178 - This driver adds i2c buses (11 for Exynos5250, Exynos5420
2179 9 i2c buses for Exynos4 and 1 for S3C24X0 SoCs from Samsung)
2180 with a fix speed from 100000 and the slave addr 0!
2181
b46226bd
DE
2182 - drivers/i2c/ihs_i2c.c
2183 - activate this driver with CONFIG_SYS_I2C_IHS
2184 - CONFIG_SYS_I2C_IHS_CH0 activate hardware channel 0
2185 - CONFIG_SYS_I2C_IHS_SPEED_0 speed channel 0
2186 - CONFIG_SYS_I2C_IHS_SLAVE_0 slave addr channel 0
2187 - CONFIG_SYS_I2C_IHS_CH1 activate hardware channel 1
2188 - CONFIG_SYS_I2C_IHS_SPEED_1 speed channel 1
2189 - CONFIG_SYS_I2C_IHS_SLAVE_1 slave addr channel 1
2190 - CONFIG_SYS_I2C_IHS_CH2 activate hardware channel 2
2191 - CONFIG_SYS_I2C_IHS_SPEED_2 speed channel 2
2192 - CONFIG_SYS_I2C_IHS_SLAVE_2 slave addr channel 2
2193 - CONFIG_SYS_I2C_IHS_CH3 activate hardware channel 3
2194 - CONFIG_SYS_I2C_IHS_SPEED_3 speed channel 3
2195 - CONFIG_SYS_I2C_IHS_SLAVE_3 slave addr channel 3
071be896
DE
2196 - activate dual channel with CONFIG_SYS_I2C_IHS_DUAL
2197 - CONFIG_SYS_I2C_IHS_SPEED_0_1 speed channel 0_1
2198 - CONFIG_SYS_I2C_IHS_SLAVE_0_1 slave addr channel 0_1
2199 - CONFIG_SYS_I2C_IHS_SPEED_1_1 speed channel 1_1
2200 - CONFIG_SYS_I2C_IHS_SLAVE_1_1 slave addr channel 1_1
2201 - CONFIG_SYS_I2C_IHS_SPEED_2_1 speed channel 2_1
2202 - CONFIG_SYS_I2C_IHS_SLAVE_2_1 slave addr channel 2_1
2203 - CONFIG_SYS_I2C_IHS_SPEED_3_1 speed channel 3_1
2204 - CONFIG_SYS_I2C_IHS_SLAVE_3_1 slave addr channel 3_1
b46226bd 2205
3f4978c7
HS
2206 additional defines:
2207
2208 CONFIG_SYS_NUM_I2C_BUSES
945a18e6 2209 Hold the number of i2c buses you want to use.
3f4978c7
HS
2210
2211 CONFIG_SYS_I2C_DIRECT_BUS
2212 define this, if you don't use i2c muxes on your hardware.
2213 if CONFIG_SYS_I2C_MAX_HOPS is not defined or == 0 you can
2214 omit this define.
2215
2216 CONFIG_SYS_I2C_MAX_HOPS
2217 define how many muxes are maximal consecutively connected
2218 on one i2c bus. If you not use i2c muxes, omit this
2219 define.
2220
2221 CONFIG_SYS_I2C_BUSES
b445bbb4 2222 hold a list of buses you want to use, only used if
3f4978c7
HS
2223 CONFIG_SYS_I2C_DIRECT_BUS is not defined, for example
2224 a board with CONFIG_SYS_I2C_MAX_HOPS = 1 and
2225 CONFIG_SYS_NUM_I2C_BUSES = 9:
2226
2227 CONFIG_SYS_I2C_BUSES {{0, {I2C_NULL_HOP}}, \
2228 {0, {{I2C_MUX_PCA9547, 0x70, 1}}}, \
2229 {0, {{I2C_MUX_PCA9547, 0x70, 2}}}, \
2230 {0, {{I2C_MUX_PCA9547, 0x70, 3}}}, \
2231 {0, {{I2C_MUX_PCA9547, 0x70, 4}}}, \
2232 {0, {{I2C_MUX_PCA9547, 0x70, 5}}}, \
2233 {1, {I2C_NULL_HOP}}, \
2234 {1, {{I2C_MUX_PCA9544, 0x72, 1}}}, \
2235 {1, {{I2C_MUX_PCA9544, 0x72, 2}}}, \
2236 }
2237
2238 which defines
2239 bus 0 on adapter 0 without a mux
ea818dbb
HS
2240 bus 1 on adapter 0 with a PCA9547 on address 0x70 port 1
2241 bus 2 on adapter 0 with a PCA9547 on address 0x70 port 2
2242 bus 3 on adapter 0 with a PCA9547 on address 0x70 port 3
2243 bus 4 on adapter 0 with a PCA9547 on address 0x70 port 4
2244 bus 5 on adapter 0 with a PCA9547 on address 0x70 port 5
3f4978c7 2245 bus 6 on adapter 1 without a mux
ea818dbb
HS
2246 bus 7 on adapter 1 with a PCA9544 on address 0x72 port 1
2247 bus 8 on adapter 1 with a PCA9544 on address 0x72 port 2
3f4978c7
HS
2248
2249 If you do not have i2c muxes on your board, omit this define.
2250
ea818dbb 2251- Legacy I2C Support: CONFIG_HARD_I2C
3f4978c7
HS
2252
2253 NOTE: It is intended to move drivers to CONFIG_SYS_I2C which
2254 provides the following compelling advantages:
2255
2256 - more than one i2c adapter is usable
2257 - approved multibus support
2258 - better i2c mux support
2259
2260 ** Please consider updating your I2C driver now. **
2261
ea818dbb
HS
2262 These enable legacy I2C serial bus commands. Defining
2263 CONFIG_HARD_I2C will include the appropriate I2C driver
2264 for the selected CPU.
c609719b 2265
945af8d7 2266 This will allow you to use i2c commands at the u-boot
602ad3b3 2267 command line (as long as you set CONFIG_CMD_I2C in
b37c7e5e
WD
2268 CONFIG_COMMANDS) and communicate with i2c based realtime
2269 clock chips. See common/cmd_i2c.c for a description of the
43d9616c 2270 command line interface.
c609719b 2271
bb99ad6d 2272 CONFIG_HARD_I2C selects a hardware I2C controller.
b37c7e5e 2273
945af8d7 2274 There are several other quantities that must also be
ea818dbb 2275 defined when you define CONFIG_HARD_I2C.
c609719b 2276
6d0f6bcf 2277 In both cases you will need to define CONFIG_SYS_I2C_SPEED
945af8d7 2278 to be the frequency (in Hz) at which you wish your i2c bus
6d0f6bcf 2279 to run and CONFIG_SYS_I2C_SLAVE to be the address of this node (ie
11ccc33f 2280 the CPU's i2c node address).
945af8d7 2281
8d321b81 2282 Now, the u-boot i2c code for the mpc8xx
a47a12be 2283 (arch/powerpc/cpu/mpc8xx/i2c.c) sets the CPU up as a master node
8d321b81
PT
2284 and so its address should therefore be cleared to 0 (See,
2285 eg, MPC823e User's Manual p.16-473). So, set
2286 CONFIG_SYS_I2C_SLAVE to 0.
c609719b 2287
5da71efa
EM
2288 CONFIG_SYS_I2C_INIT_MPC5XXX
2289
2290 When a board is reset during an i2c bus transfer
2291 chips might think that the current transfer is still
2292 in progress. Reset the slave devices by sending start
2293 commands until the slave device responds.
2294
945af8d7 2295 That's all that's required for CONFIG_HARD_I2C.
c609719b 2296
ea818dbb 2297 If you use the software i2c interface (CONFIG_SYS_I2C_SOFT)
b37c7e5e
WD
2298 then the following macros need to be defined (examples are
2299 from include/configs/lwmon.h):
c609719b
WD
2300
2301 I2C_INIT
2302
b37c7e5e 2303 (Optional). Any commands necessary to enable the I2C
43d9616c 2304 controller or configure ports.
c609719b 2305
ba56f625 2306 eg: #define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
b37c7e5e 2307
c609719b
WD
2308 I2C_PORT
2309
43d9616c
WD
2310 (Only for MPC8260 CPU). The I/O port to use (the code
2311 assumes both bits are on the same port). Valid values
2312 are 0..3 for ports A..D.
c609719b
WD
2313
2314 I2C_ACTIVE
2315
2316 The code necessary to make the I2C data line active
2317 (driven). If the data line is open collector, this
2318 define can be null.
2319
b37c7e5e
WD
2320 eg: #define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
2321
c609719b
WD
2322 I2C_TRISTATE
2323
2324 The code necessary to make the I2C data line tri-stated
2325 (inactive). If the data line is open collector, this
2326 define can be null.
2327
b37c7e5e
WD
2328 eg: #define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
2329
c609719b
WD
2330 I2C_READ
2331
472d5460
YS
2332 Code that returns true if the I2C data line is high,
2333 false if it is low.
c609719b 2334
b37c7e5e
WD
2335 eg: #define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
2336
c609719b
WD
2337 I2C_SDA(bit)
2338
472d5460
YS
2339 If <bit> is true, sets the I2C data line high. If it
2340 is false, it clears it (low).
c609719b 2341
b37c7e5e 2342 eg: #define I2C_SDA(bit) \
2535d602 2343 if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \
ba56f625 2344 else immr->im_cpm.cp_pbdat &= ~PB_SDA
b37c7e5e 2345
c609719b
WD
2346 I2C_SCL(bit)
2347
472d5460
YS
2348 If <bit> is true, sets the I2C clock line high. If it
2349 is false, it clears it (low).
c609719b 2350
b37c7e5e 2351 eg: #define I2C_SCL(bit) \
2535d602 2352 if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
ba56f625 2353 else immr->im_cpm.cp_pbdat &= ~PB_SCL
b37c7e5e 2354
c609719b
WD
2355 I2C_DELAY
2356
2357 This delay is invoked four times per clock cycle so this
2358 controls the rate of data transfer. The data rate thus
b37c7e5e 2359 is 1 / (I2C_DELAY * 4). Often defined to be something
945af8d7
WD
2360 like:
2361
b37c7e5e 2362 #define I2C_DELAY udelay(2)
c609719b 2363
793b5726
MF
2364 CONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA
2365
2366 If your arch supports the generic GPIO framework (asm/gpio.h),
2367 then you may alternatively define the two GPIOs that are to be
2368 used as SCL / SDA. Any of the previous I2C_xxx macros will
2369 have GPIO-based defaults assigned to them as appropriate.
2370
2371 You should define these to the GPIO value as given directly to
2372 the generic GPIO functions.
2373
6d0f6bcf 2374 CONFIG_SYS_I2C_INIT_BOARD
47cd00fa 2375
8bde7f77
WD
2376 When a board is reset during an i2c bus transfer
2377 chips might think that the current transfer is still
2378 in progress. On some boards it is possible to access
2379 the i2c SCLK line directly, either by using the
2380 processor pin as a GPIO or by having a second pin
2381 connected to the bus. If this option is defined a
2382 custom i2c_init_board() routine in boards/xxx/board.c
2383 is run early in the boot sequence.
47cd00fa 2384
26a33504
RR
2385 CONFIG_SYS_I2C_BOARD_LATE_INIT
2386
2387 An alternative to CONFIG_SYS_I2C_INIT_BOARD. If this option is
2388 defined a custom i2c_board_late_init() routine in
2389 boards/xxx/board.c is run AFTER the operations in i2c_init()
2390 is completed. This callpoint can be used to unreset i2c bus
2391 using CPU i2c controller register accesses for CPUs whose i2c
2392 controller provide such a method. It is called at the end of
2393 i2c_init() to allow i2c_init operations to setup the i2c bus
2394 controller on the CPU (e.g. setting bus speed & slave address).
2395
17ea1177
WD
2396 CONFIG_I2CFAST (PPC405GP|PPC405EP only)
2397
2398 This option enables configuration of bi_iic_fast[] flags
2399 in u-boot bd_info structure based on u-boot environment
2400 variable "i2cfast". (see also i2cfast)
2401
bb99ad6d
BW
2402 CONFIG_I2C_MULTI_BUS
2403
2404 This option allows the use of multiple I2C buses, each of which
c0f40859
WD
2405 must have a controller. At any point in time, only one bus is
2406 active. To switch to a different bus, use the 'i2c dev' command.
bb99ad6d
BW
2407 Note that bus numbering is zero-based.
2408
6d0f6bcf 2409 CONFIG_SYS_I2C_NOPROBES
bb99ad6d
BW
2410
2411 This option specifies a list of I2C devices that will be skipped
c0f40859 2412 when the 'i2c probe' command is issued. If CONFIG_I2C_MULTI_BUS
0f89c54b
PT
2413 is set, specify a list of bus-device pairs. Otherwise, specify
2414 a 1D array of device addresses
bb99ad6d
BW
2415
2416 e.g.
2417 #undef CONFIG_I2C_MULTI_BUS
c0f40859 2418 #define CONFIG_SYS_I2C_NOPROBES {0x50,0x68}
bb99ad6d
BW
2419
2420 will skip addresses 0x50 and 0x68 on a board with one I2C bus
2421
c0f40859 2422 #define CONFIG_I2C_MULTI_BUS
945a18e6 2423 #define CONFIG_SYS_I2C_NOPROBES {{0,0x50},{0,0x68},{1,0x54}}
bb99ad6d
BW
2424
2425 will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1
2426
6d0f6bcf 2427 CONFIG_SYS_SPD_BUS_NUM
be5e6181
TT
2428
2429 If defined, then this indicates the I2C bus number for DDR SPD.
2430 If not defined, then U-Boot assumes that SPD is on I2C bus 0.
2431
6d0f6bcf 2432 CONFIG_SYS_RTC_BUS_NUM
0dc018ec
SR
2433
2434 If defined, then this indicates the I2C bus number for the RTC.
2435 If not defined, then U-Boot assumes that RTC is on I2C bus 0.
2436
6d0f6bcf 2437 CONFIG_SYS_DTT_BUS_NUM
0dc018ec
SR
2438
2439 If defined, then this indicates the I2C bus number for the DTT.
2440 If not defined, then U-Boot assumes that DTT is on I2C bus 0.
2441
6d0f6bcf 2442 CONFIG_SYS_I2C_DTT_ADDR:
9ebbb54f
VG
2443
2444 If defined, specifies the I2C address of the DTT device.
2445 If not defined, then U-Boot uses predefined value for
2446 specified DTT device.
2447
2ac6985a
AD
2448 CONFIG_SOFT_I2C_READ_REPEATED_START
2449
2450 defining this will force the i2c_read() function in
2451 the soft_i2c driver to perform an I2C repeated start
2452 between writing the address pointer and reading the
2453 data. If this define is omitted the default behaviour
2454 of doing a stop-start sequence will be used. Most I2C
2455 devices can use either method, but some require one or
2456 the other.
be5e6181 2457
c609719b
WD
2458- SPI Support: CONFIG_SPI
2459
2460 Enables SPI driver (so far only tested with
2461 SPI EEPROM, also an instance works with Crystal A/D and
2462 D/As on the SACSng board)
2463
6639562e
YS
2464 CONFIG_SH_SPI
2465
2466 Enables the driver for SPI controller on SuperH. Currently
2467 only SH7757 is supported.
2468
c609719b
WD
2469 CONFIG_SOFT_SPI
2470
43d9616c
WD
2471 Enables a software (bit-bang) SPI driver rather than
2472 using hardware support. This is a general purpose
2473 driver that only requires three general I/O port pins
2474 (two outputs, one input) to function. If this is
2475 defined, the board configuration must define several
2476 SPI configuration items (port pins to use, etc). For
2477 an example, see include/configs/sacsng.h.
c609719b 2478
04a9e118
BW
2479 CONFIG_HARD_SPI
2480
2481 Enables a hardware SPI driver for general-purpose reads
2482 and writes. As with CONFIG_SOFT_SPI, the board configuration
2483 must define a list of chip-select function pointers.
c0f40859 2484 Currently supported on some MPC8xxx processors. For an
04a9e118
BW
2485 example, see include/configs/mpc8349emds.h.
2486
38254f45
GL
2487 CONFIG_MXC_SPI
2488
2489 Enables the driver for the SPI controllers on i.MX and MXC
2e3cd1cd 2490 SoCs. Currently i.MX31/35/51 are supported.
38254f45 2491
f659b573
HS
2492 CONFIG_SYS_SPI_MXC_WAIT
2493 Timeout for waiting until spi transfer completed.
2494 default: (CONFIG_SYS_HZ/100) /* 10 ms */
2495
0133502e 2496- FPGA Support: CONFIG_FPGA
c609719b 2497
0133502e
MF
2498 Enables FPGA subsystem.
2499
2500 CONFIG_FPGA_<vendor>
2501
2502 Enables support for specific chip vendors.
2503 (ALTERA, XILINX)
c609719b 2504
0133502e 2505 CONFIG_FPGA_<family>
c609719b 2506
0133502e
MF
2507 Enables support for FPGA family.
2508 (SPARTAN2, SPARTAN3, VIRTEX2, CYCLONE2, ACEX1K, ACEX)
2509
2510 CONFIG_FPGA_COUNT
2511
2512 Specify the number of FPGA devices to support.
c609719b 2513
64e809af
SDPP
2514 CONFIG_CMD_FPGA_LOADMK
2515
2516 Enable support for fpga loadmk command
2517
67193864
MS
2518 CONFIG_CMD_FPGA_LOADP
2519
2520 Enable support for fpga loadp command - load partial bitstream
2521
2522 CONFIG_CMD_FPGA_LOADBP
2523
2524 Enable support for fpga loadbp command - load partial bitstream
2525 (Xilinx only)
2526
6d0f6bcf 2527 CONFIG_SYS_FPGA_PROG_FEEDBACK
c609719b 2528
8bde7f77 2529 Enable printing of hash marks during FPGA configuration.
c609719b 2530
6d0f6bcf 2531 CONFIG_SYS_FPGA_CHECK_BUSY
c609719b 2532
43d9616c
WD
2533 Enable checks on FPGA configuration interface busy
2534 status by the configuration function. This option
2535 will require a board or device specific function to
2536 be written.
c609719b
WD
2537
2538 CONFIG_FPGA_DELAY
2539
2540 If defined, a function that provides delays in the FPGA
2541 configuration driver.
2542
6d0f6bcf 2543 CONFIG_SYS_FPGA_CHECK_CTRLC
c609719b
WD
2544 Allow Control-C to interrupt FPGA configuration
2545
6d0f6bcf 2546 CONFIG_SYS_FPGA_CHECK_ERROR
c609719b 2547
43d9616c
WD
2548 Check for configuration errors during FPGA bitfile
2549 loading. For example, abort during Virtex II
2550 configuration if the INIT_B line goes low (which
2551 indicated a CRC error).
c609719b 2552
6d0f6bcf 2553 CONFIG_SYS_FPGA_WAIT_INIT
c609719b 2554
b445bbb4
JM
2555 Maximum time to wait for the INIT_B line to de-assert
2556 after PROB_B has been de-asserted during a Virtex II
43d9616c 2557 FPGA configuration sequence. The default time is 500
11ccc33f 2558 ms.
c609719b 2559
6d0f6bcf 2560 CONFIG_SYS_FPGA_WAIT_BUSY
c609719b 2561
b445bbb4 2562 Maximum time to wait for BUSY to de-assert during
11ccc33f 2563 Virtex II FPGA configuration. The default is 5 ms.
c609719b 2564
6d0f6bcf 2565 CONFIG_SYS_FPGA_WAIT_CONFIG
c609719b 2566
43d9616c 2567 Time to wait after FPGA configuration. The default is
11ccc33f 2568 200 ms.
c609719b
WD
2569
2570- Configuration Management:
b2b8a696
SR
2571 CONFIG_BUILD_TARGET
2572
2573 Some SoCs need special image types (e.g. U-Boot binary
2574 with a special header) as build targets. By defining
2575 CONFIG_BUILD_TARGET in the SoC / board header, this
2576 special image will be automatically built upon calling
6de80f21 2577 make / buildman.
b2b8a696 2578
c609719b
WD
2579 CONFIG_IDENT_STRING
2580
43d9616c
WD
2581 If defined, this string will be added to the U-Boot
2582 version information (U_BOOT_VERSION)
c609719b
WD
2583
2584- Vendor Parameter Protection:
2585
43d9616c
WD
2586 U-Boot considers the values of the environment
2587 variables "serial#" (Board Serial Number) and
7152b1d0 2588 "ethaddr" (Ethernet Address) to be parameters that
43d9616c
WD
2589 are set once by the board vendor / manufacturer, and
2590 protects these variables from casual modification by
2591 the user. Once set, these variables are read-only,
2592 and write or delete attempts are rejected. You can
11ccc33f 2593 change this behaviour:
c609719b
WD
2594
2595 If CONFIG_ENV_OVERWRITE is #defined in your config
2596 file, the write protection for vendor parameters is
47cd00fa 2597 completely disabled. Anybody can change or delete
c609719b
WD
2598 these parameters.
2599
92ac5208
JH
2600 Alternatively, if you define _both_ an ethaddr in the
2601 default env _and_ CONFIG_OVERWRITE_ETHADDR_ONCE, a default
11ccc33f 2602 Ethernet address is installed in the environment,
c609719b
WD
2603 which can be changed exactly ONCE by the user. [The
2604 serial# is unaffected by this, i. e. it remains
2605 read-only.]
2606
2598090b
JH
2607 The same can be accomplished in a more flexible way
2608 for any variable by configuring the type of access
2609 to allow for those variables in the ".flags" variable
2610 or define CONFIG_ENV_FLAGS_LIST_STATIC.
2611
c609719b
WD
2612- Protected RAM:
2613 CONFIG_PRAM
2614
2615 Define this variable to enable the reservation of
2616 "protected RAM", i. e. RAM which is not overwritten
2617 by U-Boot. Define CONFIG_PRAM to hold the number of
2618 kB you want to reserve for pRAM. You can overwrite
2619 this default value by defining an environment
2620 variable "pram" to the number of kB you want to
2621 reserve. Note that the board info structure will
2622 still show the full amount of RAM. If pRAM is
2623 reserved, a new environment variable "mem" will
2624 automatically be defined to hold the amount of
2625 remaining RAM in a form that can be passed as boot
2626 argument to Linux, for instance like that:
2627
fe126d8b 2628 setenv bootargs ... mem=\${mem}
c609719b
WD
2629 saveenv
2630
2631 This way you can tell Linux not to use this memory,
2632 either, which results in a memory region that will
2633 not be affected by reboots.
2634
2635 *WARNING* If your board configuration uses automatic
2636 detection of the RAM size, you must make sure that
2637 this memory test is non-destructive. So far, the
2638 following board configurations are known to be
2639 "pRAM-clean":
2640
1b0757ec
WD
2641 IVMS8, IVML24, SPD8xx, TQM8xxL,
2642 HERMES, IP860, RPXlite, LWMON,
544d97e9 2643 FLAGADM, TQM8260
c609719b 2644
40fef049
GB
2645- Access to physical memory region (> 4GB)
2646 Some basic support is provided for operations on memory not
2647 normally accessible to U-Boot - e.g. some architectures
2648 support access to more than 4GB of memory on 32-bit
2649 machines using physical address extension or similar.
2650 Define CONFIG_PHYSMEM to access this basic support, which
2651 currently only supports clearing the memory.
2652
c609719b
WD
2653- Error Recovery:
2654 CONFIG_PANIC_HANG
2655
2656 Define this variable to stop the system in case of a
2657 fatal error, so that you have to reset it manually.
2658 This is probably NOT a good idea for an embedded
11ccc33f 2659 system where you want the system to reboot
c609719b
WD
2660 automatically as fast as possible, but it may be
2661 useful during development since you can try to debug
2662 the conditions that lead to the situation.
2663
2664 CONFIG_NET_RETRY_COUNT
2665
43d9616c
WD
2666 This variable defines the number of retries for
2667 network operations like ARP, RARP, TFTP, or BOOTP
2668 before giving up the operation. If not defined, a
2669 default value of 5 is used.
c609719b 2670
40cb90ee
GL
2671 CONFIG_ARP_TIMEOUT
2672
2673 Timeout waiting for an ARP reply in milliseconds.
2674
48a3e999
TK
2675 CONFIG_NFS_TIMEOUT
2676
2677 Timeout in milliseconds used in NFS protocol.
2678 If you encounter "ERROR: Cannot umount" in nfs command,
2679 try longer timeout such as
2680 #define CONFIG_NFS_TIMEOUT 10000UL
2681
c609719b 2682- Command Interpreter:
8078f1a5 2683 CONFIG_AUTO_COMPLETE
04a85b3b
WD
2684
2685 Enable auto completion of commands using TAB.
2686
6d0f6bcf 2687 CONFIG_SYS_PROMPT_HUSH_PS2
c609719b
WD
2688
2689 This defines the secondary prompt string, which is
2690 printed when the command interpreter needs more input
2691 to complete a command. Usually "> ".
2692
2693 Note:
2694
8bde7f77
WD
2695 In the current implementation, the local variables
2696 space and global environment variables space are
2697 separated. Local variables are those you define by
2698 simply typing `name=value'. To access a local
2699 variable later on, you have write `$name' or
2700 `${name}'; to execute the contents of a variable
2701 directly type `$name' at the command prompt.
c609719b 2702
43d9616c
WD
2703 Global environment variables are those you use
2704 setenv/printenv to work with. To run a command stored
2705 in such a variable, you need to use the run command,
2706 and you must not use the '$' sign to access them.
c609719b
WD
2707
2708 To store commands and special characters in a
2709 variable, please use double quotation marks
2710 surrounding the whole text of the variable, instead
2711 of the backslashes before semicolons and special
2712 symbols.
2713
b445bbb4 2714- Command Line Editing and History:
aa0c71ac
WD
2715 CONFIG_CMDLINE_EDITING
2716
11ccc33f 2717 Enable editing and History functions for interactive
b445bbb4 2718 command line input operations
aa0c71ac 2719
f3b267b3
MV
2720- Command Line PS1/PS2 support:
2721 CONFIG_CMDLINE_PS_SUPPORT
2722
2723 Enable support for changing the command prompt string
2724 at run-time. Only static string is supported so far.
2725 The string is obtained from environment variables PS1
2726 and PS2.
2727
a8c7c708 2728- Default Environment:
c609719b
WD
2729 CONFIG_EXTRA_ENV_SETTINGS
2730
43d9616c
WD
2731 Define this to contain any number of null terminated
2732 strings (variable = value pairs) that will be part of
7152b1d0 2733 the default environment compiled into the boot image.
2262cfee 2734
43d9616c
WD
2735 For example, place something like this in your
2736 board's config file:
c609719b
WD
2737
2738 #define CONFIG_EXTRA_ENV_SETTINGS \
2739 "myvar1=value1\0" \
2740 "myvar2=value2\0"
2741
43d9616c
WD
2742 Warning: This method is based on knowledge about the
2743 internal format how the environment is stored by the
2744 U-Boot code. This is NOT an official, exported
2745 interface! Although it is unlikely that this format
7152b1d0 2746 will change soon, there is no guarantee either.
c609719b
WD
2747 You better know what you are doing here.
2748
43d9616c
WD
2749 Note: overly (ab)use of the default environment is
2750 discouraged. Make sure to check other ways to preset
74de7aef 2751 the environment like the "source" command or the
43d9616c 2752 boot command first.
c609719b 2753
5e724ca2
SW
2754 CONFIG_ENV_VARS_UBOOT_CONFIG
2755
2756 Define this in order to add variables describing the
2757 U-Boot build configuration to the default environment.
2758 These will be named arch, cpu, board, vendor, and soc.
2759
2760 Enabling this option will cause the following to be defined:
2761
2762 - CONFIG_SYS_ARCH
2763 - CONFIG_SYS_CPU
2764 - CONFIG_SYS_BOARD
2765 - CONFIG_SYS_VENDOR
2766 - CONFIG_SYS_SOC
2767
7e27f89f
TR
2768 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
2769
2770 Define this in order to add variables describing certain
2771 run-time determined information about the hardware to the
2772 environment. These will be named board_name, board_rev.
2773
06fd8538
SG
2774 CONFIG_DELAY_ENVIRONMENT
2775
2776 Normally the environment is loaded when the board is
b445bbb4 2777 initialised so that it is available to U-Boot. This inhibits
06fd8538
SG
2778 that so that the environment is not available until
2779 explicitly loaded later by U-Boot code. With CONFIG_OF_CONTROL
2780 this is instead controlled by the value of
2781 /config/load-environment.
2782
3b10cf12
CP
2783- Parallel Flash support:
2784 CONFIG_SYS_NO_FLASH
2785
a187559e 2786 Traditionally U-Boot was run on systems with parallel NOR
3b10cf12
CP
2787 flash. This option is used to disable support for parallel NOR
2788 flash. This option should be defined if the board does not have
2789 parallel flash.
2790
2791 If this option is not defined one of the generic flash drivers
2792 (e.g. CONFIG_FLASH_CFI_DRIVER or CONFIG_ST_SMI) must be
2793 selected or the board must provide an implementation of the
2794 flash API (see include/flash.h).
2795
a8c7c708 2796- DataFlash Support:
2abbe075
WD
2797 CONFIG_HAS_DATAFLASH
2798
8bde7f77
WD
2799 Defining this option enables DataFlash features and
2800 allows to read/write in Dataflash via the standard
2801 commands cp, md...
2abbe075 2802
f61ec45e
EN
2803- Serial Flash support
2804 CONFIG_CMD_SF
2805
2806 Defining this option enables SPI flash commands
2807 'sf probe/read/write/erase/update'.
2808
2809 Usage requires an initial 'probe' to define the serial
2810 flash parameters, followed by read/write/erase/update
2811 commands.
2812
2813 The following defaults may be provided by the platform
2814 to handle the common case when only a single serial
2815 flash is present on the system.
2816
2817 CONFIG_SF_DEFAULT_BUS Bus identifier
2818 CONFIG_SF_DEFAULT_CS Chip-select
2819 CONFIG_SF_DEFAULT_MODE (see include/spi.h)
2820 CONFIG_SF_DEFAULT_SPEED in Hz
2821
24007273
SG
2822 CONFIG_CMD_SF_TEST
2823
2824 Define this option to include a destructive SPI flash
2825 test ('sf test').
2826
b902e07c
JT
2827 CONFIG_SF_DUAL_FLASH Dual flash memories
2828
2829 Define this option to use dual flash support where two flash
2830 memories can be connected with a given cs line.
b445bbb4 2831 Currently Xilinx Zynq qspi supports these type of connections.
b902e07c 2832
3f85ce27
WD
2833- SystemACE Support:
2834 CONFIG_SYSTEMACE
2835
2836 Adding this option adds support for Xilinx SystemACE
2837 chips attached via some sort of local bus. The address
11ccc33f 2838 of the chip must also be defined in the
6d0f6bcf 2839 CONFIG_SYS_SYSTEMACE_BASE macro. For example:
3f85ce27
WD
2840
2841 #define CONFIG_SYSTEMACE
6d0f6bcf 2842 #define CONFIG_SYS_SYSTEMACE_BASE 0xf0000000
3f85ce27
WD
2843
2844 When SystemACE support is added, the "ace" device type
2845 becomes available to the fat commands, i.e. fatls.
2846
ecb0ccd9
WD
2847- TFTP Fixed UDP Port:
2848 CONFIG_TFTP_PORT
2849
28cb9375 2850 If this is defined, the environment variable tftpsrcp
ecb0ccd9 2851 is used to supply the TFTP UDP source port value.
28cb9375 2852 If tftpsrcp isn't defined, the normal pseudo-random port
ecb0ccd9
WD
2853 number generator is used.
2854
28cb9375
WD
2855 Also, the environment variable tftpdstp is used to supply
2856 the TFTP UDP destination port value. If tftpdstp isn't
2857 defined, the normal port 69 is used.
2858
2859 The purpose for tftpsrcp is to allow a TFTP server to
ecb0ccd9
WD
2860 blindly start the TFTP transfer using the pre-configured
2861 target IP address and UDP port. This has the effect of
2862 "punching through" the (Windows XP) firewall, allowing
2863 the remainder of the TFTP transfer to proceed normally.
2864 A better solution is to properly configure the firewall,
2865 but sometimes that is not allowed.
2866
bf36c5d5
SG
2867- Hashing support:
2868 CONFIG_CMD_HASH
2869
2870 This enables a generic 'hash' command which can produce
2871 hashes / digests from a few algorithms (e.g. SHA1, SHA256).
2872
2873 CONFIG_HASH_VERIFY
2874
2875 Enable the hash verify command (hash -v). This adds to code
2876 size a little.
2877
94e3c8c4 2878 CONFIG_SHA1 - This option enables support of hashing using SHA1
2879 algorithm. The hash is calculated in software.
2880 CONFIG_SHA256 - This option enables support of hashing using
2881 SHA256 algorithm. The hash is calculated in software.
2882 CONFIG_SHA_HW_ACCEL - This option enables hardware acceleration
2883 for SHA1/SHA256 hashing.
2884 This affects the 'hash' command and also the
2885 hash_lookup_algo() function.
2886 CONFIG_SHA_PROG_HW_ACCEL - This option enables
2887 hardware-acceleration for SHA1/SHA256 progressive hashing.
2888 Data can be streamed in a block at a time and the hashing
2889 is performed in hardware.
bf36c5d5
SG
2890
2891 Note: There is also a sha1sum command, which should perhaps
2892 be deprecated in favour of 'hash sha1'.
2893
a11f1873
RW
2894- Freescale i.MX specific commands:
2895 CONFIG_CMD_HDMIDETECT
2896 This enables 'hdmidet' command which returns true if an
2897 HDMI monitor is detected. This command is i.MX 6 specific.
2898
2899 CONFIG_CMD_BMODE
2900 This enables the 'bmode' (bootmode) command for forcing
2901 a boot from specific media.
2902
2903 This is useful for forcing the ROM's usb downloader to
2904 activate upon a watchdog reset which is nice when iterating
2905 on U-Boot. Using the reset button or running bmode normal
2906 will set it back to normal. This command currently
2907 supports i.MX53 and i.MX6.
2908
9e50c406
HS
2909- bootcount support:
2910 CONFIG_BOOTCOUNT_LIMIT
2911
2912 This enables the bootcounter support, see:
2913 http://www.denx.de/wiki/DULG/UBootBootCountLimit
2914
2915 CONFIG_AT91SAM9XE
2916 enable special bootcounter support on at91sam9xe based boards.
2917 CONFIG_BLACKFIN
2918 enable special bootcounter support on blackfin based boards.
2919 CONFIG_SOC_DA8XX
2920 enable special bootcounter support on da850 based boards.
2921 CONFIG_BOOTCOUNT_RAM
2922 enable support for the bootcounter in RAM
2923 CONFIG_BOOTCOUNT_I2C
2924 enable support for the bootcounter on an i2c (like RTC) device.
2925 CONFIG_SYS_I2C_RTC_ADDR = i2c chip address
2926 CONFIG_SYS_BOOTCOUNT_ADDR = i2c addr which is used for
2927 the bootcounter.
2928 CONFIG_BOOTCOUNT_ALEN = address len
19c402af 2929
a8c7c708 2930- Show boot progress:
c609719b
WD
2931 CONFIG_SHOW_BOOT_PROGRESS
2932
43d9616c
WD
2933 Defining this option allows to add some board-
2934 specific code (calling a user-provided function
2935 "show_boot_progress(int)") that enables you to show
2936 the system's boot progress on some display (for
2937 example, some LED's) on your board. At the moment,
2938 the following checkpoints are implemented:
c609719b 2939
94fd1316 2940
1372cce2
MB
2941Legacy uImage format:
2942
c609719b
WD
2943 Arg Where When
2944 1 common/cmd_bootm.c before attempting to boot an image
ba56f625 2945 -1 common/cmd_bootm.c Image header has bad magic number
c609719b 2946 2 common/cmd_bootm.c Image header has correct magic number
ba56f625 2947 -2 common/cmd_bootm.c Image header has bad checksum
c609719b 2948 3 common/cmd_bootm.c Image header has correct checksum
ba56f625 2949 -3 common/cmd_bootm.c Image data has bad checksum
c609719b
WD
2950 4 common/cmd_bootm.c Image data has correct checksum
2951 -4 common/cmd_bootm.c Image is for unsupported architecture
2952 5 common/cmd_bootm.c Architecture check OK
1372cce2 2953 -5 common/cmd_bootm.c Wrong Image Type (not kernel, multi)
c609719b
WD
2954 6 common/cmd_bootm.c Image Type check OK
2955 -6 common/cmd_bootm.c gunzip uncompression error
2956 -7 common/cmd_bootm.c Unimplemented compression type
2957 7 common/cmd_bootm.c Uncompression OK
1372cce2 2958 8 common/cmd_bootm.c No uncompress/copy overwrite error
c609719b 2959 -9 common/cmd_bootm.c Unsupported OS (not Linux, BSD, VxWorks, QNX)
1372cce2
MB
2960
2961 9 common/image.c Start initial ramdisk verification
2962 -10 common/image.c Ramdisk header has bad magic number
2963 -11 common/image.c Ramdisk header has bad checksum
2964 10 common/image.c Ramdisk header is OK
2965 -12 common/image.c Ramdisk data has bad checksum
2966 11 common/image.c Ramdisk data has correct checksum
2967 12 common/image.c Ramdisk verification complete, start loading
11ccc33f 2968 -13 common/image.c Wrong Image Type (not PPC Linux ramdisk)
1372cce2
MB
2969 13 common/image.c Start multifile image verification
2970 14 common/image.c No initial ramdisk, no multifile, continue.
2971
c0f40859 2972 15 arch/<arch>/lib/bootm.c All preparation done, transferring control to OS
c609719b 2973
a47a12be 2974 -30 arch/powerpc/lib/board.c Fatal error, hang the system
11dadd54
WD
2975 -31 post/post.c POST test failed, detected by post_output_backlog()
2976 -32 post/post.c POST test failed, detected by post_run_single()
63e73c9a 2977
566a494f
HS
2978 34 common/cmd_doc.c before loading a Image from a DOC device
2979 -35 common/cmd_doc.c Bad usage of "doc" command
2980 35 common/cmd_doc.c correct usage of "doc" command
2981 -36 common/cmd_doc.c No boot device
2982 36 common/cmd_doc.c correct boot device
2983 -37 common/cmd_doc.c Unknown Chip ID on boot device
2984 37 common/cmd_doc.c correct chip ID found, device available
2985 -38 common/cmd_doc.c Read Error on boot device
2986 38 common/cmd_doc.c reading Image header from DOC device OK
2987 -39 common/cmd_doc.c Image header has bad magic number
2988 39 common/cmd_doc.c Image header has correct magic number
2989 -40 common/cmd_doc.c Error reading Image from DOC device
2990 40 common/cmd_doc.c Image header has correct magic number
2991 41 common/cmd_ide.c before loading a Image from a IDE device
2992 -42 common/cmd_ide.c Bad usage of "ide" command
2993 42 common/cmd_ide.c correct usage of "ide" command
2994 -43 common/cmd_ide.c No boot device
2995 43 common/cmd_ide.c boot device found
2996 -44 common/cmd_ide.c Device not available
2997 44 common/cmd_ide.c Device available
2998 -45 common/cmd_ide.c wrong partition selected
2999 45 common/cmd_ide.c partition selected
3000 -46 common/cmd_ide.c Unknown partition table
3001 46 common/cmd_ide.c valid partition table found
3002 -47 common/cmd_ide.c Invalid partition type
3003 47 common/cmd_ide.c correct partition type
3004 -48 common/cmd_ide.c Error reading Image Header on boot device
3005 48 common/cmd_ide.c reading Image Header from IDE device OK
3006 -49 common/cmd_ide.c Image header has bad magic number
3007 49 common/cmd_ide.c Image header has correct magic number
3008 -50 common/cmd_ide.c Image header has bad checksum
3009 50 common/cmd_ide.c Image header has correct checksum
3010 -51 common/cmd_ide.c Error reading Image from IDE device
3011 51 common/cmd_ide.c reading Image from IDE device OK
3012 52 common/cmd_nand.c before loading a Image from a NAND device
3013 -53 common/cmd_nand.c Bad usage of "nand" command
3014 53 common/cmd_nand.c correct usage of "nand" command
3015 -54 common/cmd_nand.c No boot device
3016 54 common/cmd_nand.c boot device found
3017 -55 common/cmd_nand.c Unknown Chip ID on boot device
3018 55 common/cmd_nand.c correct chip ID found, device available
3019 -56 common/cmd_nand.c Error reading Image Header on boot device
3020 56 common/cmd_nand.c reading Image Header from NAND device OK
3021 -57 common/cmd_nand.c Image header has bad magic number
3022 57 common/cmd_nand.c Image header has correct magic number
3023 -58 common/cmd_nand.c Error reading Image from NAND device
3024 58 common/cmd_nand.c reading Image from NAND device OK
3025
3026 -60 common/env_common.c Environment has a bad CRC, using default
3027
11ccc33f 3028 64 net/eth.c starting with Ethernet configuration.
566a494f
HS
3029 -64 net/eth.c no Ethernet found.
3030 65 net/eth.c Ethernet found.
3031
3032 -80 common/cmd_net.c usage wrong
bc0571fc
JH
3033 80 common/cmd_net.c before calling net_loop()
3034 -81 common/cmd_net.c some error in net_loop() occurred
3035 81 common/cmd_net.c net_loop() back without error
566a494f
HS
3036 -82 common/cmd_net.c size == 0 (File with size 0 loaded)
3037 82 common/cmd_net.c trying automatic boot
74de7aef
WD
3038 83 common/cmd_net.c running "source" command
3039 -83 common/cmd_net.c some error in automatic boot or "source" command
566a494f 3040 84 common/cmd_net.c end without errors
c609719b 3041
1372cce2
MB
3042FIT uImage format:
3043
3044 Arg Where When
3045 100 common/cmd_bootm.c Kernel FIT Image has correct format
3046 -100 common/cmd_bootm.c Kernel FIT Image has incorrect format
3047 101 common/cmd_bootm.c No Kernel subimage unit name, using configuration
3048 -101 common/cmd_bootm.c Can't get configuration for kernel subimage
3049 102 common/cmd_bootm.c Kernel unit name specified
3050 -103 common/cmd_bootm.c Can't get kernel subimage node offset
f773bea8 3051 103 common/cmd_bootm.c Found configuration node
1372cce2
MB
3052 104 common/cmd_bootm.c Got kernel subimage node offset
3053 -104 common/cmd_bootm.c Kernel subimage hash verification failed
3054 105 common/cmd_bootm.c Kernel subimage hash verification OK
3055 -105 common/cmd_bootm.c Kernel subimage is for unsupported architecture
3056 106 common/cmd_bootm.c Architecture check OK
11ccc33f
MZ
3057 -106 common/cmd_bootm.c Kernel subimage has wrong type
3058 107 common/cmd_bootm.c Kernel subimage type OK
1372cce2
MB
3059 -107 common/cmd_bootm.c Can't get kernel subimage data/size
3060 108 common/cmd_bootm.c Got kernel subimage data/size
3061 -108 common/cmd_bootm.c Wrong image type (not legacy, FIT)
3062 -109 common/cmd_bootm.c Can't get kernel subimage type
3063 -110 common/cmd_bootm.c Can't get kernel subimage comp
3064 -111 common/cmd_bootm.c Can't get kernel subimage os
3065 -112 common/cmd_bootm.c Can't get kernel subimage load address
3066 -113 common/cmd_bootm.c Image uncompress/copy overwrite error
3067
3068 120 common/image.c Start initial ramdisk verification
3069 -120 common/image.c Ramdisk FIT image has incorrect format
3070 121 common/image.c Ramdisk FIT image has correct format
11ccc33f 3071 122 common/image.c No ramdisk subimage unit name, using configuration
1372cce2
MB
3072 -122 common/image.c Can't get configuration for ramdisk subimage
3073 123 common/image.c Ramdisk unit name specified
3074 -124 common/image.c Can't get ramdisk subimage node offset
3075 125 common/image.c Got ramdisk subimage node offset
3076 -125 common/image.c Ramdisk subimage hash verification failed
3077 126 common/image.c Ramdisk subimage hash verification OK
3078 -126 common/image.c Ramdisk subimage for unsupported architecture
3079 127 common/image.c Architecture check OK
3080 -127 common/image.c Can't get ramdisk subimage data/size
3081 128 common/image.c Got ramdisk subimage data/size
3082 129 common/image.c Can't get ramdisk load address
3083 -129 common/image.c Got ramdisk load address
3084
11ccc33f 3085 -130 common/cmd_doc.c Incorrect FIT image format
1372cce2
MB
3086 131 common/cmd_doc.c FIT image format OK
3087
11ccc33f 3088 -140 common/cmd_ide.c Incorrect FIT image format
1372cce2
MB
3089 141 common/cmd_ide.c FIT image format OK
3090
11ccc33f 3091 -150 common/cmd_nand.c Incorrect FIT image format
1372cce2
MB
3092 151 common/cmd_nand.c FIT image format OK
3093
21d29f7f
HS
3094- legacy image format:
3095 CONFIG_IMAGE_FORMAT_LEGACY
3096 enables the legacy image format support in U-Boot.
3097
3098 Default:
3099 enabled if CONFIG_FIT_SIGNATURE is not defined.
3100
3101 CONFIG_DISABLE_IMAGE_LEGACY
3102 disable the legacy image format
3103
3104 This define is introduced, as the legacy image format is
3105 enabled per default for backward compatibility.
3106
d95f6ec7 3107- FIT image support:
9a4f479b
DE
3108 CONFIG_FIT_DISABLE_SHA256
3109 Supporting SHA256 hashes has quite an impact on binary size.
3110 For constrained systems sha256 hash support can be disabled
3111 with this option.
3112
73223f0e
SG
3113 TODO(sjg@chromium.org): Adjust this option to be positive,
3114 and move it to Kconfig
3115
4cf2609b
WD
3116- Standalone program support:
3117 CONFIG_STANDALONE_LOAD_ADDR
3118
6feff899
WD
3119 This option defines a board specific value for the
3120 address where standalone program gets loaded, thus
3121 overwriting the architecture dependent default
4cf2609b
WD
3122 settings.
3123
3124- Frame Buffer Address:
3125 CONFIG_FB_ADDR
3126
3127 Define CONFIG_FB_ADDR if you want to use specific
44a53b57
WD
3128 address for frame buffer. This is typically the case
3129 when using a graphics controller has separate video
3130 memory. U-Boot will then place the frame buffer at
3131 the given address instead of dynamically reserving it
3132 in system RAM by calling lcd_setmem(), which grabs
3133 the memory for the frame buffer depending on the
3134 configured panel size.
4cf2609b
WD
3135
3136 Please see board_init_f function.
3137
cccfc2ab
DZ
3138- Automatic software updates via TFTP server
3139 CONFIG_UPDATE_TFTP
3140 CONFIG_UPDATE_TFTP_CNT_MAX
3141 CONFIG_UPDATE_TFTP_MSEC_MAX
3142
3143 These options enable and control the auto-update feature;
3144 for a more detailed description refer to doc/README.update.
3145
3146- MTD Support (mtdparts command, UBI support)
3147 CONFIG_MTD_DEVICE
3148
3149 Adds the MTD device infrastructure from the Linux kernel.
3150 Needed for mtdparts command support.
3151
3152 CONFIG_MTD_PARTITIONS
3153
3154 Adds the MTD partitioning infrastructure from the Linux
3155 kernel. Needed for UBI support.
3156
70c219cd
JH
3157- UBI support
3158 CONFIG_CMD_UBI
3159
3160 Adds commands for interacting with MTD partitions formatted
3161 with the UBI flash translation layer
3162
3163 Requires also defining CONFIG_RBTREE
3164
147162da
JH
3165 CONFIG_UBI_SILENCE_MSG
3166
3167 Make the verbose messages from UBI stop printing. This leaves
3168 warnings and errors enabled.
3169
ff94bc40
HS
3170
3171 CONFIG_MTD_UBI_WL_THRESHOLD
3172 This parameter defines the maximum difference between the highest
3173 erase counter value and the lowest erase counter value of eraseblocks
3174 of UBI devices. When this threshold is exceeded, UBI starts performing
3175 wear leveling by means of moving data from eraseblock with low erase
3176 counter to eraseblocks with high erase counter.
3177
3178 The default value should be OK for SLC NAND flashes, NOR flashes and
3179 other flashes which have eraseblock life-cycle 100000 or more.
3180 However, in case of MLC NAND flashes which typically have eraseblock
3181 life-cycle less than 10000, the threshold should be lessened (e.g.,
3182 to 128 or 256, although it does not have to be power of 2).
3183
3184 default: 4096
c654b517 3185
ff94bc40
HS
3186 CONFIG_MTD_UBI_BEB_LIMIT
3187 This option specifies the maximum bad physical eraseblocks UBI
3188 expects on the MTD device (per 1024 eraseblocks). If the
3189 underlying flash does not admit of bad eraseblocks (e.g. NOR
3190 flash), this value is ignored.
3191
3192 NAND datasheets often specify the minimum and maximum NVM
3193 (Number of Valid Blocks) for the flashes' endurance lifetime.
3194 The maximum expected bad eraseblocks per 1024 eraseblocks
3195 then can be calculated as "1024 * (1 - MinNVB / MaxNVB)",
3196 which gives 20 for most NANDs (MaxNVB is basically the total
3197 count of eraseblocks on the chip).
3198
3199 To put it differently, if this value is 20, UBI will try to
3200 reserve about 1.9% of physical eraseblocks for bad blocks
3201 handling. And that will be 1.9% of eraseblocks on the entire
3202 NAND chip, not just the MTD partition UBI attaches. This means
3203 that if you have, say, a NAND flash chip admits maximum 40 bad
3204 eraseblocks, and it is split on two MTD partitions of the same
3205 size, UBI will reserve 40 eraseblocks when attaching a
3206 partition.
3207
3208 default: 20
3209
3210 CONFIG_MTD_UBI_FASTMAP
3211 Fastmap is a mechanism which allows attaching an UBI device
3212 in nearly constant time. Instead of scanning the whole MTD device it
3213 only has to locate a checkpoint (called fastmap) on the device.
3214 The on-flash fastmap contains all information needed to attach
3215 the device. Using fastmap makes only sense on large devices where
3216 attaching by scanning takes long. UBI will not automatically install
3217 a fastmap on old images, but you can set the UBI parameter
3218 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT to 1 if you want so. Please note
3219 that fastmap-enabled images are still usable with UBI implementations
3220 without fastmap support. On typical flash devices the whole fastmap
3221 fits into one PEB. UBI will reserve PEBs to hold two fastmaps.
3222
3223 CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT
3224 Set this parameter to enable fastmap automatically on images
3225 without a fastmap.
3226 default: 0
3227
0195a7bb
HS
3228 CONFIG_MTD_UBI_FM_DEBUG
3229 Enable UBI fastmap debug
3230 default: 0
3231
70c219cd
JH
3232- UBIFS support
3233 CONFIG_CMD_UBIFS
3234
3235 Adds commands for interacting with UBI volumes formatted as
3236 UBIFS. UBIFS is read-only in u-boot.
3237
3238 Requires UBI support as well as CONFIG_LZO
3239
147162da
JH
3240 CONFIG_UBIFS_SILENCE_MSG
3241
3242 Make the verbose messages from UBIFS stop printing. This leaves
3243 warnings and errors enabled.
3244
6a11cf48 3245- SPL framework
04e5ae79
WD
3246 CONFIG_SPL
3247 Enable building of SPL globally.
6a11cf48 3248
95579793
TR
3249 CONFIG_SPL_LDSCRIPT
3250 LDSCRIPT for linking the SPL binary.
3251
6ebc3461
AA
3252 CONFIG_SPL_MAX_FOOTPRINT
3253 Maximum size in memory allocated to the SPL, BSS included.
3254 When defined, the linker checks that the actual memory
3255 used by SPL from _start to __bss_end does not exceed it.
8960af8b 3256 CONFIG_SPL_MAX_FOOTPRINT and CONFIG_SPL_BSS_MAX_SIZE
6ebc3461
AA
3257 must not be both defined at the same time.
3258
95579793 3259 CONFIG_SPL_MAX_SIZE
6ebc3461
AA
3260 Maximum size of the SPL image (text, data, rodata, and
3261 linker lists sections), BSS excluded.
3262 When defined, the linker checks that the actual size does
3263 not exceed it.
95579793 3264
04e5ae79
WD
3265 CONFIG_SPL_TEXT_BASE
3266 TEXT_BASE for linking the SPL binary.
6a11cf48 3267
94a45bb1
SW
3268 CONFIG_SPL_RELOC_TEXT_BASE
3269 Address to relocate to. If unspecified, this is equal to
3270 CONFIG_SPL_TEXT_BASE (i.e. no relocation is done).
3271
95579793
TR
3272 CONFIG_SPL_BSS_START_ADDR
3273 Link address for the BSS within the SPL binary.
3274
3275 CONFIG_SPL_BSS_MAX_SIZE
6ebc3461
AA
3276 Maximum size in memory allocated to the SPL BSS.
3277 When defined, the linker checks that the actual memory used
3278 by SPL from __bss_start to __bss_end does not exceed it.
8960af8b 3279 CONFIG_SPL_MAX_FOOTPRINT and CONFIG_SPL_BSS_MAX_SIZE
6ebc3461 3280 must not be both defined at the same time.
95579793
TR
3281
3282 CONFIG_SPL_STACK
3283 Adress of the start of the stack SPL will use
3284
8c80eb3b
AA
3285 CONFIG_SPL_PANIC_ON_RAW_IMAGE
3286 When defined, SPL will panic() if the image it has
3287 loaded does not have a signature.
3288 Defining this is useful when code which loads images
3289 in SPL cannot guarantee that absolutely all read errors
3290 will be caught.
3291 An example is the LPC32XX MLC NAND driver, which will
3292 consider that a completely unreadable NAND block is bad,
3293 and thus should be skipped silently.
3294
e0727515
MV
3295 CONFIG_SPL_ABORT_ON_RAW_IMAGE
3296 When defined, SPL will proceed to another boot method
3297 if the image it has loaded does not have a signature.
3298
94a45bb1
SW
3299 CONFIG_SPL_RELOC_STACK
3300 Adress of the start of the stack SPL will use after
3301 relocation. If unspecified, this is equal to
3302 CONFIG_SPL_STACK.
3303
95579793
TR
3304 CONFIG_SYS_SPL_MALLOC_START
3305 Starting address of the malloc pool used in SPL.
9ac4fc82
FE
3306 When this option is set the full malloc is used in SPL and
3307 it is set up by spl_init() and before that, the simple malloc()
3308 can be used if CONFIG_SYS_MALLOC_F is defined.
95579793
TR
3309
3310 CONFIG_SYS_SPL_MALLOC_SIZE
3311 The size of the malloc pool used in SPL.
6a11cf48 3312
47f7bcae
TR
3313 CONFIG_SPL_FRAMEWORK
3314 Enable the SPL framework under common/. This framework
3315 supports MMC, NAND and YMODEM loading of U-Boot and NAND
3316 NAND loading of the Linux Kernel.
3317
9607faf2
TR
3318 CONFIG_SPL_OS_BOOT
3319 Enable booting directly to an OS from SPL.
3320 See also: doc/README.falcon
3321
861a86f4
TR
3322 CONFIG_SPL_DISPLAY_PRINT
3323 For ARM, enable an optional function to print more information
3324 about the running system.
3325
4b919725
SW
3326 CONFIG_SPL_INIT_MINIMAL
3327 Arch init code should be built for a very small image
3328
b97300b6
PK
3329 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION
3330 Partition on the MMC to load U-Boot from when the MMC is being
3331 used in raw mode
3332
2b75b0ad
PK
3333 CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR
3334 Sector to load kernel uImage from when MMC is being
3335 used in raw mode (for Falcon mode)
3336
3337 CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR,
3338 CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS
3339 Sector and number of sectors to load kernel argument
3340 parameters from when MMC is being used in raw mode
3341 (for falcon mode)
3342
e2ccdf89
PK
3343 CONFIG_SYS_MMCSD_FS_BOOT_PARTITION
3344 Partition on the MMC to load U-Boot from when the MMC is being
3345 used in fs mode
3346
fae81c72
GG
3347 CONFIG_SPL_FS_LOAD_PAYLOAD_NAME
3348 Filename to read to load U-Boot when reading from filesystem
3349
3350 CONFIG_SPL_FS_LOAD_KERNEL_NAME
7ad2cc79 3351 Filename to read to load kernel uImage when reading
fae81c72 3352 from filesystem (for Falcon mode)
7ad2cc79 3353
fae81c72 3354 CONFIG_SPL_FS_LOAD_ARGS_NAME
7ad2cc79 3355 Filename to read to load kernel argument parameters
fae81c72 3356 when reading from filesystem (for Falcon mode)
7ad2cc79 3357
06f60ae3
SW
3358 CONFIG_SPL_MPC83XX_WAIT_FOR_NAND
3359 Set this for NAND SPL on PPC mpc83xx targets, so that
3360 start.S waits for the rest of the SPL to load before
3361 continuing (the hardware starts execution after just
3362 loading the first page rather than the full 4K).
3363
651fcf60
PK
3364 CONFIG_SPL_SKIP_RELOCATE
3365 Avoid SPL relocation
3366
6f2f01b9
SW
3367 CONFIG_SPL_NAND_BASE
3368 Include nand_base.c in the SPL. Requires
3369 CONFIG_SPL_NAND_DRIVERS.
3370
3371 CONFIG_SPL_NAND_DRIVERS
3372 SPL uses normal NAND drivers, not minimal drivers.
3373
3374 CONFIG_SPL_NAND_ECC
3375 Include standard software ECC in the SPL
3376
95579793 3377 CONFIG_SPL_NAND_SIMPLE
7d4b7955
SW
3378 Support for NAND boot using simple NAND drivers that
3379 expose the cmd_ctrl() interface.
95579793 3380
6f4e7d3c
TG
3381 CONFIG_SPL_UBI
3382 Support for a lightweight UBI (fastmap) scanner and
3383 loader
3384
0c3117b1
HS
3385 CONFIG_SPL_NAND_RAW_ONLY
3386 Support to boot only raw u-boot.bin images. Use this only
3387 if you need to save space.
3388
7c8eea59
YZ
3389 CONFIG_SPL_COMMON_INIT_DDR
3390 Set for common ddr init with serial presence detect in
3391 SPL binary.
3392
95579793
TR
3393 CONFIG_SYS_NAND_5_ADDR_CYCLE, CONFIG_SYS_NAND_PAGE_COUNT,
3394 CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE,
3395 CONFIG_SYS_NAND_BLOCK_SIZE, CONFIG_SYS_NAND_BAD_BLOCK_POS,
3396 CONFIG_SYS_NAND_ECCPOS, CONFIG_SYS_NAND_ECCSIZE,
3397 CONFIG_SYS_NAND_ECCBYTES
3398 Defines the size and behavior of the NAND that SPL uses
7d4b7955 3399 to read U-Boot
95579793 3400
fbe76ae4
PK
3401 CONFIG_SPL_NAND_BOOT
3402 Add support NAND boot
3403
95579793 3404 CONFIG_SYS_NAND_U_BOOT_OFFS
7d4b7955
SW
3405 Location in NAND to read U-Boot from
3406
3407 CONFIG_SYS_NAND_U_BOOT_DST
3408 Location in memory to load U-Boot to
3409
3410 CONFIG_SYS_NAND_U_BOOT_SIZE
3411 Size of image to load
95579793
TR
3412
3413 CONFIG_SYS_NAND_U_BOOT_START
7d4b7955 3414 Entry point in loaded image to jump to
95579793
TR
3415
3416 CONFIG_SYS_NAND_HW_ECC_OOBFIRST
3417 Define this if you need to first read the OOB and then the
b445bbb4 3418 data. This is used, for example, on davinci platforms.
95579793
TR
3419
3420 CONFIG_SPL_OMAP3_ID_NAND
3421 Support for an OMAP3-specific set of functions to return the
3422 ID and MFR of the first attached NAND chip, if present.
3423
c57b953d
PM
3424 CONFIG_SPL_RAM_DEVICE
3425 Support for running image already present in ram, in SPL binary
6a11cf48 3426
74752baa 3427 CONFIG_SPL_PAD_TO
6113d3f2
BT
3428 Image offset to which the SPL should be padded before appending
3429 the SPL payload. By default, this is defined as
3430 CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined.
3431 CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL
3432 payload without any padding, or >= CONFIG_SPL_MAX_SIZE.
74752baa 3433
ca2fca22
SW
3434 CONFIG_SPL_TARGET
3435 Final target image containing SPL and payload. Some SPLs
3436 use an arch-specific makefile fragment instead, for
3437 example if more than one image needs to be produced.
3438
87ebee39
SG
3439 CONFIG_FIT_SPL_PRINT
3440 Printing information about a FIT image adds quite a bit of
3441 code to SPL. So this is normally disabled in SPL. Use this
3442 option to re-enable it. This will affect the output of the
3443 bootm command when booting a FIT image.
3444
3aa29de0
YZ
3445- TPL framework
3446 CONFIG_TPL
3447 Enable building of TPL globally.
3448
3449 CONFIG_TPL_PAD_TO
3450 Image offset to which the TPL should be padded before appending
3451 the TPL payload. By default, this is defined as
93e14596
WD
3452 CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined.
3453 CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL
3454 payload without any padding, or >= CONFIG_SPL_MAX_SIZE.
3aa29de0 3455
a8c7c708
WD
3456- Interrupt support (PPC):
3457
d4ca31c4
WD
3458 There are common interrupt_init() and timer_interrupt()
3459 for all PPC archs. interrupt_init() calls interrupt_init_cpu()
11ccc33f 3460 for CPU specific initialization. interrupt_init_cpu()
d4ca31c4 3461 should set decrementer_count to appropriate value. If
11ccc33f 3462 CPU resets decrementer automatically after interrupt
d4ca31c4 3463 (ppc4xx) it should set decrementer_count to zero.
11ccc33f 3464 timer_interrupt() calls timer_interrupt_cpu() for CPU
d4ca31c4
WD
3465 specific handling. If board has watchdog / status_led
3466 / other_activity_monitor it works automatically from
3467 general timer_interrupt().
a8c7c708 3468
c609719b 3469
9660e442
HR
3470Board initialization settings:
3471------------------------------
3472
3473During Initialization u-boot calls a number of board specific functions
3474to allow the preparation of board specific prerequisites, e.g. pin setup
3475before drivers are initialized. To enable these callbacks the
3476following configuration macros have to be defined. Currently this is
3477architecture specific, so please check arch/your_architecture/lib/board.c
3478typically in board_init_f() and board_init_r().
3479
3480- CONFIG_BOARD_EARLY_INIT_F: Call board_early_init_f()
3481- CONFIG_BOARD_EARLY_INIT_R: Call board_early_init_r()
3482- CONFIG_BOARD_LATE_INIT: Call board_late_init()
3483- CONFIG_BOARD_POSTCLK_INIT: Call board_postclk_init()
c609719b 3484
c609719b
WD
3485Configuration Settings:
3486-----------------------
3487
4d1fd7f1
YS
3488- CONFIG_SYS_SUPPORT_64BIT_DATA: Defined automatically if compiled as 64-bit.
3489 Optionally it can be defined to support 64-bit memory commands.
3490
6d0f6bcf 3491- CONFIG_SYS_LONGHELP: Defined when you want long help messages included;
c609719b
WD
3492 undefine this when you're short of memory.
3493
2fb2604d
PT
3494- CONFIG_SYS_HELP_CMD_WIDTH: Defined when you want to override the default
3495 width of the commands listed in the 'help' command output.
3496
6d0f6bcf 3497- CONFIG_SYS_PROMPT: This is what U-Boot prints on the console to
c609719b
WD
3498 prompt for user input.
3499
6d0f6bcf 3500- CONFIG_SYS_CBSIZE: Buffer size for input from the Console
c609719b 3501
6d0f6bcf 3502- CONFIG_SYS_PBSIZE: Buffer size for Console output
c609719b 3503
6d0f6bcf 3504- CONFIG_SYS_MAXARGS: max. Number of arguments accepted for monitor commands
c609719b 3505
6d0f6bcf 3506- CONFIG_SYS_BARGSIZE: Buffer size for Boot Arguments which are passed to
c609719b
WD
3507 the application (usually a Linux kernel) when it is
3508 booted
3509
6d0f6bcf 3510- CONFIG_SYS_BAUDRATE_TABLE:
c609719b
WD
3511 List of legal baudrate settings for this board.
3512
6d0f6bcf 3513- CONFIG_SYS_MEMTEST_START, CONFIG_SYS_MEMTEST_END:
c609719b
WD
3514 Begin and End addresses of the area used by the
3515 simple memory test.
3516
6d0f6bcf 3517- CONFIG_SYS_ALT_MEMTEST:
8bde7f77 3518 Enable an alternate, more extensive memory test.
c609719b 3519
6d0f6bcf 3520- CONFIG_SYS_MEMTEST_SCRATCH:
5f535fe1
WD
3521 Scratch address used by the alternate memory test
3522 You only need to set this if address zero isn't writeable
3523
e8149522 3524- CONFIG_SYS_MEM_RESERVE_SECURE
e61a7534 3525 Only implemented for ARMv8 for now.
e8149522
YS
3526 If defined, the size of CONFIG_SYS_MEM_RESERVE_SECURE memory
3527 is substracted from total RAM and won't be reported to OS.
3528 This memory can be used as secure memory. A variable
e61a7534 3529 gd->arch.secure_ram is used to track the location. In systems
e8149522
YS
3530 the RAM base is not zero, or RAM is divided into banks,
3531 this variable needs to be recalcuated to get the address.
3532
aabd7ddb 3533- CONFIG_SYS_MEM_TOP_HIDE:
6d0f6bcf 3534 If CONFIG_SYS_MEM_TOP_HIDE is defined in the board config header,
14f73ca6 3535 this specified memory area will get subtracted from the top
11ccc33f 3536 (end) of RAM and won't get "touched" at all by U-Boot. By
14f73ca6
SR
3537 fixing up gd->ram_size the Linux kernel should gets passed
3538 the now "corrected" memory size and won't touch it either.
3539 This should work for arch/ppc and arch/powerpc. Only Linux
5e12e75d 3540 board ports in arch/powerpc with bootwrapper support that
14f73ca6 3541 recalculate the memory size from the SDRAM controller setup
5e12e75d 3542 will have to get fixed in Linux additionally.
14f73ca6
SR
3543
3544 This option can be used as a workaround for the 440EPx/GRx
3545 CHIP 11 errata where the last 256 bytes in SDRAM shouldn't
3546 be touched.
3547
3548 WARNING: Please make sure that this value is a multiple of
3549 the Linux page size (normally 4k). If this is not the case,
3550 then the end address of the Linux memory will be located at a
3551 non page size aligned address and this could cause major
3552 problems.
3553
6d0f6bcf 3554- CONFIG_SYS_LOADS_BAUD_CHANGE:
c609719b
WD
3555 Enable temporary baudrate change while serial download
3556
6d0f6bcf 3557- CONFIG_SYS_SDRAM_BASE:
c609719b
WD
3558 Physical start address of SDRAM. _Must_ be 0 here.
3559
6d0f6bcf 3560- CONFIG_SYS_FLASH_BASE:
c609719b
WD
3561 Physical start address of Flash memory.
3562
6d0f6bcf 3563- CONFIG_SYS_MONITOR_BASE:
c609719b
WD
3564 Physical start address of boot monitor code (set by
3565 make config files to be same as the text base address
14d0a02a 3566 (CONFIG_SYS_TEXT_BASE) used when linking) - same as
6d0f6bcf 3567 CONFIG_SYS_FLASH_BASE when booting from flash.
c609719b 3568
6d0f6bcf 3569- CONFIG_SYS_MONITOR_LEN:
8bde7f77
WD
3570 Size of memory reserved for monitor code, used to
3571 determine _at_compile_time_ (!) if the environment is
3572 embedded within the U-Boot image, or in a separate
3573 flash sector.
c609719b 3574
6d0f6bcf 3575- CONFIG_SYS_MALLOC_LEN:
c609719b
WD
3576 Size of DRAM reserved for malloc() use.
3577
d59476b6
SG
3578- CONFIG_SYS_MALLOC_F_LEN
3579 Size of the malloc() pool for use before relocation. If
3580 this is defined, then a very simple malloc() implementation
3581 will become available before relocation. The address is just
3582 below the global data, and the stack is moved down to make
3583 space.
3584
3585 This feature allocates regions with increasing addresses
3586 within the region. calloc() is supported, but realloc()
3587 is not available. free() is supported but does nothing.
b445bbb4 3588 The memory will be freed (or in fact just forgotten) when
d59476b6
SG
3589 U-Boot relocates itself.
3590
38687ae6
SG
3591- CONFIG_SYS_MALLOC_SIMPLE
3592 Provides a simple and small malloc() and calloc() for those
3593 boards which do not use the full malloc in SPL (which is
3594 enabled with CONFIG_SYS_SPL_MALLOC_START).
3595
1dfdd9ba
TR
3596- CONFIG_SYS_NONCACHED_MEMORY:
3597 Size of non-cached memory area. This area of memory will be
3598 typically located right below the malloc() area and mapped
3599 uncached in the MMU. This is useful for drivers that would
3600 otherwise require a lot of explicit cache maintenance. For
3601 some drivers it's also impossible to properly maintain the
3602 cache. For example if the regions that need to be flushed
3603 are not a multiple of the cache-line size, *and* padding
3604 cannot be allocated between the regions to align them (i.e.
3605 if the HW requires a contiguous array of regions, and the
3606 size of each region is not cache-aligned), then a flush of
3607 one region may result in overwriting data that hardware has
3608 written to another region in the same cache-line. This can
3609 happen for example in network drivers where descriptors for
3610 buffers are typically smaller than the CPU cache-line (e.g.
3611 16 bytes vs. 32 or 64 bytes).
3612
3613 Non-cached memory is only supported on 32-bit ARM at present.
3614
6d0f6bcf 3615- CONFIG_SYS_BOOTM_LEN:
15940c9a
SR
3616 Normally compressed uImages are limited to an
3617 uncompressed size of 8 MBytes. If this is not enough,
6d0f6bcf 3618 you can define CONFIG_SYS_BOOTM_LEN in your board config file
15940c9a
SR
3619 to adjust this setting to your needs.
3620
6d0f6bcf 3621- CONFIG_SYS_BOOTMAPSZ:
c609719b
WD
3622 Maximum size of memory mapped by the startup code of
3623 the Linux kernel; all data that must be processed by
7d721e34
BS
3624 the Linux kernel (bd_info, boot arguments, FDT blob if
3625 used) must be put below this limit, unless "bootm_low"
1bce2aeb 3626 environment variable is defined and non-zero. In such case
7d721e34 3627 all data for the Linux kernel must be between "bootm_low"
c0f40859 3628 and "bootm_low" + CONFIG_SYS_BOOTMAPSZ. The environment
c3624e6e
GL
3629 variable "bootm_mapsize" will override the value of
3630 CONFIG_SYS_BOOTMAPSZ. If CONFIG_SYS_BOOTMAPSZ is undefined,
3631 then the value in "bootm_size" will be used instead.
c609719b 3632
fca43cc8
JR
3633- CONFIG_SYS_BOOT_RAMDISK_HIGH:
3634 Enable initrd_high functionality. If defined then the
3635 initrd_high feature is enabled and the bootm ramdisk subcommand
3636 is enabled.
3637
3638- CONFIG_SYS_BOOT_GET_CMDLINE:
3639 Enables allocating and saving kernel cmdline in space between
3640 "bootm_low" and "bootm_low" + BOOTMAPSZ.
3641
3642- CONFIG_SYS_BOOT_GET_KBD:
3643 Enables allocating and saving a kernel copy of the bd_info in
3644 space between "bootm_low" and "bootm_low" + BOOTMAPSZ.
3645
6d0f6bcf 3646- CONFIG_SYS_MAX_FLASH_BANKS:
c609719b
WD
3647 Max number of Flash memory banks
3648
6d0f6bcf 3649- CONFIG_SYS_MAX_FLASH_SECT:
c609719b
WD
3650 Max number of sectors on a Flash chip
3651
6d0f6bcf 3652- CONFIG_SYS_FLASH_ERASE_TOUT:
c609719b
WD
3653 Timeout for Flash erase operations (in ms)
3654
6d0f6bcf 3655- CONFIG_SYS_FLASH_WRITE_TOUT:
c609719b
WD
3656 Timeout for Flash write operations (in ms)
3657
6d0f6bcf 3658- CONFIG_SYS_FLASH_LOCK_TOUT
8564acf9
WD
3659 Timeout for Flash set sector lock bit operation (in ms)
3660
6d0f6bcf 3661- CONFIG_SYS_FLASH_UNLOCK_TOUT
8564acf9
WD
3662 Timeout for Flash clear lock bits operation (in ms)
3663
6d0f6bcf 3664- CONFIG_SYS_FLASH_PROTECTION
8564acf9
WD
3665 If defined, hardware flash sectors protection is used
3666 instead of U-Boot software protection.
3667
6d0f6bcf 3668- CONFIG_SYS_DIRECT_FLASH_TFTP:
c609719b
WD
3669
3670 Enable TFTP transfers directly to flash memory;
3671 without this option such a download has to be
3672 performed in two steps: (1) download to RAM, and (2)
3673 copy from RAM to flash.
3674
3675 The two-step approach is usually more reliable, since
3676 you can check if the download worked before you erase
11ccc33f
MZ
3677 the flash, but in some situations (when system RAM is
3678 too limited to allow for a temporary copy of the
c609719b
WD
3679 downloaded image) this option may be very useful.
3680
6d0f6bcf 3681- CONFIG_SYS_FLASH_CFI:
43d9616c 3682 Define if the flash driver uses extra elements in the
5653fc33
WD
3683 common flash structure for storing flash geometry.
3684
00b1883a 3685- CONFIG_FLASH_CFI_DRIVER
5653fc33
WD
3686 This option also enables the building of the cfi_flash driver
3687 in the drivers directory
c609719b 3688
91809ed5
PZ
3689- CONFIG_FLASH_CFI_MTD
3690 This option enables the building of the cfi_mtd driver
3691 in the drivers directory. The driver exports CFI flash
3692 to the MTD layer.
3693
6d0f6bcf 3694- CONFIG_SYS_FLASH_USE_BUFFER_WRITE
96ef831f
GL
3695 Use buffered writes to flash.
3696
3697- CONFIG_FLASH_SPANSION_S29WS_N
3698 s29ws-n MirrorBit flash has non-standard addresses for buffered
3699 write commands.
3700
6d0f6bcf 3701- CONFIG_SYS_FLASH_QUIET_TEST
5568e613
SR
3702 If this option is defined, the common CFI flash doesn't
3703 print it's warning upon not recognized FLASH banks. This
3704 is useful, if some of the configured banks are only
3705 optionally available.
3706
9a042e9c
JVB
3707- CONFIG_FLASH_SHOW_PROGRESS
3708 If defined (must be an integer), print out countdown
3709 digits and dots. Recommended value: 45 (9..1) for 80
3710 column displays, 15 (3..1) for 40 column displays.
3711
352ef3f1
SR
3712- CONFIG_FLASH_VERIFY
3713 If defined, the content of the flash (destination) is compared
3714 against the source after the write operation. An error message
3715 will be printed when the contents are not identical.
3716 Please note that this option is useless in nearly all cases,
3717 since such flash programming errors usually are detected earlier
3718 while unprotecting/erasing/programming. Please only enable
3719 this option if you really know what you are doing.
3720
6d0f6bcf 3721- CONFIG_SYS_RX_ETH_BUFFER:
11ccc33f
MZ
3722 Defines the number of Ethernet receive buffers. On some
3723 Ethernet controllers it is recommended to set this value
53cf9435
SR
3724 to 8 or even higher (EEPRO100 or 405 EMAC), since all
3725 buffers can be full shortly after enabling the interface
11ccc33f 3726 on high Ethernet traffic.
53cf9435
SR
3727 Defaults to 4 if not defined.
3728
ea882baf
WD
3729- CONFIG_ENV_MAX_ENTRIES
3730
071bc923
WD
3731 Maximum number of entries in the hash table that is used
3732 internally to store the environment settings. The default
3733 setting is supposed to be generous and should work in most
3734 cases. This setting can be used to tune behaviour; see
3735 lib/hashtable.c for details.
ea882baf 3736
2598090b
JH
3737- CONFIG_ENV_FLAGS_LIST_DEFAULT
3738- CONFIG_ENV_FLAGS_LIST_STATIC
1bce2aeb 3739 Enable validation of the values given to environment variables when
2598090b
JH
3740 calling env set. Variables can be restricted to only decimal,
3741 hexadecimal, or boolean. If CONFIG_CMD_NET is also defined,
3742 the variables can also be restricted to IP address or MAC address.
3743
3744 The format of the list is:
3745 type_attribute = [s|d|x|b|i|m]
b445bbb4
JM
3746 access_attribute = [a|r|o|c]
3747 attributes = type_attribute[access_attribute]
2598090b
JH
3748 entry = variable_name[:attributes]
3749 list = entry[,list]
3750
3751 The type attributes are:
3752 s - String (default)
3753 d - Decimal
3754 x - Hexadecimal
3755 b - Boolean ([1yYtT|0nNfF])
3756 i - IP address
3757 m - MAC address
3758
267541f7
JH
3759 The access attributes are:
3760 a - Any (default)
3761 r - Read-only
3762 o - Write-once
3763 c - Change-default
3764
2598090b
JH
3765 - CONFIG_ENV_FLAGS_LIST_DEFAULT
3766 Define this to a list (string) to define the ".flags"
b445bbb4 3767 environment variable in the default or embedded environment.
2598090b
JH
3768
3769 - CONFIG_ENV_FLAGS_LIST_STATIC
3770 Define this to a list (string) to define validation that
3771 should be done if an entry is not found in the ".flags"
3772 environment variable. To override a setting in the static
3773 list, simply add an entry for the same variable name to the
3774 ".flags" variable.
3775
bdf1fe4e
JH
3776 If CONFIG_REGEX is defined, the variable_name above is evaluated as a
3777 regular expression. This allows multiple variables to define the same
3778 flags without explicitly listing them for each variable.
3779
267541f7
JH
3780- CONFIG_ENV_ACCESS_IGNORE_FORCE
3781 If defined, don't allow the -f switch to env set override variable
3782 access flags.
3783
0b1b60c7
LV
3784- CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC (OMAP only)
3785 This is set by OMAP boards for the max time that reset should
3786 be asserted. See doc/README.omap-reset-time for details on how
b445bbb4 3787 the value can be calculated on a given board.
632efa74 3788
0d296cc2
GB
3789- CONFIG_USE_STDINT
3790 If stdint.h is available with your toolchain you can define this
3791 option to enable it. You can provide option 'USE_STDINT=1' when
3792 building U-Boot to enable this.
3793
c609719b
WD
3794The following definitions that deal with the placement and management
3795of environment data (variable area); in general, we support the
3796following configurations:
3797
c3eb3fe4
MF
3798- CONFIG_BUILD_ENVCRC:
3799
3800 Builds up envcrc with the target environment so that external utils
3801 may easily extract it and embed it in final U-Boot images.
3802
5a1aceb0 3803- CONFIG_ENV_IS_IN_FLASH:
c609719b
WD
3804
3805 Define this if the environment is in flash memory.
3806
3807 a) The environment occupies one whole flash sector, which is
3808 "embedded" in the text segment with the U-Boot code. This
3809 happens usually with "bottom boot sector" or "top boot
3810 sector" type flash chips, which have several smaller
3811 sectors at the start or the end. For instance, such a
3812 layout can have sector sizes of 8, 2x4, 16, Nx32 kB. In
3813 such a case you would place the environment in one of the
3814 4 kB sectors - with U-Boot code before and after it. With
3815 "top boot sector" type flash chips, you would put the
3816 environment in one of the last sectors, leaving a gap
3817 between U-Boot and the environment.
3818
0e8d1586 3819 - CONFIG_ENV_OFFSET:
c609719b
WD
3820
3821 Offset of environment data (variable area) to the
3822 beginning of flash memory; for instance, with bottom boot
3823 type flash chips the second sector can be used: the offset
3824 for this sector is given here.
3825
6d0f6bcf 3826 CONFIG_ENV_OFFSET is used relative to CONFIG_SYS_FLASH_BASE.
c609719b 3827
0e8d1586 3828 - CONFIG_ENV_ADDR:
c609719b
WD
3829
3830 This is just another way to specify the start address of
3831 the flash sector containing the environment (instead of
0e8d1586 3832 CONFIG_ENV_OFFSET).
c609719b 3833
0e8d1586 3834 - CONFIG_ENV_SECT_SIZE:
c609719b
WD
3835
3836 Size of the sector containing the environment.
3837
3838
3839 b) Sometimes flash chips have few, equal sized, BIG sectors.
3840 In such a case you don't want to spend a whole sector for
3841 the environment.
3842
0e8d1586 3843 - CONFIG_ENV_SIZE:
c609719b 3844
5a1aceb0 3845 If you use this in combination with CONFIG_ENV_IS_IN_FLASH
0e8d1586 3846 and CONFIG_ENV_SECT_SIZE, you can specify to use only a part
c609719b
WD
3847 of this flash sector for the environment. This saves
3848 memory for the RAM copy of the environment.
3849
3850 It may also save flash memory if you decide to use this
3851 when your environment is "embedded" within U-Boot code,
3852 since then the remainder of the flash sector could be used
3853 for U-Boot code. It should be pointed out that this is
3854 STRONGLY DISCOURAGED from a robustness point of view:
3855 updating the environment in flash makes it always
3856 necessary to erase the WHOLE sector. If something goes
3857 wrong before the contents has been restored from a copy in
3858 RAM, your target system will be dead.
3859
0e8d1586
JCPV
3860 - CONFIG_ENV_ADDR_REDUND
3861 CONFIG_ENV_SIZE_REDUND
c609719b 3862
43d9616c 3863 These settings describe a second storage area used to hold
11ccc33f 3864 a redundant copy of the environment data, so that there is
3e38691e 3865 a valid backup copy in case there is a power failure during
43d9616c 3866 a "saveenv" operation.
c609719b
WD
3867
3868BE CAREFUL! Any changes to the flash layout, and some changes to the
3869source code will make it necessary to adapt <board>/u-boot.lds*
3870accordingly!
3871
3872
9314cee6 3873- CONFIG_ENV_IS_IN_NVRAM:
c609719b
WD
3874
3875 Define this if you have some non-volatile memory device
3876 (NVRAM, battery buffered SRAM) which you want to use for the
3877 environment.
3878
0e8d1586
JCPV
3879 - CONFIG_ENV_ADDR:
3880 - CONFIG_ENV_SIZE:
c609719b 3881
11ccc33f 3882 These two #defines are used to determine the memory area you
c609719b
WD
3883 want to use for environment. It is assumed that this memory
3884 can just be read and written to, without any special
3885 provision.
3886
3887BE CAREFUL! The first access to the environment happens quite early
b445bbb4 3888in U-Boot initialization (when we try to get the setting of for the
11ccc33f 3889console baudrate). You *MUST* have mapped your NVRAM area then, or
c609719b
WD
3890U-Boot will hang.
3891
3892Please note that even with NVRAM we still use a copy of the
3893environment in RAM: we could work on NVRAM directly, but we want to
3894keep settings there always unmodified except somebody uses "saveenv"
3895to save the current settings.
3896
3897
bb1f8b4f 3898- CONFIG_ENV_IS_IN_EEPROM:
c609719b
WD
3899
3900 Use this if you have an EEPROM or similar serial access
3901 device and a driver for it.
3902
0e8d1586
JCPV
3903 - CONFIG_ENV_OFFSET:
3904 - CONFIG_ENV_SIZE:
c609719b
WD
3905
3906 These two #defines specify the offset and size of the
3907 environment area within the total memory of your EEPROM.
3908
6d0f6bcf 3909 - CONFIG_SYS_I2C_EEPROM_ADDR:
c609719b
WD
3910 If defined, specified the chip address of the EEPROM device.
3911 The default address is zero.
3912
189d257b
CG
3913 - CONFIG_SYS_I2C_EEPROM_BUS:
3914 If defined, specified the i2c bus of the EEPROM device.
3915
6d0f6bcf 3916 - CONFIG_SYS_EEPROM_PAGE_WRITE_BITS:
c609719b
WD
3917 If defined, the number of bits used to address bytes in a
3918 single page in the EEPROM device. A 64 byte page, for example
3919 would require six bits.
3920
6d0f6bcf 3921 - CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS:
c609719b 3922 If defined, the number of milliseconds to delay between
ba56f625 3923 page writes. The default is zero milliseconds.
c609719b 3924
6d0f6bcf 3925 - CONFIG_SYS_I2C_EEPROM_ADDR_LEN:
c609719b
WD
3926 The length in bytes of the EEPROM memory array address. Note
3927 that this is NOT the chip address length!
3928
6d0f6bcf 3929 - CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW:
5cf91d6b
WD
3930 EEPROM chips that implement "address overflow" are ones
3931 like Catalyst 24WC04/08/16 which has 9/10/11 bits of
3932 address and the extra bits end up in the "chip address" bit
3933 slots. This makes a 24WC08 (1Kbyte) chip look like four 256
3934 byte chips.
3935
3936 Note that we consider the length of the address field to
3937 still be one byte because the extra address bits are hidden
3938 in the chip address.
3939
6d0f6bcf 3940 - CONFIG_SYS_EEPROM_SIZE:
c609719b
WD
3941 The size in bytes of the EEPROM device.
3942
548738b4
HS
3943 - CONFIG_ENV_EEPROM_IS_ON_I2C
3944 define this, if you have I2C and SPI activated, and your
3945 EEPROM, which holds the environment, is on the I2C bus.
3946
3947 - CONFIG_I2C_ENV_EEPROM_BUS
3948 if you have an Environment on an EEPROM reached over
3949 I2C muxes, you can define here, how to reach this
3950 EEPROM. For example:
3951
ea818dbb 3952 #define CONFIG_I2C_ENV_EEPROM_BUS 1
548738b4
HS
3953
3954 EEPROM which holds the environment, is reached over
3955 a pca9547 i2c mux with address 0x70, channel 3.
c609719b 3956
057c849c 3957- CONFIG_ENV_IS_IN_DATAFLASH:
5779d8d9 3958
d4ca31c4 3959 Define this if you have a DataFlash memory device which you
5779d8d9
WD
3960 want to use for the environment.
3961
0e8d1586
JCPV
3962 - CONFIG_ENV_OFFSET:
3963 - CONFIG_ENV_ADDR:
3964 - CONFIG_ENV_SIZE:
5779d8d9
WD
3965
3966 These three #defines specify the offset and size of the
3967 environment area within the total memory of your DataFlash placed
3968 at the specified address.
3969
bd83b592
WJ
3970- CONFIG_ENV_IS_IN_SPI_FLASH:
3971
3972 Define this if you have a SPI Flash memory device which you
3973 want to use for the environment.
3974
3975 - CONFIG_ENV_OFFSET:
3976 - CONFIG_ENV_SIZE:
3977
3978 These two #defines specify the offset and size of the
3979 environment area within the SPI Flash. CONFIG_ENV_OFFSET must be
3980 aligned to an erase sector boundary.
3981
3982 - CONFIG_ENV_SECT_SIZE:
3983
3984 Define the SPI flash's sector size.
3985
3986 - CONFIG_ENV_OFFSET_REDUND (optional):
3987
3988 This setting describes a second storage area of CONFIG_ENV_SIZE
3989 size used to hold a redundant copy of the environment data, so
3990 that there is a valid backup copy in case there is a power failure
9dd05fb8 3991 during a "saveenv" operation. CONFIG_ENV_OFFSET_REDUND must be
bd83b592
WJ
3992 aligned to an erase sector boundary.
3993
3994 - CONFIG_ENV_SPI_BUS (optional):
3995 - CONFIG_ENV_SPI_CS (optional):
3996
3997 Define the SPI bus and chip select. If not defined they will be 0.
3998
3999 - CONFIG_ENV_SPI_MAX_HZ (optional):
4000
4001 Define the SPI max work clock. If not defined then use 1MHz.
4002
4003 - CONFIG_ENV_SPI_MODE (optional):
4004
4005 Define the SPI work mode. If not defined then use SPI_MODE_3.
4006
0a85a9e7
LG
4007- CONFIG_ENV_IS_IN_REMOTE:
4008
4009 Define this if you have a remote memory space which you
4010 want to use for the local device's environment.
4011
4012 - CONFIG_ENV_ADDR:
4013 - CONFIG_ENV_SIZE:
4014
4015 These two #defines specify the address and size of the
4016 environment area within the remote memory space. The
4017 local device can get the environment from remote memory
fc54c7fa 4018 space by SRIO or PCIE links.
0a85a9e7
LG
4019
4020BE CAREFUL! For some special cases, the local device can not use
4021"saveenv" command. For example, the local device will get the
fc54c7fa
LG
4022environment stored in a remote NOR flash by SRIO or PCIE link,
4023but it can not erase, write this NOR flash by SRIO or PCIE interface.
0a85a9e7 4024
51bfee19 4025- CONFIG_ENV_IS_IN_NAND:
13a5695b
WD
4026
4027 Define this if you have a NAND device which you want to use
4028 for the environment.
4029
0e8d1586
JCPV
4030 - CONFIG_ENV_OFFSET:
4031 - CONFIG_ENV_SIZE:
13a5695b
WD
4032
4033 These two #defines specify the offset and size of the environment
fdd813de
SW
4034 area within the first NAND device. CONFIG_ENV_OFFSET must be
4035 aligned to an erase block boundary.
5779d8d9 4036
fdd813de 4037 - CONFIG_ENV_OFFSET_REDUND (optional):
e443c944 4038
0e8d1586 4039 This setting describes a second storage area of CONFIG_ENV_SIZE
fdd813de
SW
4040 size used to hold a redundant copy of the environment data, so
4041 that there is a valid backup copy in case there is a power failure
9dd05fb8 4042 during a "saveenv" operation. CONFIG_ENV_OFFSET_REDUND must be
fdd813de
SW
4043 aligned to an erase block boundary.
4044
4045 - CONFIG_ENV_RANGE (optional):
4046
4047 Specifies the length of the region in which the environment
4048 can be written. This should be a multiple of the NAND device's
4049 block size. Specifying a range with more erase blocks than
4050 are needed to hold CONFIG_ENV_SIZE allows bad blocks within
4051 the range to be avoided.
4052
4053 - CONFIG_ENV_OFFSET_OOB (optional):
4054
4055 Enables support for dynamically retrieving the offset of the
4056 environment from block zero's out-of-band data. The
4057 "nand env.oob" command can be used to record this offset.
4058 Currently, CONFIG_ENV_OFFSET_REDUND is not supported when
4059 using CONFIG_ENV_OFFSET_OOB.
e443c944 4060
b74ab737
GL
4061- CONFIG_NAND_ENV_DST
4062
4063 Defines address in RAM to which the nand_spl code should copy the
4064 environment. If redundant environment is used, it will be copied to
4065 CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE.
4066
2b74433f
JH
4067- CONFIG_ENV_IS_IN_UBI:
4068
4069 Define this if you have an UBI volume that you want to use for the
4070 environment. This has the benefit of wear-leveling the environment
4071 accesses, which is important on NAND.
4072
4073 - CONFIG_ENV_UBI_PART:
4074
4075 Define this to a string that is the mtd partition containing the UBI.
4076
4077 - CONFIG_ENV_UBI_VOLUME:
4078
4079 Define this to the name of the volume that you want to store the
4080 environment in.
4081
785881f7
JH
4082 - CONFIG_ENV_UBI_VOLUME_REDUND:
4083
4084 Define this to the name of another volume to store a second copy of
4085 the environment in. This will enable redundant environments in UBI.
4086 It is assumed that both volumes are in the same MTD partition.
4087
2b74433f
JH
4088 - CONFIG_UBI_SILENCE_MSG
4089 - CONFIG_UBIFS_SILENCE_MSG
4090
4091 You will probably want to define these to avoid a really noisy system
4092 when storing the env in UBI.
4093
d1db76f1
WJ
4094- CONFIG_ENV_IS_IN_FAT:
4095 Define this if you want to use the FAT file system for the environment.
4096
4097 - FAT_ENV_INTERFACE:
4098
4099 Define this to a string that is the name of the block device.
4100
41987784 4101 - FAT_ENV_DEVICE_AND_PART:
d1db76f1
WJ
4102
4103 Define this to a string to specify the partition of the device. It can
4104 be as following:
4105
4106 "D:P", "D:0", "D", "D:" or "D:auto" (D, P are integers. And P >= 1)
4107 - "D:P": device D partition P. Error occurs if device D has no
4108 partition table.
4109 - "D:0": device D.
4110 - "D" or "D:": device D partition 1 if device D has partition
4111 table, or the whole device D if has no partition
4112 table.
4113 - "D:auto": first partition in device D with bootable flag set.
b445bbb4 4114 If none, first valid partition in device D. If no
d1db76f1
WJ
4115 partition table then means device D.
4116
4117 - FAT_ENV_FILE:
4118
4119 It's a string of the FAT file name. This file use to store the
b445bbb4 4120 environment.
d1db76f1
WJ
4121
4122 - CONFIG_FAT_WRITE:
b445bbb4 4123 This should be defined. Otherwise it cannot save the environment file.
d1db76f1 4124
06e4ae5f
SW
4125- CONFIG_ENV_IS_IN_MMC:
4126
4127 Define this if you have an MMC device which you want to use for the
4128 environment.
4129
4130 - CONFIG_SYS_MMC_ENV_DEV:
4131
4132 Specifies which MMC device the environment is stored in.
4133
4134 - CONFIG_SYS_MMC_ENV_PART (optional):
4135
4136 Specifies which MMC partition the environment is stored in. If not
4137 set, defaults to partition 0, the user area. Common values might be
4138 1 (first MMC boot partition), 2 (second MMC boot partition).
4139
4140 - CONFIG_ENV_OFFSET:
4141 - CONFIG_ENV_SIZE:
4142
4143 These two #defines specify the offset and size of the environment
4144 area within the specified MMC device.
4145
5c088ee8
SW
4146 If offset is positive (the usual case), it is treated as relative to
4147 the start of the MMC partition. If offset is negative, it is treated
4148 as relative to the end of the MMC partition. This can be useful if
4149 your board may be fitted with different MMC devices, which have
4150 different sizes for the MMC partitions, and you always want the
4151 environment placed at the very end of the partition, to leave the
4152 maximum possible space before it, to store other data.
4153
06e4ae5f
SW
4154 These two values are in units of bytes, but must be aligned to an
4155 MMC sector boundary.
4156
4157 - CONFIG_ENV_OFFSET_REDUND (optional):
4158
4159 Specifies a second storage area, of CONFIG_ENV_SIZE size, used to
4160 hold a redundant copy of the environment data. This provides a
4161 valid backup copy in case the other copy is corrupted, e.g. due
4162 to a power failure during a "saveenv" operation.
4163
5c088ee8
SW
4164 This value may also be positive or negative; this is handled in the
4165 same way as CONFIG_ENV_OFFSET.
4166
06e4ae5f
SW
4167 This value is also in units of bytes, but must also be aligned to
4168 an MMC sector boundary.
4169
4170 - CONFIG_ENV_SIZE_REDUND (optional):
4171
4172 This value need not be set, even when CONFIG_ENV_OFFSET_REDUND is
4173 set. If this value is set, it must be set to the same value as
4174 CONFIG_ENV_SIZE.
4175
6d0f6bcf 4176- CONFIG_SYS_SPI_INIT_OFFSET
c609719b
WD
4177
4178 Defines offset to the initial SPI buffer area in DPRAM. The
4179 area is used at an early stage (ROM part) if the environment
4180 is configured to reside in the SPI EEPROM: We need a 520 byte
4181 scratch DPRAM area. It is used between the two initialization
4182 calls (spi_init_f() and spi_init_r()). A value of 0xB00 seems
4183 to be a good choice since it makes it far enough from the
4184 start of the data area as well as from the stack pointer.
4185
e881cb56 4186Please note that the environment is read-only until the monitor
c609719b 4187has been relocated to RAM and a RAM copy of the environment has been
cdb74977 4188created; also, when using EEPROM you will have to use getenv_f()
c609719b
WD
4189until then to read environment variables.
4190
85ec0bcc
WD
4191The environment is protected by a CRC32 checksum. Before the monitor
4192is relocated into RAM, as a result of a bad CRC you will be working
4193with the compiled-in default environment - *silently*!!! [This is
4194necessary, because the first environment variable we need is the
4195"baudrate" setting for the console - if we have a bad CRC, we don't
4196have any device yet where we could complain.]
c609719b
WD
4197
4198Note: once the monitor has been relocated, then it will complain if
4199the default environment is used; a new CRC is computed as soon as you
85ec0bcc 4200use the "saveenv" command to store a valid environment.
c609719b 4201
6d0f6bcf 4202- CONFIG_SYS_FAULT_ECHO_LINK_DOWN:
42d1f039 4203 Echo the inverted Ethernet link state to the fault LED.
fc3e2165 4204
6d0f6bcf 4205 Note: If this option is active, then CONFIG_SYS_FAULT_MII_ADDR
fc3e2165
WD
4206 also needs to be defined.
4207
6d0f6bcf 4208- CONFIG_SYS_FAULT_MII_ADDR:
42d1f039 4209 MII address of the PHY to check for the Ethernet link state.
c609719b 4210
f5675aa5
RM
4211- CONFIG_NS16550_MIN_FUNCTIONS:
4212 Define this if you desire to only have use of the NS16550_init
4213 and NS16550_putc functions for the serial driver located at
4214 drivers/serial/ns16550.c. This option is useful for saving
4215 space for already greatly restricted images, including but not
4216 limited to NAND_SPL configurations.
4217
b2b92f53
SG
4218- CONFIG_DISPLAY_BOARDINFO
4219 Display information about the board that U-Boot is running on
4220 when U-Boot starts up. The board function checkboard() is called
4221 to do this.
4222
e2e3e2b1
SG
4223- CONFIG_DISPLAY_BOARDINFO_LATE
4224 Similar to the previous option, but display this information
4225 later, once stdio is running and output goes to the LCD, if
4226 present.
4227
feb85801
SS
4228- CONFIG_BOARD_SIZE_LIMIT:
4229 Maximum size of the U-Boot image. When defined, the
4230 build system checks that the actual size does not
4231 exceed it.
4232
c609719b 4233Low Level (hardware related) configuration options:
dc7c9a1a 4234---------------------------------------------------
c609719b 4235
6d0f6bcf 4236- CONFIG_SYS_CACHELINE_SIZE:
c609719b
WD
4237 Cache Line Size of the CPU.
4238
6d0f6bcf 4239- CONFIG_SYS_DEFAULT_IMMR:
c609719b 4240 Default address of the IMMR after system reset.
2535d602 4241
42d1f039
WD
4242 Needed on some 8260 systems (MPC8260ADS, PQ2FADS-ZU,
4243 and RPXsuper) to be able to adjust the position of
4244 the IMMR register after a reset.
c609719b 4245
e46fedfe
TT
4246- CONFIG_SYS_CCSRBAR_DEFAULT:
4247 Default (power-on reset) physical address of CCSR on Freescale
4248 PowerPC SOCs.
4249
4250- CONFIG_SYS_CCSRBAR:
4251 Virtual address of CCSR. On a 32-bit build, this is typically
4252 the same value as CONFIG_SYS_CCSRBAR_DEFAULT.
4253
4254 CONFIG_SYS_DEFAULT_IMMR must also be set to this value,
4255 for cross-platform code that uses that macro instead.
4256
4257- CONFIG_SYS_CCSRBAR_PHYS:
4258 Physical address of CCSR. CCSR can be relocated to a new
4259 physical address, if desired. In this case, this macro should
c0f40859 4260 be set to that address. Otherwise, it should be set to the
e46fedfe
TT
4261 same value as CONFIG_SYS_CCSRBAR_DEFAULT. For example, CCSR
4262 is typically relocated on 36-bit builds. It is recommended
4263 that this macro be defined via the _HIGH and _LOW macros:
4264
4265 #define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH
4266 * 1ull) << 32 | CONFIG_SYS_CCSRBAR_PHYS_LOW)
4267
4268- CONFIG_SYS_CCSRBAR_PHYS_HIGH:
4cf2609b
WD
4269 Bits 33-36 of CONFIG_SYS_CCSRBAR_PHYS. This value is typically
4270 either 0 (32-bit build) or 0xF (36-bit build). This macro is
e46fedfe
TT
4271 used in assembly code, so it must not contain typecasts or
4272 integer size suffixes (e.g. "ULL").
4273
4274- CONFIG_SYS_CCSRBAR_PHYS_LOW:
4275 Lower 32-bits of CONFIG_SYS_CCSRBAR_PHYS. This macro is
4276 used in assembly code, so it must not contain typecasts or
4277 integer size suffixes (e.g. "ULL").
4278
4279- CONFIG_SYS_CCSR_DO_NOT_RELOCATE:
4280 If this macro is defined, then CONFIG_SYS_CCSRBAR_PHYS will be
4281 forced to a value that ensures that CCSR is not relocated.
4282
7f6c2cbc 4283- Floppy Disk Support:
6d0f6bcf 4284 CONFIG_SYS_FDC_DRIVE_NUMBER
7f6c2cbc
WD
4285
4286 the default drive number (default value 0)
4287
6d0f6bcf 4288 CONFIG_SYS_ISA_IO_STRIDE
7f6c2cbc 4289
11ccc33f 4290 defines the spacing between FDC chipset registers
7f6c2cbc
WD
4291 (default value 1)
4292
6d0f6bcf 4293 CONFIG_SYS_ISA_IO_OFFSET
7f6c2cbc 4294
43d9616c
WD
4295 defines the offset of register from address. It
4296 depends on which part of the data bus is connected to
11ccc33f 4297 the FDC chipset. (default value 0)
7f6c2cbc 4298
6d0f6bcf
JCPV
4299 If CONFIG_SYS_ISA_IO_STRIDE CONFIG_SYS_ISA_IO_OFFSET and
4300 CONFIG_SYS_FDC_DRIVE_NUMBER are undefined, they take their
43d9616c 4301 default value.
7f6c2cbc 4302
6d0f6bcf 4303 if CONFIG_SYS_FDC_HW_INIT is defined, then the function
43d9616c
WD
4304 fdc_hw_init() is called at the beginning of the FDC
4305 setup. fdc_hw_init() must be provided by the board
b445bbb4 4306 source code. It is used to make hardware-dependent
43d9616c 4307 initializations.
7f6c2cbc 4308
0abddf82
ML
4309- CONFIG_IDE_AHB:
4310 Most IDE controllers were designed to be connected with PCI
4311 interface. Only few of them were designed for AHB interface.
4312 When software is doing ATA command and data transfer to
4313 IDE devices through IDE-AHB controller, some additional
4314 registers accessing to these kind of IDE-AHB controller
b445bbb4 4315 is required.
0abddf82 4316
6d0f6bcf 4317- CONFIG_SYS_IMMR: Physical address of the Internal Memory.
efe2a4d5 4318 DO NOT CHANGE unless you know exactly what you're
25d6712a 4319 doing! (11-4) [MPC8xx/82xx systems only]
c609719b 4320
6d0f6bcf 4321- CONFIG_SYS_INIT_RAM_ADDR:
c609719b 4322
7152b1d0 4323 Start address of memory area that can be used for
c609719b
WD
4324 initial data and stack; please note that this must be
4325 writable memory that is working WITHOUT special
4326 initialization, i. e. you CANNOT use normal RAM which
4327 will become available only after programming the
4328 memory controller and running certain initialization
4329 sequences.
4330
4331 U-Boot uses the following memory types:
4332 - MPC8xx and MPC8260: IMMR (internal memory of the CPU)
4333 - MPC824X: data cache
4334 - PPC4xx: data cache
4335
6d0f6bcf 4336- CONFIG_SYS_GBL_DATA_OFFSET:
c609719b
WD
4337
4338 Offset of the initial data structure in the memory
6d0f6bcf
JCPV
4339 area defined by CONFIG_SYS_INIT_RAM_ADDR. Usually
4340 CONFIG_SYS_GBL_DATA_OFFSET is chosen such that the initial
c609719b 4341 data is located at the end of the available space
553f0982 4342 (sometimes written as (CONFIG_SYS_INIT_RAM_SIZE -
acd51f9d 4343 GENERATED_GBL_DATA_SIZE), and the initial stack is just
6d0f6bcf
JCPV
4344 below that area (growing from (CONFIG_SYS_INIT_RAM_ADDR +
4345 CONFIG_SYS_GBL_DATA_OFFSET) downward.
c609719b
WD
4346
4347 Note:
4348 On the MPC824X (or other systems that use the data
4349 cache for initial memory) the address chosen for
6d0f6bcf 4350 CONFIG_SYS_INIT_RAM_ADDR is basically arbitrary - it must
c609719b
WD
4351 point to an otherwise UNUSED address space between
4352 the top of RAM and the start of the PCI space.
4353
6d0f6bcf 4354- CONFIG_SYS_SIUMCR: SIU Module Configuration (11-6)
c609719b 4355
6d0f6bcf 4356- CONFIG_SYS_SYPCR: System Protection Control (11-9)
c609719b 4357
6d0f6bcf 4358- CONFIG_SYS_TBSCR: Time Base Status and Control (11-26)
c609719b 4359
6d0f6bcf 4360- CONFIG_SYS_PISCR: Periodic Interrupt Status and Control (11-31)
c609719b 4361
6d0f6bcf 4362- CONFIG_SYS_PLPRCR: PLL, Low-Power, and Reset Control Register (15-30)
c609719b 4363
6d0f6bcf 4364- CONFIG_SYS_SCCR: System Clock and reset Control Register (15-27)
c609719b 4365
6d0f6bcf 4366- CONFIG_SYS_OR_TIMING_SDRAM:
c609719b
WD
4367 SDRAM timing
4368
6d0f6bcf 4369- CONFIG_SYS_MAMR_PTA:
c609719b
WD
4370 periodic timer for refresh
4371
6d0f6bcf 4372- CONFIG_SYS_DER: Debug Event Register (37-47)
c609719b 4373
6d0f6bcf
JCPV
4374- FLASH_BASE0_PRELIM, FLASH_BASE1_PRELIM, CONFIG_SYS_REMAP_OR_AM,
4375 CONFIG_SYS_PRELIM_OR_AM, CONFIG_SYS_OR_TIMING_FLASH, CONFIG_SYS_OR0_REMAP,
4376 CONFIG_SYS_OR0_PRELIM, CONFIG_SYS_BR0_PRELIM, CONFIG_SYS_OR1_REMAP, CONFIG_SYS_OR1_PRELIM,
4377 CONFIG_SYS_BR1_PRELIM:
c609719b
WD
4378 Memory Controller Definitions: BR0/1 and OR0/1 (FLASH)
4379
4380- SDRAM_BASE2_PRELIM, SDRAM_BASE3_PRELIM, SDRAM_MAX_SIZE,
6d0f6bcf
JCPV
4381 CONFIG_SYS_OR_TIMING_SDRAM, CONFIG_SYS_OR2_PRELIM, CONFIG_SYS_BR2_PRELIM,
4382 CONFIG_SYS_OR3_PRELIM, CONFIG_SYS_BR3_PRELIM:
c609719b
WD
4383 Memory Controller Definitions: BR2/3 and OR2/3 (SDRAM)
4384
6d0f6bcf
JCPV
4385- CONFIG_SYS_MAMR_PTA, CONFIG_SYS_MPTPR_2BK_4K, CONFIG_SYS_MPTPR_1BK_4K, CONFIG_SYS_MPTPR_2BK_8K,
4386 CONFIG_SYS_MPTPR_1BK_8K, CONFIG_SYS_MAMR_8COL, CONFIG_SYS_MAMR_9COL:
c609719b
WD
4387 Machine Mode Register and Memory Periodic Timer
4388 Prescaler definitions (SDRAM timing)
4389
6d0f6bcf 4390- CONFIG_SYS_I2C_UCODE_PATCH, CONFIG_SYS_I2C_DPMEM_OFFSET [0x1FC0]:
c609719b
WD
4391 enable I2C microcode relocation patch (MPC8xx);
4392 define relocation offset in DPRAM [DSP2]
4393
6d0f6bcf 4394- CONFIG_SYS_SMC_UCODE_PATCH, CONFIG_SYS_SMC_DPMEM_OFFSET [0x1FC0]:
b423d055
HS
4395 enable SMC microcode relocation patch (MPC8xx);
4396 define relocation offset in DPRAM [SMC1]
4397
6d0f6bcf 4398- CONFIG_SYS_SPI_UCODE_PATCH, CONFIG_SYS_SPI_DPMEM_OFFSET [0x1FC0]:
c609719b
WD
4399 enable SPI microcode relocation patch (MPC8xx);
4400 define relocation offset in DPRAM [SCC4]
4401
6d0f6bcf 4402- CONFIG_SYS_CPM_POST_WORD_ADDR: (MPC8xx, MPC8260 only)
43d9616c
WD
4403 Offset of the bootmode word in DPRAM used by post
4404 (Power On Self Tests). This definition overrides
4405 #define'd default value in commproc.h resp.
4406 cpm_8260.h.
ea909b76 4407
6d0f6bcf
JCPV
4408- CONFIG_SYS_PCI_SLV_MEM_LOCAL, CONFIG_SYS_PCI_SLV_MEM_BUS, CONFIG_SYS_PICMR0_MASK_ATTRIB,
4409 CONFIG_SYS_PCI_MSTR0_LOCAL, CONFIG_SYS_PCIMSK0_MASK, CONFIG_SYS_PCI_MSTR1_LOCAL,
4410 CONFIG_SYS_PCIMSK1_MASK, CONFIG_SYS_PCI_MSTR_MEM_LOCAL, CONFIG_SYS_PCI_MSTR_MEM_BUS,
4411 CONFIG_SYS_CPU_PCI_MEM_START, CONFIG_SYS_PCI_MSTR_MEM_SIZE, CONFIG_SYS_POCMR0_MASK_ATTRIB,
4412 CONFIG_SYS_PCI_MSTR_MEMIO_LOCAL, CONFIG_SYS_PCI_MSTR_MEMIO_BUS, CPU_PCI_MEMIO_START,
4413 CONFIG_SYS_PCI_MSTR_MEMIO_SIZE, CONFIG_SYS_POCMR1_MASK_ATTRIB, CONFIG_SYS_PCI_MSTR_IO_LOCAL,
4414 CONFIG_SYS_PCI_MSTR_IO_BUS, CONFIG_SYS_CPU_PCI_IO_START, CONFIG_SYS_PCI_MSTR_IO_SIZE,
4415 CONFIG_SYS_POCMR2_MASK_ATTRIB: (MPC826x only)
a47a12be 4416 Overrides the default PCI memory map in arch/powerpc/cpu/mpc8260/pci.c if set.
5d232d0e 4417
9cacf4fc
DE
4418- CONFIG_PCI_DISABLE_PCIE:
4419 Disable PCI-Express on systems where it is supported but not
4420 required.
4421
69fd2d3b 4422- CONFIG_PCI_ENUM_ONLY
b445bbb4 4423 Only scan through and get the devices on the buses.
69fd2d3b
AS
4424 Don't do any setup work, presumably because someone or
4425 something has already done it, and we don't need to do it
4426 a second time. Useful for platforms that are pre-booted
4427 by coreboot or similar.
4428
842033e6
GJ
4429- CONFIG_PCI_INDIRECT_BRIDGE:
4430 Enable support for indirect PCI bridges.
4431
a09b9b68
KG
4432- CONFIG_SYS_SRIO:
4433 Chip has SRIO or not
4434
4435- CONFIG_SRIO1:
4436 Board has SRIO 1 port available
4437
4438- CONFIG_SRIO2:
4439 Board has SRIO 2 port available
4440
c8b28152
LG
4441- CONFIG_SRIO_PCIE_BOOT_MASTER
4442 Board can support master function for Boot from SRIO and PCIE
4443
a09b9b68
KG
4444- CONFIG_SYS_SRIOn_MEM_VIRT:
4445 Virtual Address of SRIO port 'n' memory region
4446
4447- CONFIG_SYS_SRIOn_MEM_PHYS:
4448 Physical Address of SRIO port 'n' memory region
4449
4450- CONFIG_SYS_SRIOn_MEM_SIZE:
4451 Size of SRIO port 'n' memory region
4452
66bd1846
FE
4453- CONFIG_SYS_NAND_BUSWIDTH_16BIT
4454 Defined to tell the NAND controller that the NAND chip is using
4455 a 16 bit bus.
4456 Not all NAND drivers use this symbol.
a430e916 4457 Example of drivers that use it:
66bd1846 4458 - drivers/mtd/nand/ndfc.c
a430e916 4459 - drivers/mtd/nand/mxc_nand.c
eced4626
AW
4460
4461- CONFIG_SYS_NDFC_EBC0_CFG
4462 Sets the EBC0_CFG register for the NDFC. If not defined
4463 a default value will be used.
4464
bb99ad6d 4465- CONFIG_SPD_EEPROM
218ca724
WD
4466 Get DDR timing information from an I2C EEPROM. Common
4467 with pluggable memory modules such as SODIMMs
4468
bb99ad6d
BW
4469 SPD_EEPROM_ADDRESS
4470 I2C address of the SPD EEPROM
4471
6d0f6bcf 4472- CONFIG_SYS_SPD_BUS_NUM
218ca724
WD
4473 If SPD EEPROM is on an I2C bus other than the first
4474 one, specify here. Note that the value must resolve
4475 to something your driver can deal with.
bb99ad6d 4476
1b3e3c4f
YS
4477- CONFIG_SYS_DDR_RAW_TIMING
4478 Get DDR timing information from other than SPD. Common with
4479 soldered DDR chips onboard without SPD. DDR raw timing
4480 parameters are extracted from datasheet and hard-coded into
4481 header files or board specific files.
4482
6f5e1dc5
YS
4483- CONFIG_FSL_DDR_INTERACTIVE
4484 Enable interactive DDR debugging. See doc/README.fsl-ddr.
4485
e32d59a2
YS
4486- CONFIG_FSL_DDR_SYNC_REFRESH
4487 Enable sync of refresh for multiple controllers.
4488
4516ff81
YS
4489- CONFIG_FSL_DDR_BIST
4490 Enable built-in memory test for Freescale DDR controllers.
4491
6d0f6bcf 4492- CONFIG_SYS_83XX_DDR_USES_CS0
218ca724
WD
4493 Only for 83xx systems. If specified, then DDR should
4494 be configured using CS0 and CS1 instead of CS2 and CS3.
2ad6b513 4495
c26e454d
WD
4496- CONFIG_ETHER_ON_FEC[12]
4497 Define to enable FEC[12] on a 8xx series processor.
4498
4499- CONFIG_FEC[12]_PHY
4500 Define to the hardcoded PHY address which corresponds
6e592385
WD
4501 to the given FEC; i. e.
4502 #define CONFIG_FEC1_PHY 4
c26e454d
WD
4503 means that the PHY with address 4 is connected to FEC1
4504
4505 When set to -1, means to probe for first available.
4506
4507- CONFIG_FEC[12]_PHY_NORXERR
4508 The PHY does not have a RXERR line (RMII only).
4509 (so program the FEC to ignore it).
4510
4511- CONFIG_RMII
4512 Enable RMII mode for all FECs.
4513 Note that this is a global option, we can't
4514 have one FEC in standard MII mode and another in RMII mode.
4515
5cf91d6b
WD
4516- CONFIG_CRC32_VERIFY
4517 Add a verify option to the crc32 command.
4518 The syntax is:
4519
4520 => crc32 -v <address> <count> <crc32>
4521
4522 Where address/count indicate a memory area
4523 and crc32 is the correct crc32 which the
4524 area should have.
4525
56523f12
WD
4526- CONFIG_LOOPW
4527 Add the "loopw" memory command. This only takes effect if
602ad3b3 4528 the memory commands are activated globally (CONFIG_CMD_MEM).
56523f12 4529
7b466641
SR
4530- CONFIG_MX_CYCLIC
4531 Add the "mdc" and "mwc" memory commands. These are cyclic
4532 "md/mw" commands.
4533 Examples:
4534
efe2a4d5 4535 => mdc.b 10 4 500
7b466641
SR
4536 This command will print 4 bytes (10,11,12,13) each 500 ms.
4537
efe2a4d5 4538 => mwc.l 100 12345678 10
7b466641
SR
4539 This command will write 12345678 to address 100 all 10 ms.
4540
efe2a4d5 4541 This only takes effect if the memory commands are activated
602ad3b3 4542 globally (CONFIG_CMD_MEM).
7b466641 4543
8aa1a2d1 4544- CONFIG_SKIP_LOWLEVEL_INIT
afc1ce82 4545 [ARM, NDS32, MIPS only] If this variable is defined, then certain
844f07d8
WD
4546 low level initializations (like setting up the memory
4547 controller) are omitted and/or U-Boot does not
4548 relocate itself into RAM.
4549
4550 Normally this variable MUST NOT be defined. The only
4551 exception is when U-Boot is loaded (to RAM) by some
4552 other boot loader or by a debugger which performs
4553 these initializations itself.
8aa1a2d1 4554
b5bd0982
SG
4555- CONFIG_SKIP_LOWLEVEL_INIT_ONLY
4556 [ARM926EJ-S only] This allows just the call to lowlevel_init()
90211f77 4557 to be skipped. The normal CP15 init (such as enabling the
b5bd0982
SG
4558 instruction cache) is still performed.
4559
401bb30b 4560- CONFIG_SPL_BUILD
df81238b
ML
4561 Modifies the behaviour of start.S when compiling a loader
4562 that is executed before the actual U-Boot. E.g. when
4563 compiling a NAND SPL.
400558b5 4564
3aa29de0
YZ
4565- CONFIG_TPL_BUILD
4566 Modifies the behaviour of start.S when compiling a loader
4567 that is executed after the SPL and before the actual U-Boot.
4568 It is loaded by the SPL.
4569
5df572f0
YZ
4570- CONFIG_SYS_MPC85XX_NO_RESETVEC
4571 Only for 85xx systems. If this variable is specified, the section
4572 .resetvec is not kept and the section .bootpg is placed in the
4573 previous 4k of the .text section.
4574
4213fc29
SG
4575- CONFIG_ARCH_MAP_SYSMEM
4576 Generally U-Boot (and in particular the md command) uses
4577 effective address. It is therefore not necessary to regard
4578 U-Boot address as virtual addresses that need to be translated
4579 to physical addresses. However, sandbox requires this, since
4580 it maintains its own little RAM buffer which contains all
4581 addressable memory. This option causes some memory accesses
4582 to be mapped through map_sysmem() / unmap_sysmem().
4583
588a13f7
SG
4584- CONFIG_X86_RESET_VECTOR
4585 If defined, the x86 reset vector code is included. This is not
4586 needed when U-Boot is running from Coreboot.
b16f521a 4587
fc33705e
MJ
4588- CONFIG_SYS_MPUCLK
4589 Defines the MPU clock speed (in MHz).
4590
4591 NOTE : currently only supported on AM335x platforms.
5b5ece9e 4592
16678eb4
HS
4593- CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC:
4594 Enables the RTC32K OSC on AM33xx based plattforms
4595
999d7d32
KM
4596- CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
4597 Option to disable subpage write in NAND driver
4598 driver that uses this:
4599 drivers/mtd/nand/davinci_nand.c
4600
f2717b47
TT
4601Freescale QE/FMAN Firmware Support:
4602-----------------------------------
4603
4604The Freescale QUICCEngine (QE) and Frame Manager (FMAN) both support the
4605loading of "firmware", which is encoded in the QE firmware binary format.
4606This firmware often needs to be loaded during U-Boot booting, so macros
4607are used to identify the storage device (NOR flash, SPI, etc) and the address
4608within that device.
4609
dcf1d774
ZQ
4610- CONFIG_SYS_FMAN_FW_ADDR
4611 The address in the storage device where the FMAN microcode is located. The
4612 meaning of this address depends on which CONFIG_SYS_QE_FW_IN_xxx macro
4613 is also specified.
4614
4615- CONFIG_SYS_QE_FW_ADDR
4616 The address in the storage device where the QE microcode is located. The
f2717b47
TT
4617 meaning of this address depends on which CONFIG_SYS_QE_FW_IN_xxx macro
4618 is also specified.
4619
4620- CONFIG_SYS_QE_FMAN_FW_LENGTH
4621 The maximum possible size of the firmware. The firmware binary format
4622 has a field that specifies the actual size of the firmware, but it
4623 might not be possible to read any part of the firmware unless some
4624 local storage is allocated to hold the entire firmware first.
4625
4626- CONFIG_SYS_QE_FMAN_FW_IN_NOR
4627 Specifies that QE/FMAN firmware is located in NOR flash, mapped as
4628 normal addressable memory via the LBC. CONFIG_SYS_FMAN_FW_ADDR is the
4629 virtual address in NOR flash.
4630
4631- CONFIG_SYS_QE_FMAN_FW_IN_NAND
4632 Specifies that QE/FMAN firmware is located in NAND flash.
4633 CONFIG_SYS_FMAN_FW_ADDR is the offset within NAND flash.
4634
4635- CONFIG_SYS_QE_FMAN_FW_IN_MMC
4636 Specifies that QE/FMAN firmware is located on the primary SD/MMC
4637 device. CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device.
4638
292dc6c5
LG
4639- CONFIG_SYS_QE_FMAN_FW_IN_REMOTE
4640 Specifies that QE/FMAN firmware is located in the remote (master)
4641 memory space. CONFIG_SYS_FMAN_FW_ADDR is a virtual address which
fc54c7fa
LG
4642 can be mapped from slave TLB->slave LAW->slave SRIO or PCIE outbound
4643 window->master inbound window->master LAW->the ucode address in
4644 master's memory space.
f2717b47 4645
b940ca64
GR
4646Freescale Layerscape Management Complex Firmware Support:
4647---------------------------------------------------------
4648The Freescale Layerscape Management Complex (MC) supports the loading of
4649"firmware".
4650This firmware often needs to be loaded during U-Boot booting, so macros
4651are used to identify the storage device (NOR flash, SPI, etc) and the address
4652within that device.
4653
4654- CONFIG_FSL_MC_ENET
4655 Enable the MC driver for Layerscape SoCs.
4656
5c055089
PK
4657Freescale Layerscape Debug Server Support:
4658-------------------------------------------
4659The Freescale Layerscape Debug Server Support supports the loading of
4660"Debug Server firmware" and triggering SP boot-rom.
4661This firmware often needs to be loaded during U-Boot booting.
4662
c0492141
YS
4663- CONFIG_SYS_MC_RSV_MEM_ALIGN
4664 Define alignment of reserved memory MC requires
5c055089 4665
f3f431a7
PK
4666Reproducible builds
4667-------------------
4668
4669In order to achieve reproducible builds, timestamps used in the U-Boot build
4670process have to be set to a fixed value.
4671
4672This is done using the SOURCE_DATE_EPOCH environment variable.
4673SOURCE_DATE_EPOCH is to be set on the build host's shell, not as a configuration
4674option for U-Boot or an environment variable in U-Boot.
4675
4676SOURCE_DATE_EPOCH should be set to a number of seconds since the epoch, in UTC.
4677
c609719b
WD
4678Building the Software:
4679======================
4680
218ca724
WD
4681Building U-Boot has been tested in several native build environments
4682and in many different cross environments. Of course we cannot support
4683all possibly existing versions of cross development tools in all
4684(potentially obsolete) versions. In case of tool chain problems we
4685recommend to use the ELDK (see http://www.denx.de/wiki/DULG/ELDK)
4686which is extensively used to build and test U-Boot.
c609719b 4687
218ca724
WD
4688If you are not using a native environment, it is assumed that you
4689have GNU cross compiling tools available in your path. In this case,
4690you must set the environment variable CROSS_COMPILE in your shell.
4691Note that no changes to the Makefile or any other source files are
4692necessary. For example using the ELDK on a 4xx CPU, please enter:
c609719b 4693
218ca724
WD
4694 $ CROSS_COMPILE=ppc_4xx-
4695 $ export CROSS_COMPILE
c609719b 4696
2f8d396b
PT
4697Note: If you wish to generate Windows versions of the utilities in
4698 the tools directory you can use the MinGW toolchain
4699 (http://www.mingw.org). Set your HOST tools to the MinGW
4700 toolchain and execute 'make tools'. For example:
4701
4702 $ make HOSTCC=i586-mingw32msvc-gcc HOSTSTRIP=i586-mingw32msvc-strip tools
4703
4704 Binaries such as tools/mkimage.exe will be created which can
4705 be executed on computers running Windows.
4706
218ca724
WD
4707U-Boot is intended to be simple to build. After installing the
4708sources you must configure U-Boot for one specific board type. This
c609719b
WD
4709is done by typing:
4710
ab584d67 4711 make NAME_defconfig
c609719b 4712
ab584d67 4713where "NAME_defconfig" is the name of one of the existing configu-
4d675ae6 4714rations; see boards.cfg for supported names.
db01a2ea 4715
2729af9d
WD
4716Note: for some board special configuration names may exist; check if
4717 additional information is available from the board vendor; for
4718 instance, the TQM823L systems are available without (standard)
4719 or with LCD support. You can select such additional "features"
11ccc33f 4720 when choosing the configuration, i. e.
2729af9d 4721
ab584d67 4722 make TQM823L_defconfig
2729af9d
WD
4723 - will configure for a plain TQM823L, i. e. no LCD support
4724
ab584d67 4725 make TQM823L_LCD_defconfig
2729af9d
WD
4726 - will configure for a TQM823L with U-Boot console on LCD
4727
4728 etc.
4729
4730
4731Finally, type "make all", and you should get some working U-Boot
4732images ready for download to / installation on your system:
4733
4734- "u-boot.bin" is a raw binary image
4735- "u-boot" is an image in ELF binary format
4736- "u-boot.srec" is in Motorola S-Record format
4737
baf31249
MB
4738By default the build is performed locally and the objects are saved
4739in the source directory. One of the two methods can be used to change
4740this behavior and build U-Boot to some external directory:
4741
47421. Add O= to the make command line invocations:
4743
4744 make O=/tmp/build distclean
ab584d67 4745 make O=/tmp/build NAME_defconfig
baf31249
MB
4746 make O=/tmp/build all
4747
adbba996 47482. Set environment variable KBUILD_OUTPUT to point to the desired location:
baf31249 4749
adbba996 4750 export KBUILD_OUTPUT=/tmp/build
baf31249 4751 make distclean
ab584d67 4752 make NAME_defconfig
baf31249
MB
4753 make all
4754
adbba996 4755Note that the command line "O=" setting overrides the KBUILD_OUTPUT environment
baf31249
MB
4756variable.
4757
2729af9d
WD
4758
4759Please be aware that the Makefiles assume you are using GNU make, so
4760for instance on NetBSD you might need to use "gmake" instead of
4761native "make".
4762
4763
4764If the system board that you have is not listed, then you will need
4765to port U-Boot to your hardware platform. To do this, follow these
4766steps:
4767
3c1496cd 47681. Create a new directory to hold your board specific code. Add any
2729af9d 4769 files you need. In your board directory, you will need at least
3c1496cd
PS
4770 the "Makefile" and a "<board>.c".
47712. Create a new configuration file "include/configs/<board>.h" for
4772 your board.
2729af9d
WD
47733. If you're porting U-Boot to a new CPU, then also create a new
4774 directory to hold your CPU specific code. Add any files you need.
ab584d67 47754. Run "make <board>_defconfig" with your new name.
2729af9d
WD
47765. Type "make", and you should get a working "u-boot.srec" file
4777 to be installed on your target system.
47786. Debug and solve any problems that might arise.
4779 [Of course, this last step is much harder than it sounds.]
4780
4781
4782Testing of U-Boot Modifications, Ports to New Hardware, etc.:
4783==============================================================
4784
218ca724
WD
4785If you have modified U-Boot sources (for instance added a new board
4786or support for new devices, a new CPU, etc.) you are expected to
2729af9d
WD
4787provide feedback to the other developers. The feedback normally takes
4788the form of a "patch", i. e. a context diff against a certain (latest
218ca724 4789official or latest in the git repository) version of U-Boot sources.
2729af9d 4790
218ca724
WD
4791But before you submit such a patch, please verify that your modifi-
4792cation did not break existing code. At least make sure that *ALL* of
2729af9d 4793the supported boards compile WITHOUT ANY compiler warnings. To do so,
6de80f21
SG
4794just run the buildman script (tools/buildman/buildman), which will
4795configure and build U-Boot for ALL supported system. Be warned, this
4796will take a while. Please see the buildman README, or run 'buildman -H'
4797for documentation.
baf31249
MB
4798
4799
2729af9d
WD
4800See also "U-Boot Porting Guide" below.
4801
4802
4803Monitor Commands - Overview:
4804============================
4805
4806go - start application at address 'addr'
4807run - run commands in an environment variable
4808bootm - boot application image from memory
4809bootp - boot image via network using BootP/TFTP protocol
44f074c7 4810bootz - boot zImage from memory
2729af9d
WD
4811tftpboot- boot image via network using TFTP protocol
4812 and env variables "ipaddr" and "serverip"
4813 (and eventually "gatewayip")
1fb7cd49 4814tftpput - upload a file via network using TFTP protocol
2729af9d
WD
4815rarpboot- boot image via network using RARP/TFTP protocol
4816diskboot- boot from IDE devicebootd - boot default, i.e., run 'bootcmd'
4817loads - load S-Record file over serial line
4818loadb - load binary file over serial line (kermit mode)
4819md - memory display
4820mm - memory modify (auto-incrementing)
4821nm - memory modify (constant address)
4822mw - memory write (fill)
4823cp - memory copy
4824cmp - memory compare
4825crc32 - checksum calculation
0f89c54b 4826i2c - I2C sub-system
2729af9d
WD
4827sspi - SPI utility commands
4828base - print or set address offset
4829printenv- print environment variables
4830setenv - set environment variables
4831saveenv - save environment variables to persistent storage
4832protect - enable or disable FLASH write protection
4833erase - erase FLASH memory
4834flinfo - print FLASH memory information
10635afa 4835nand - NAND memory operations (see doc/README.nand)
2729af9d
WD
4836bdinfo - print Board Info structure
4837iminfo - print header information for application image
4838coninfo - print console devices and informations
4839ide - IDE sub-system
4840loop - infinite loop on address range
56523f12 4841loopw - infinite write loop on address range
2729af9d
WD
4842mtest - simple RAM test
4843icache - enable or disable instruction cache
4844dcache - enable or disable data cache
4845reset - Perform RESET of the CPU
4846echo - echo args to console
4847version - print monitor version
4848help - print online help
4849? - alias for 'help'
4850
4851
4852Monitor Commands - Detailed Description:
4853========================================
4854
4855TODO.
4856
4857For now: just type "help <command>".
4858
4859
4860Environment Variables:
4861======================
4862
4863U-Boot supports user configuration using Environment Variables which
4864can be made persistent by saving to Flash memory.
c609719b 4865
2729af9d
WD
4866Environment Variables are set using "setenv", printed using
4867"printenv", and saved to Flash using "saveenv". Using "setenv"
4868without a value can be used to delete a variable from the
4869environment. As long as you don't save the environment you are
4870working with an in-memory copy. In case the Flash area containing the
4871environment is erased by accident, a default environment is provided.
c609719b 4872
c96f86ee
WD
4873Some configuration options can be set using Environment Variables.
4874
4875List of environment variables (most likely not complete):
c609719b 4876
2729af9d 4877 baudrate - see CONFIG_BAUDRATE
c609719b 4878
2729af9d 4879 bootdelay - see CONFIG_BOOTDELAY
c609719b 4880
2729af9d 4881 bootcmd - see CONFIG_BOOTCOMMAND
4a6fd34b 4882
2729af9d 4883 bootargs - Boot arguments when booting an RTOS image
c609719b 4884
2729af9d 4885 bootfile - Name of the image to load with TFTP
c609719b 4886
7d721e34
BS
4887 bootm_low - Memory range available for image processing in the bootm
4888 command can be restricted. This variable is given as
4889 a hexadecimal number and defines lowest address allowed
4890 for use by the bootm command. See also "bootm_size"
4891 environment variable. Address defined by "bootm_low" is
4892 also the base of the initial memory mapping for the Linux
c3624e6e
GL
4893 kernel -- see the description of CONFIG_SYS_BOOTMAPSZ and
4894 bootm_mapsize.
4895
c0f40859 4896 bootm_mapsize - Size of the initial memory mapping for the Linux kernel.
c3624e6e
GL
4897 This variable is given as a hexadecimal number and it
4898 defines the size of the memory region starting at base
4899 address bootm_low that is accessible by the Linux kernel
4900 during early boot. If unset, CONFIG_SYS_BOOTMAPSZ is used
4901 as the default value if it is defined, and bootm_size is
4902 used otherwise.
7d721e34
BS
4903
4904 bootm_size - Memory range available for image processing in the bootm
4905 command can be restricted. This variable is given as
4906 a hexadecimal number and defines the size of the region
4907 allowed for use by the bootm command. See also "bootm_low"
4908 environment variable.
4909
4bae9090
BS
4910 updatefile - Location of the software update file on a TFTP server, used
4911 by the automatic software update feature. Please refer to
4912 documentation in doc/README.update for more details.
4913
2729af9d
WD
4914 autoload - if set to "no" (any string beginning with 'n'),
4915 "bootp" will just load perform a lookup of the
4916 configuration from the BOOTP server, but not try to
4917 load any image using TFTP
c609719b 4918
2729af9d
WD
4919 autostart - if set to "yes", an image loaded using the "bootp",
4920 "rarpboot", "tftpboot" or "diskboot" commands will
4921 be automatically started (by internally calling
4922 "bootm")
38b99261 4923
2729af9d
WD
4924 If set to "no", a standalone image passed to the
4925 "bootm" command will be copied to the load address
4926 (and eventually uncompressed), but NOT be started.
4927 This can be used to load and uncompress arbitrary
4928 data.
c609719b 4929
a28afca5
DL
4930 fdt_high - if set this restricts the maximum address that the
4931 flattened device tree will be copied into upon boot.
fa34f6b2
SG
4932 For example, if you have a system with 1 GB memory
4933 at physical address 0x10000000, while Linux kernel
4934 only recognizes the first 704 MB as low memory, you
4935 may need to set fdt_high as 0x3C000000 to have the
4936 device tree blob be copied to the maximum address
4937 of the 704 MB low memory, so that Linux kernel can
4938 access it during the boot procedure.
4939
a28afca5
DL
4940 If this is set to the special value 0xFFFFFFFF then
4941 the fdt will not be copied at all on boot. For this
4942 to work it must reside in writable memory, have
4943 sufficient padding on the end of it for u-boot to
4944 add the information it needs into it, and the memory
4945 must be accessible by the kernel.
4946
eea63e05
SG
4947 fdtcontroladdr- if set this is the address of the control flattened
4948 device tree used by U-Boot when CONFIG_OF_CONTROL is
4949 defined.
4950
17ea1177
WD
4951 i2cfast - (PPC405GP|PPC405EP only)
4952 if set to 'y' configures Linux I2C driver for fast
4953 mode (400kHZ). This environment variable is used in
4954 initialization code. So, for changes to be effective
4955 it must be saved and board must be reset.
4956
2729af9d
WD
4957 initrd_high - restrict positioning of initrd images:
4958 If this variable is not set, initrd images will be
4959 copied to the highest possible address in RAM; this
4960 is usually what you want since it allows for
4961 maximum initrd size. If for some reason you want to
4962 make sure that the initrd image is loaded below the
6d0f6bcf 4963 CONFIG_SYS_BOOTMAPSZ limit, you can set this environment
2729af9d
WD
4964 variable to a value of "no" or "off" or "0".
4965 Alternatively, you can set it to a maximum upper
4966 address to use (U-Boot will still check that it
4967 does not overwrite the U-Boot stack and data).
c609719b 4968
2729af9d
WD
4969 For instance, when you have a system with 16 MB
4970 RAM, and want to reserve 4 MB from use by Linux,
4971 you can do this by adding "mem=12M" to the value of
4972 the "bootargs" variable. However, now you must make
4973 sure that the initrd image is placed in the first
4974 12 MB as well - this can be done with
c609719b 4975
2729af9d 4976 setenv initrd_high 00c00000
c609719b 4977
2729af9d
WD
4978 If you set initrd_high to 0xFFFFFFFF, this is an
4979 indication to U-Boot that all addresses are legal
4980 for the Linux kernel, including addresses in flash
4981 memory. In this case U-Boot will NOT COPY the
4982 ramdisk at all. This may be useful to reduce the
4983 boot time on your system, but requires that this
4984 feature is supported by your Linux kernel.
c609719b 4985
2729af9d 4986 ipaddr - IP address; needed for tftpboot command
c609719b 4987
2729af9d
WD
4988 loadaddr - Default load address for commands like "bootp",
4989 "rarpboot", "tftpboot", "loadb" or "diskboot"
c609719b 4990
2729af9d 4991 loads_echo - see CONFIG_LOADS_ECHO
a3d991bd 4992
2729af9d 4993 serverip - TFTP server IP address; needed for tftpboot command
a3d991bd 4994
2729af9d 4995 bootretry - see CONFIG_BOOT_RETRY_TIME
a3d991bd 4996
2729af9d 4997 bootdelaykey - see CONFIG_AUTOBOOT_DELAY_STR
a3d991bd 4998
2729af9d 4999 bootstopkey - see CONFIG_AUTOBOOT_STOP_STR
c609719b 5000
e2a53458 5001 ethprime - controls which interface is used first.
c609719b 5002
e2a53458
MF
5003 ethact - controls which interface is currently active.
5004 For example you can do the following
c609719b 5005
48690d80
HS
5006 => setenv ethact FEC
5007 => ping 192.168.0.1 # traffic sent on FEC
5008 => setenv ethact SCC
5009 => ping 10.0.0.1 # traffic sent on SCC
c609719b 5010
e1692577
MF
5011 ethrotate - When set to "no" U-Boot does not go through all
5012 available network interfaces.
5013 It just stays at the currently selected interface.
5014
c96f86ee 5015 netretry - When set to "no" each network operation will
2729af9d
WD
5016 either succeed or fail without retrying.
5017 When set to "once" the network operation will
5018 fail when all the available network interfaces
5019 are tried once without success.
5020 Useful on scripts which control the retry operation
5021 themselves.
c609719b 5022
b4e2f89d 5023 npe_ucode - set load address for the NPE microcode
a1cf027a 5024
b445bbb4 5025 silent_linux - If set then Linux will be told to boot silently, by
8d51aacd
SG
5026 changing the console to be empty. If "yes" it will be
5027 made silent. If "no" it will not be made silent. If
5028 unset, then it will be made silent if the U-Boot console
5029 is silent.
5030
f5fb7346 5031 tftpsrcp - If this is set, the value is used for TFTP's
ecb0ccd9
WD
5032 UDP source port.
5033
f5fb7346 5034 tftpdstp - If this is set, the value is used for TFTP's UDP
28cb9375
WD
5035 destination port instead of the Well Know Port 69.
5036
c96f86ee
WD
5037 tftpblocksize - Block size to use for TFTP transfers; if not set,
5038 we use the TFTP server's default block size
5039
5040 tftptimeout - Retransmission timeout for TFTP packets (in milli-
5041 seconds, minimum value is 1000 = 1 second). Defines
5042 when a packet is considered to be lost so it has to
5043 be retransmitted. The default is 5000 = 5 seconds.
5044 Lowering this value may make downloads succeed
5045 faster in networks with high packet loss rates or
5046 with unreliable TFTP servers.
5047
f5fb7346
AA
5048 tftptimeoutcountmax - maximum count of TFTP timeouts (no
5049 unit, minimum value = 0). Defines how many timeouts
5050 can happen during a single file transfer before that
5051 transfer is aborted. The default is 10, and 0 means
5052 'no timeouts allowed'. Increasing this value may help
5053 downloads succeed with high packet loss rates, or with
5054 unreliable TFTP servers or client hardware.
5055
c96f86ee 5056 vlan - When set to a value < 4095 the traffic over
11ccc33f 5057 Ethernet is encapsulated/received over 802.1q
2729af9d 5058 VLAN tagged frames.
c609719b 5059
50768f5b
AM
5060 bootpretryperiod - Period during which BOOTP/DHCP sends retries.
5061 Unsigned value, in milliseconds. If not set, the period will
5062 be either the default (28000), or a value based on
5063 CONFIG_NET_RETRY_COUNT, if defined. This value has
5064 precedence over the valu based on CONFIG_NET_RETRY_COUNT.
5065
dc0b7b0e
JH
5066The following image location variables contain the location of images
5067used in booting. The "Image" column gives the role of the image and is
5068not an environment variable name. The other columns are environment
5069variable names. "File Name" gives the name of the file on a TFTP
5070server, "RAM Address" gives the location in RAM the image will be
5071loaded to, and "Flash Location" gives the image's address in NOR
5072flash or offset in NAND flash.
5073
5074*Note* - these variables don't have to be defined for all boards, some
aed9fed9 5075boards currently use other variables for these purposes, and some
dc0b7b0e
JH
5076boards use these variables for other purposes.
5077
c0f40859
WD
5078Image File Name RAM Address Flash Location
5079----- --------- ----------- --------------
5080u-boot u-boot u-boot_addr_r u-boot_addr
5081Linux kernel bootfile kernel_addr_r kernel_addr
5082device tree blob fdtfile fdt_addr_r fdt_addr
5083ramdisk ramdiskfile ramdisk_addr_r ramdisk_addr
dc0b7b0e 5084
2729af9d
WD
5085The following environment variables may be used and automatically
5086updated by the network boot commands ("bootp" and "rarpboot"),
5087depending the information provided by your boot server:
c609719b 5088
2729af9d
WD
5089 bootfile - see above
5090 dnsip - IP address of your Domain Name Server
5091 dnsip2 - IP address of your secondary Domain Name Server
5092 gatewayip - IP address of the Gateway (Router) to use
5093 hostname - Target hostname
5094 ipaddr - see above
5095 netmask - Subnet Mask
5096 rootpath - Pathname of the root filesystem on the NFS server
5097 serverip - see above
c1551ea8 5098
c1551ea8 5099
2729af9d 5100There are two special Environment Variables:
c1551ea8 5101
2729af9d
WD
5102 serial# - contains hardware identification information such
5103 as type string and/or serial number
5104 ethaddr - Ethernet address
c609719b 5105
2729af9d
WD
5106These variables can be set only once (usually during manufacturing of
5107the board). U-Boot refuses to delete or overwrite these variables
5108once they have been set once.
c609719b 5109
f07771cc 5110
2729af9d 5111Further special Environment Variables:
f07771cc 5112
2729af9d
WD
5113 ver - Contains the U-Boot version string as printed
5114 with the "version" command. This variable is
5115 readonly (see CONFIG_VERSION_VARIABLE).
f07771cc 5116
f07771cc 5117
2729af9d
WD
5118Please note that changes to some configuration parameters may take
5119only effect after the next boot (yes, that's just like Windoze :-).
f07771cc 5120
f07771cc 5121
170ab110
JH
5122Callback functions for environment variables:
5123---------------------------------------------
5124
5125For some environment variables, the behavior of u-boot needs to change
b445bbb4 5126when their values are changed. This functionality allows functions to
170ab110
JH
5127be associated with arbitrary variables. On creation, overwrite, or
5128deletion, the callback will provide the opportunity for some side
5129effect to happen or for the change to be rejected.
5130
5131The callbacks are named and associated with a function using the
5132U_BOOT_ENV_CALLBACK macro in your board or driver code.
5133
5134These callbacks are associated with variables in one of two ways. The
5135static list can be added to by defining CONFIG_ENV_CALLBACK_LIST_STATIC
5136in the board configuration to a string that defines a list of
5137associations. The list must be in the following format:
5138
5139 entry = variable_name[:callback_name]
5140 list = entry[,list]
5141
5142If the callback name is not specified, then the callback is deleted.
5143Spaces are also allowed anywhere in the list.
5144
5145Callbacks can also be associated by defining the ".callbacks" variable
5146with the same list format above. Any association in ".callbacks" will
5147override any association in the static list. You can define
5148CONFIG_ENV_CALLBACK_LIST_DEFAULT to a list (string) to define the
b445bbb4 5149".callbacks" environment variable in the default or embedded environment.
170ab110 5150
bdf1fe4e
JH
5151If CONFIG_REGEX is defined, the variable_name above is evaluated as a
5152regular expression. This allows multiple variables to be connected to
5153the same callback without explicitly listing them all out.
5154
170ab110 5155
2729af9d
WD
5156Command Line Parsing:
5157=====================
f07771cc 5158
2729af9d
WD
5159There are two different command line parsers available with U-Boot:
5160the old "simple" one, and the much more powerful "hush" shell:
c609719b 5161
2729af9d
WD
5162Old, simple command line parser:
5163--------------------------------
c609719b 5164
2729af9d
WD
5165- supports environment variables (through setenv / saveenv commands)
5166- several commands on one line, separated by ';'
fe126d8b 5167- variable substitution using "... ${name} ..." syntax
2729af9d
WD
5168- special characters ('$', ';') can be escaped by prefixing with '\',
5169 for example:
fe126d8b 5170 setenv bootcmd bootm \${address}
2729af9d
WD
5171- You can also escape text by enclosing in single apostrophes, for example:
5172 setenv addip 'setenv bootargs $bootargs ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off'
c609719b 5173
2729af9d
WD
5174Hush shell:
5175-----------
c609719b 5176
2729af9d
WD
5177- similar to Bourne shell, with control structures like
5178 if...then...else...fi, for...do...done; while...do...done,
5179 until...do...done, ...
5180- supports environment ("global") variables (through setenv / saveenv
5181 commands) and local shell variables (through standard shell syntax
5182 "name=value"); only environment variables can be used with "run"
5183 command
5184
5185General rules:
5186--------------
c609719b 5187
2729af9d
WD
5188(1) If a command line (or an environment variable executed by a "run"
5189 command) contains several commands separated by semicolon, and
5190 one of these commands fails, then the remaining commands will be
5191 executed anyway.
c609719b 5192
2729af9d 5193(2) If you execute several variables with one call to run (i. e.
11ccc33f 5194 calling run with a list of variables as arguments), any failing
2729af9d
WD
5195 command will cause "run" to terminate, i. e. the remaining
5196 variables are not executed.
c609719b 5197
2729af9d
WD
5198Note for Redundant Ethernet Interfaces:
5199=======================================
c609719b 5200
11ccc33f 5201Some boards come with redundant Ethernet interfaces; U-Boot supports
2729af9d
WD
5202such configurations and is capable of automatic selection of a
5203"working" interface when needed. MAC assignment works as follows:
c609719b 5204
2729af9d
WD
5205Network interfaces are numbered eth0, eth1, eth2, ... Corresponding
5206MAC addresses can be stored in the environment as "ethaddr" (=>eth0),
5207"eth1addr" (=>eth1), "eth2addr", ...
c609719b 5208
2729af9d
WD
5209If the network interface stores some valid MAC address (for instance
5210in SROM), this is used as default address if there is NO correspon-
5211ding setting in the environment; if the corresponding environment
5212variable is set, this overrides the settings in the card; that means:
c609719b 5213
2729af9d
WD
5214o If the SROM has a valid MAC address, and there is no address in the
5215 environment, the SROM's address is used.
c609719b 5216
2729af9d
WD
5217o If there is no valid address in the SROM, and a definition in the
5218 environment exists, then the value from the environment variable is
5219 used.
c609719b 5220
2729af9d
WD
5221o If both the SROM and the environment contain a MAC address, and
5222 both addresses are the same, this MAC address is used.
c609719b 5223
2729af9d
WD
5224o If both the SROM and the environment contain a MAC address, and the
5225 addresses differ, the value from the environment is used and a
5226 warning is printed.
c609719b 5227
2729af9d 5228o If neither SROM nor the environment contain a MAC address, an error
bef1014b
JH
5229 is raised. If CONFIG_NET_RANDOM_ETHADDR is defined, then in this case
5230 a random, locally-assigned MAC is used.
c609719b 5231
ecee9324 5232If Ethernet drivers implement the 'write_hwaddr' function, valid MAC addresses
c0f40859 5233will be programmed into hardware as part of the initialization process. This
ecee9324
BW
5234may be skipped by setting the appropriate 'ethmacskip' environment variable.
5235The naming convention is as follows:
5236"ethmacskip" (=>eth0), "eth1macskip" (=>eth1) etc.
c609719b 5237
2729af9d
WD
5238Image Formats:
5239==============
c609719b 5240
3310c549
MB
5241U-Boot is capable of booting (and performing other auxiliary operations on)
5242images in two formats:
5243
5244New uImage format (FIT)
5245-----------------------
5246
5247Flexible and powerful format based on Flattened Image Tree -- FIT (similar
5248to Flattened Device Tree). It allows the use of images with multiple
5249components (several kernels, ramdisks, etc.), with contents protected by
5250SHA1, MD5 or CRC32. More details are found in the doc/uImage.FIT directory.
5251
5252
5253Old uImage format
5254-----------------
5255
5256Old image format is based on binary files which can be basically anything,
5257preceded by a special header; see the definitions in include/image.h for
5258details; basically, the header defines the following image properties:
c609719b 5259
2729af9d
WD
5260* Target Operating System (Provisions for OpenBSD, NetBSD, FreeBSD,
5261 4.4BSD, Linux, SVR4, Esix, Solaris, Irix, SCO, Dell, NCR, VxWorks,
f5ed9e39
PT
5262 LynxOS, pSOS, QNX, RTEMS, INTEGRITY;
5263 Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, LynxOS,
5264 INTEGRITY).
7b64fef3 5265* Target CPU Architecture (Provisions for Alpha, ARM, AVR32, Intel x86,
afc1ce82
ML
5266 IA64, MIPS, NDS32, Nios II, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit;
5267 Currently supported: ARM, AVR32, Intel x86, MIPS, NDS32, Nios II, PowerPC).
2729af9d
WD
5268* Compression Type (uncompressed, gzip, bzip2)
5269* Load Address
5270* Entry Point
5271* Image Name
5272* Image Timestamp
c609719b 5273
2729af9d
WD
5274The header is marked by a special Magic Number, and both the header
5275and the data portions of the image are secured against corruption by
5276CRC32 checksums.
c609719b
WD
5277
5278
2729af9d
WD
5279Linux Support:
5280==============
c609719b 5281
2729af9d
WD
5282Although U-Boot should support any OS or standalone application
5283easily, the main focus has always been on Linux during the design of
5284U-Boot.
c609719b 5285
2729af9d
WD
5286U-Boot includes many features that so far have been part of some
5287special "boot loader" code within the Linux kernel. Also, any
5288"initrd" images to be used are no longer part of one big Linux image;
5289instead, kernel and "initrd" are separate images. This implementation
5290serves several purposes:
c609719b 5291
2729af9d
WD
5292- the same features can be used for other OS or standalone
5293 applications (for instance: using compressed images to reduce the
5294 Flash memory footprint)
c609719b 5295
2729af9d
WD
5296- it becomes much easier to port new Linux kernel versions because
5297 lots of low-level, hardware dependent stuff are done by U-Boot
c609719b 5298
2729af9d
WD
5299- the same Linux kernel image can now be used with different "initrd"
5300 images; of course this also means that different kernel images can
5301 be run with the same "initrd". This makes testing easier (you don't
5302 have to build a new "zImage.initrd" Linux image when you just
5303 change a file in your "initrd"). Also, a field-upgrade of the
5304 software is easier now.
c609719b 5305
c609719b 5306
2729af9d
WD
5307Linux HOWTO:
5308============
c609719b 5309
2729af9d
WD
5310Porting Linux to U-Boot based systems:
5311---------------------------------------
c609719b 5312
2729af9d
WD
5313U-Boot cannot save you from doing all the necessary modifications to
5314configure the Linux device drivers for use with your target hardware
5315(no, we don't intend to provide a full virtual machine interface to
5316Linux :-).
c609719b 5317
a47a12be 5318But now you can ignore ALL boot loader code (in arch/powerpc/mbxboot).
24ee89b9 5319
2729af9d
WD
5320Just make sure your machine specific header file (for instance
5321include/asm-ppc/tqm8xx.h) includes the same definition of the Board
1dc30693
MH
5322Information structure as we define in include/asm-<arch>/u-boot.h,
5323and make sure that your definition of IMAP_ADDR uses the same value
6d0f6bcf 5324as your U-Boot configuration in CONFIG_SYS_IMMR.
24ee89b9 5325
2eb31b13
SG
5326Note that U-Boot now has a driver model, a unified model for drivers.
5327If you are adding a new driver, plumb it into driver model. If there
5328is no uclass available, you are encouraged to create one. See
5329doc/driver-model.
5330
c609719b 5331
2729af9d
WD
5332Configuring the Linux kernel:
5333-----------------------------
c609719b 5334
2729af9d
WD
5335No specific requirements for U-Boot. Make sure you have some root
5336device (initial ramdisk, NFS) for your target system.
5337
5338
5339Building a Linux Image:
5340-----------------------
c609719b 5341
2729af9d
WD
5342With U-Boot, "normal" build targets like "zImage" or "bzImage" are
5343not used. If you use recent kernel source, a new build target
5344"uImage" will exist which automatically builds an image usable by
5345U-Boot. Most older kernels also have support for a "pImage" target,
5346which was introduced for our predecessor project PPCBoot and uses a
5347100% compatible format.
5348
5349Example:
5350
ab584d67 5351 make TQM850L_defconfig
2729af9d
WD
5352 make oldconfig
5353 make dep
5354 make uImage
5355
5356The "uImage" build target uses a special tool (in 'tools/mkimage') to
5357encapsulate a compressed Linux kernel image with header information,
5358CRC32 checksum etc. for use with U-Boot. This is what we are doing:
5359
5360* build a standard "vmlinux" kernel image (in ELF binary format):
5361
5362* convert the kernel into a raw binary image:
5363
5364 ${CROSS_COMPILE}-objcopy -O binary \
5365 -R .note -R .comment \
5366 -S vmlinux linux.bin
5367
5368* compress the binary image:
5369
5370 gzip -9 linux.bin
5371
5372* package compressed binary image for U-Boot:
5373
5374 mkimage -A ppc -O linux -T kernel -C gzip \
5375 -a 0 -e 0 -n "Linux Kernel Image" \
5376 -d linux.bin.gz uImage
c609719b 5377
c609719b 5378
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WD
5379The "mkimage" tool can also be used to create ramdisk images for use
5380with U-Boot, either separated from the Linux kernel image, or
5381combined into one file. "mkimage" encapsulates the images with a 64
5382byte header containing information about target architecture,
5383operating system, image type, compression method, entry points, time
5384stamp, CRC32 checksums, etc.
5385
5386"mkimage" can be called in two ways: to verify existing images and
5387print the header information, or to build new images.
5388
5389In the first form (with "-l" option) mkimage lists the information
5390contained in the header of an existing U-Boot image; this includes
5391checksum verification:
c609719b 5392
2729af9d
WD
5393 tools/mkimage -l image
5394 -l ==> list image header information
5395
5396The second form (with "-d" option) is used to build a U-Boot image
5397from a "data file" which is used as image payload:
5398
5399 tools/mkimage -A arch -O os -T type -C comp -a addr -e ep \
5400 -n name -d data_file image
5401 -A ==> set architecture to 'arch'
5402 -O ==> set operating system to 'os'
5403 -T ==> set image type to 'type'
5404 -C ==> set compression type 'comp'
5405 -a ==> set load address to 'addr' (hex)
5406 -e ==> set entry point to 'ep' (hex)
5407 -n ==> set image name to 'name'
5408 -d ==> use image data from 'datafile'
5409
69459791
WD
5410Right now, all Linux kernels for PowerPC systems use the same load
5411address (0x00000000), but the entry point address depends on the
5412kernel version:
2729af9d
WD
5413
5414- 2.2.x kernels have the entry point at 0x0000000C,
5415- 2.3.x and later kernels have the entry point at 0x00000000.
5416
5417So a typical call to build a U-Boot image would read:
5418
5419 -> tools/mkimage -n '2.4.4 kernel for TQM850L' \
5420 > -A ppc -O linux -T kernel -C gzip -a 0 -e 0 \
a47a12be 5421 > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux.gz \
2729af9d
WD
5422 > examples/uImage.TQM850L
5423 Image Name: 2.4.4 kernel for TQM850L
5424 Created: Wed Jul 19 02:34:59 2000
5425 Image Type: PowerPC Linux Kernel Image (gzip compressed)
5426 Data Size: 335725 Bytes = 327.86 kB = 0.32 MB
5427 Load Address: 0x00000000
5428 Entry Point: 0x00000000
5429
5430To verify the contents of the image (or check for corruption):
5431
5432 -> tools/mkimage -l examples/uImage.TQM850L
5433 Image Name: 2.4.4 kernel for TQM850L
5434 Created: Wed Jul 19 02:34:59 2000
5435 Image Type: PowerPC Linux Kernel Image (gzip compressed)
5436 Data Size: 335725 Bytes = 327.86 kB = 0.32 MB
5437 Load Address: 0x00000000
5438 Entry Point: 0x00000000
5439
5440NOTE: for embedded systems where boot time is critical you can trade
5441speed for memory and install an UNCOMPRESSED image instead: this
5442needs more space in Flash, but boots much faster since it does not
5443need to be uncompressed:
5444
a47a12be 5445 -> gunzip /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux.gz
2729af9d
WD
5446 -> tools/mkimage -n '2.4.4 kernel for TQM850L' \
5447 > -A ppc -O linux -T kernel -C none -a 0 -e 0 \
a47a12be 5448 > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux \
2729af9d
WD
5449 > examples/uImage.TQM850L-uncompressed
5450 Image Name: 2.4.4 kernel for TQM850L
5451 Created: Wed Jul 19 02:34:59 2000
5452 Image Type: PowerPC Linux Kernel Image (uncompressed)
5453 Data Size: 792160 Bytes = 773.59 kB = 0.76 MB
5454 Load Address: 0x00000000
5455 Entry Point: 0x00000000
5456
5457
5458Similar you can build U-Boot images from a 'ramdisk.image.gz' file
5459when your kernel is intended to use an initial ramdisk:
5460
5461 -> tools/mkimage -n 'Simple Ramdisk Image' \
5462 > -A ppc -O linux -T ramdisk -C gzip \
5463 > -d /LinuxPPC/images/SIMPLE-ramdisk.image.gz examples/simple-initrd
5464 Image Name: Simple Ramdisk Image
5465 Created: Wed Jan 12 14:01:50 2000
5466 Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
5467 Data Size: 566530 Bytes = 553.25 kB = 0.54 MB
5468 Load Address: 0x00000000
5469 Entry Point: 0x00000000
5470
a804b5ce
GMF
5471The "dumpimage" is a tool to disassemble images built by mkimage. Its "-i"
5472option performs the converse operation of the mkimage's second form (the "-d"
5473option). Given an image built by mkimage, the dumpimage extracts a "data file"
5474from the image:
5475
f41f5b7c
GMF
5476 tools/dumpimage -i image -T type -p position data_file
5477 -i ==> extract from the 'image' a specific 'data_file'
5478 -T ==> set image type to 'type'
5479 -p ==> 'position' (starting at 0) of the 'data_file' inside the 'image'
a804b5ce 5480
2729af9d
WD
5481
5482Installing a Linux Image:
5483-------------------------
5484
5485To downloading a U-Boot image over the serial (console) interface,
5486you must convert the image to S-Record format:
5487
5488 objcopy -I binary -O srec examples/image examples/image.srec
5489
5490The 'objcopy' does not understand the information in the U-Boot
5491image header, so the resulting S-Record file will be relative to
5492address 0x00000000. To load it to a given address, you need to
5493specify the target address as 'offset' parameter with the 'loads'
5494command.
5495
5496Example: install the image to address 0x40100000 (which on the
5497TQM8xxL is in the first Flash bank):
5498
5499 => erase 40100000 401FFFFF
5500
5501 .......... done
5502 Erased 8 sectors
5503
5504 => loads 40100000
5505 ## Ready for S-Record download ...
5506 ~>examples/image.srec
5507 1 2 3 4 5 6 7 8 9 10 11 12 13 ...
5508 ...
5509 15989 15990 15991 15992
5510 [file transfer complete]
5511 [connected]
5512 ## Start Addr = 0x00000000
5513
5514
5515You can check the success of the download using the 'iminfo' command;
218ca724 5516this includes a checksum verification so you can be sure no data
2729af9d
WD
5517corruption happened:
5518
5519 => imi 40100000
5520
5521 ## Checking Image at 40100000 ...
5522 Image Name: 2.2.13 for initrd on TQM850L
5523 Image Type: PowerPC Linux Kernel Image (gzip compressed)
5524 Data Size: 335725 Bytes = 327 kB = 0 MB
5525 Load Address: 00000000
5526 Entry Point: 0000000c
5527 Verifying Checksum ... OK
5528
5529
5530Boot Linux:
5531-----------
5532
5533The "bootm" command is used to boot an application that is stored in
5534memory (RAM or Flash). In case of a Linux kernel image, the contents
5535of the "bootargs" environment variable is passed to the kernel as
5536parameters. You can check and modify this variable using the
5537"printenv" and "setenv" commands:
5538
5539
5540 => printenv bootargs
5541 bootargs=root=/dev/ram
5542
5543 => setenv bootargs root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
5544
5545 => printenv bootargs
5546 bootargs=root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
5547
5548 => bootm 40020000
5549 ## Booting Linux kernel at 40020000 ...
5550 Image Name: 2.2.13 for NFS on TQM850L
5551 Image Type: PowerPC Linux Kernel Image (gzip compressed)
5552 Data Size: 381681 Bytes = 372 kB = 0 MB
5553 Load Address: 00000000
5554 Entry Point: 0000000c
5555 Verifying Checksum ... OK
5556 Uncompressing Kernel Image ... OK
5557 Linux version 2.2.13 (wd@denx.local.net) (gcc version 2.95.2 19991024 (release)) #1 Wed Jul 19 02:35:17 MEST 2000
5558 Boot arguments: root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
5559 time_init: decrementer frequency = 187500000/60
5560 Calibrating delay loop... 49.77 BogoMIPS
5561 Memory: 15208k available (700k kernel code, 444k data, 32k init) [c0000000,c1000000]
5562 ...
5563
11ccc33f 5564If you want to boot a Linux kernel with initial RAM disk, you pass
2729af9d
WD
5565the memory addresses of both the kernel and the initrd image (PPBCOOT
5566format!) to the "bootm" command:
5567
5568 => imi 40100000 40200000
5569
5570 ## Checking Image at 40100000 ...
5571 Image Name: 2.2.13 for initrd on TQM850L
5572 Image Type: PowerPC Linux Kernel Image (gzip compressed)
5573 Data Size: 335725 Bytes = 327 kB = 0 MB
5574 Load Address: 00000000
5575 Entry Point: 0000000c
5576 Verifying Checksum ... OK
5577
5578 ## Checking Image at 40200000 ...
5579 Image Name: Simple Ramdisk Image
5580 Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
5581 Data Size: 566530 Bytes = 553 kB = 0 MB
5582 Load Address: 00000000
5583 Entry Point: 00000000
5584 Verifying Checksum ... OK
5585
5586 => bootm 40100000 40200000
5587 ## Booting Linux kernel at 40100000 ...
5588 Image Name: 2.2.13 for initrd on TQM850L
5589 Image Type: PowerPC Linux Kernel Image (gzip compressed)
5590 Data Size: 335725 Bytes = 327 kB = 0 MB
5591 Load Address: 00000000
5592 Entry Point: 0000000c
5593 Verifying Checksum ... OK
5594 Uncompressing Kernel Image ... OK
5595 ## Loading RAMDisk Image at 40200000 ...
5596 Image Name: Simple Ramdisk Image
5597 Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
5598 Data Size: 566530 Bytes = 553 kB = 0 MB
5599 Load Address: 00000000
5600 Entry Point: 00000000
5601 Verifying Checksum ... OK
5602 Loading Ramdisk ... OK
5603 Linux version 2.2.13 (wd@denx.local.net) (gcc version 2.95.2 19991024 (release)) #1 Wed Jul 19 02:32:08 MEST 2000
5604 Boot arguments: root=/dev/ram
5605 time_init: decrementer frequency = 187500000/60
5606 Calibrating delay loop... 49.77 BogoMIPS
5607 ...
5608 RAMDISK: Compressed image found at block 0
5609 VFS: Mounted root (ext2 filesystem).
5610
5611 bash#
5612
0267768e
MM
5613Boot Linux and pass a flat device tree:
5614-----------
5615
5616First, U-Boot must be compiled with the appropriate defines. See the section
5617titled "Linux Kernel Interface" above for a more in depth explanation. The
5618following is an example of how to start a kernel and pass an updated
5619flat device tree:
5620
5621=> print oftaddr
5622oftaddr=0x300000
5623=> print oft
5624oft=oftrees/mpc8540ads.dtb
5625=> tftp $oftaddr $oft
5626Speed: 1000, full duplex
5627Using TSEC0 device
5628TFTP from server 192.168.1.1; our IP address is 192.168.1.101
5629Filename 'oftrees/mpc8540ads.dtb'.
5630Load address: 0x300000
5631Loading: #
5632done
5633Bytes transferred = 4106 (100a hex)
5634=> tftp $loadaddr $bootfile
5635Speed: 1000, full duplex
5636Using TSEC0 device
5637TFTP from server 192.168.1.1; our IP address is 192.168.1.2
5638Filename 'uImage'.
5639Load address: 0x200000
5640Loading:############
5641done
5642Bytes transferred = 1029407 (fb51f hex)
5643=> print loadaddr
5644loadaddr=200000
5645=> print oftaddr
5646oftaddr=0x300000
5647=> bootm $loadaddr - $oftaddr
5648## Booting image at 00200000 ...
a9398e01
WD
5649 Image Name: Linux-2.6.17-dirty
5650 Image Type: PowerPC Linux Kernel Image (gzip compressed)
5651 Data Size: 1029343 Bytes = 1005.2 kB
0267768e 5652 Load Address: 00000000
a9398e01 5653 Entry Point: 00000000
0267768e
MM
5654 Verifying Checksum ... OK
5655 Uncompressing Kernel Image ... OK
5656Booting using flat device tree at 0x300000
5657Using MPC85xx ADS machine description
5658Memory CAM mapping: CAM0=256Mb, CAM1=256Mb, CAM2=0Mb residual: 0Mb
5659[snip]
5660
5661
2729af9d
WD
5662More About U-Boot Image Types:
5663------------------------------
5664
5665U-Boot supports the following image types:
5666
5667 "Standalone Programs" are directly runnable in the environment
5668 provided by U-Boot; it is expected that (if they behave
5669 well) you can continue to work in U-Boot after return from
5670 the Standalone Program.
5671 "OS Kernel Images" are usually images of some Embedded OS which
5672 will take over control completely. Usually these programs
5673 will install their own set of exception handlers, device
5674 drivers, set up the MMU, etc. - this means, that you cannot
5675 expect to re-enter U-Boot except by resetting the CPU.
5676 "RAMDisk Images" are more or less just data blocks, and their
5677 parameters (address, size) are passed to an OS kernel that is
5678 being started.
5679 "Multi-File Images" contain several images, typically an OS
5680 (Linux) kernel image and one or more data images like
5681 RAMDisks. This construct is useful for instance when you want
5682 to boot over the network using BOOTP etc., where the boot
5683 server provides just a single image file, but you want to get
5684 for instance an OS kernel and a RAMDisk image.
5685
5686 "Multi-File Images" start with a list of image sizes, each
5687 image size (in bytes) specified by an "uint32_t" in network
5688 byte order. This list is terminated by an "(uint32_t)0".
5689 Immediately after the terminating 0 follow the images, one by
5690 one, all aligned on "uint32_t" boundaries (size rounded up to
5691 a multiple of 4 bytes).
5692
5693 "Firmware Images" are binary images containing firmware (like
5694 U-Boot or FPGA images) which usually will be programmed to
5695 flash memory.
5696
5697 "Script files" are command sequences that will be executed by
5698 U-Boot's command interpreter; this feature is especially
5699 useful when you configure U-Boot to use a real shell (hush)
5700 as command interpreter.
5701
44f074c7
MV
5702Booting the Linux zImage:
5703-------------------------
5704
5705On some platforms, it's possible to boot Linux zImage. This is done
5706using the "bootz" command. The syntax of "bootz" command is the same
5707as the syntax of "bootm" command.
5708
8ac28563 5709Note, defining the CONFIG_SUPPORT_RAW_INITRD allows user to supply
017e1f3f
MV
5710kernel with raw initrd images. The syntax is slightly different, the
5711address of the initrd must be augmented by it's size, in the following
5712format: "<initrd addres>:<initrd size>".
5713
2729af9d
WD
5714
5715Standalone HOWTO:
5716=================
5717
5718One of the features of U-Boot is that you can dynamically load and
5719run "standalone" applications, which can use some resources of
5720U-Boot like console I/O functions or interrupt services.
5721
5722Two simple examples are included with the sources:
5723
5724"Hello World" Demo:
5725-------------------
5726
5727'examples/hello_world.c' contains a small "Hello World" Demo
5728application; it is automatically compiled when you build U-Boot.
5729It's configured to run at address 0x00040004, so you can play with it
5730like that:
5731
5732 => loads
5733 ## Ready for S-Record download ...
5734 ~>examples/hello_world.srec
5735 1 2 3 4 5 6 7 8 9 10 11 ...
5736 [file transfer complete]
5737 [connected]
5738 ## Start Addr = 0x00040004
5739
5740 => go 40004 Hello World! This is a test.
5741 ## Starting application at 0x00040004 ...
5742 Hello World
5743 argc = 7
5744 argv[0] = "40004"
5745 argv[1] = "Hello"
5746 argv[2] = "World!"
5747 argv[3] = "This"
5748 argv[4] = "is"
5749 argv[5] = "a"
5750 argv[6] = "test."
5751 argv[7] = "<NULL>"
5752 Hit any key to exit ...
5753
5754 ## Application terminated, rc = 0x0
5755
5756Another example, which demonstrates how to register a CPM interrupt
5757handler with the U-Boot code, can be found in 'examples/timer.c'.
5758Here, a CPM timer is set up to generate an interrupt every second.
5759The interrupt service routine is trivial, just printing a '.'
5760character, but this is just a demo program. The application can be
5761controlled by the following keys:
5762
5763 ? - print current values og the CPM Timer registers
5764 b - enable interrupts and start timer
5765 e - stop timer and disable interrupts
5766 q - quit application
5767
5768 => loads
5769 ## Ready for S-Record download ...
5770 ~>examples/timer.srec
5771 1 2 3 4 5 6 7 8 9 10 11 ...
5772 [file transfer complete]
5773 [connected]
5774 ## Start Addr = 0x00040004
5775
5776 => go 40004
5777 ## Starting application at 0x00040004 ...
5778 TIMERS=0xfff00980
5779 Using timer 1
5780 tgcr @ 0xfff00980, tmr @ 0xfff00990, trr @ 0xfff00994, tcr @ 0xfff00998, tcn @ 0xfff0099c, ter @ 0xfff009b0
5781
5782Hit 'b':
5783 [q, b, e, ?] Set interval 1000000 us
5784 Enabling timer
5785Hit '?':
5786 [q, b, e, ?] ........
5787 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0xef6, ter=0x0
5788Hit '?':
5789 [q, b, e, ?] .
5790 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x2ad4, ter=0x0
5791Hit '?':
5792 [q, b, e, ?] .
5793 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x1efc, ter=0x0
5794Hit '?':
5795 [q, b, e, ?] .
5796 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x169d, ter=0x0
5797Hit 'e':
5798 [q, b, e, ?] ...Stopping timer
5799Hit 'q':
5800 [q, b, e, ?] ## Application terminated, rc = 0x0
5801
5802
5803Minicom warning:
5804================
5805
5806Over time, many people have reported problems when trying to use the
5807"minicom" terminal emulation program for serial download. I (wd)
5808consider minicom to be broken, and recommend not to use it. Under
5809Unix, I recommend to use C-Kermit for general purpose use (and
5810especially for kermit binary protocol download ("loadb" command), and
e53515a2
KP
5811use "cu" for S-Record download ("loads" command). See
5812http://www.denx.de/wiki/view/DULG/SystemSetup#Section_4.3.
5813for help with kermit.
5814
2729af9d
WD
5815
5816Nevertheless, if you absolutely want to use it try adding this
5817configuration to your "File transfer protocols" section:
5818
5819 Name Program Name U/D FullScr IO-Red. Multi
5820 X kermit /usr/bin/kermit -i -l %l -s Y U Y N N
5821 Y kermit /usr/bin/kermit -i -l %l -r N D Y N N
5822
5823
5824NetBSD Notes:
5825=============
5826
5827Starting at version 0.9.2, U-Boot supports NetBSD both as host
5828(build U-Boot) and target system (boots NetBSD/mpc8xx).
5829
5830Building requires a cross environment; it is known to work on
5831NetBSD/i386 with the cross-powerpc-netbsd-1.3 package (you will also
5832need gmake since the Makefiles are not compatible with BSD make).
5833Note that the cross-powerpc package does not install include files;
5834attempting to build U-Boot will fail because <machine/ansi.h> is
5835missing. This file has to be installed and patched manually:
5836
5837 # cd /usr/pkg/cross/powerpc-netbsd/include
5838 # mkdir powerpc
5839 # ln -s powerpc machine
5840 # cp /usr/src/sys/arch/powerpc/include/ansi.h powerpc/ansi.h
5841 # ${EDIT} powerpc/ansi.h ## must remove __va_list, _BSD_VA_LIST
5842
5843Native builds *don't* work due to incompatibilities between native
5844and U-Boot include files.
5845
5846Booting assumes that (the first part of) the image booted is a
5847stage-2 loader which in turn loads and then invokes the kernel
5848proper. Loader sources will eventually appear in the NetBSD source
5849tree (probably in sys/arc/mpc8xx/stand/u-boot_stage2/); in the
2a8af187 5850meantime, see ftp://ftp.denx.de/pub/u-boot/ppcboot_stage2.tar.gz
2729af9d
WD
5851
5852
5853Implementation Internals:
5854=========================
5855
5856The following is not intended to be a complete description of every
5857implementation detail. However, it should help to understand the
5858inner workings of U-Boot and make it easier to port it to custom
5859hardware.
5860
5861
5862Initial Stack, Global Data:
5863---------------------------
5864
5865The implementation of U-Boot is complicated by the fact that U-Boot
5866starts running out of ROM (flash memory), usually without access to
5867system RAM (because the memory controller is not initialized yet).
5868This means that we don't have writable Data or BSS segments, and BSS
5869is not initialized as zero. To be able to get a C environment working
5870at all, we have to allocate at least a minimal stack. Implementation
5871options for this are defined and restricted by the CPU used: Some CPU
5872models provide on-chip memory (like the IMMR area on MPC8xx and
5873MPC826x processors), on others (parts of) the data cache can be
5874locked as (mis-) used as memory, etc.
5875
218ca724 5876 Chris Hallinan posted a good summary of these issues to the
0668236b 5877 U-Boot mailing list:
2729af9d
WD
5878
5879 Subject: RE: [U-Boot-Users] RE: More On Memory Bank x (nothingness)?
5880 From: "Chris Hallinan" <clh@net1plus.com>
5881 Date: Mon, 10 Feb 2003 16:43:46 -0500 (22:43 MET)
5882 ...
5883
5884 Correct me if I'm wrong, folks, but the way I understand it
5885 is this: Using DCACHE as initial RAM for Stack, etc, does not
5886 require any physical RAM backing up the cache. The cleverness
5887 is that the cache is being used as a temporary supply of
5888 necessary storage before the SDRAM controller is setup. It's
11ccc33f 5889 beyond the scope of this list to explain the details, but you
2729af9d
WD
5890 can see how this works by studying the cache architecture and
5891 operation in the architecture and processor-specific manuals.
5892
5893 OCM is On Chip Memory, which I believe the 405GP has 4K. It
5894 is another option for the system designer to use as an
11ccc33f 5895 initial stack/RAM area prior to SDRAM being available. Either
2729af9d
WD
5896 option should work for you. Using CS 4 should be fine if your
5897 board designers haven't used it for something that would
5898 cause you grief during the initial boot! It is frequently not
5899 used.
5900
6d0f6bcf 5901 CONFIG_SYS_INIT_RAM_ADDR should be somewhere that won't interfere
2729af9d
WD
5902 with your processor/board/system design. The default value
5903 you will find in any recent u-boot distribution in
8a316c9b 5904 walnut.h should work for you. I'd set it to a value larger
2729af9d
WD
5905 than your SDRAM module. If you have a 64MB SDRAM module, set
5906 it above 400_0000. Just make sure your board has no resources
5907 that are supposed to respond to that address! That code in
5908 start.S has been around a while and should work as is when
5909 you get the config right.
5910
5911 -Chris Hallinan
5912 DS4.COM, Inc.
5913
5914It is essential to remember this, since it has some impact on the C
5915code for the initialization procedures:
5916
5917* Initialized global data (data segment) is read-only. Do not attempt
5918 to write it.
5919
b445bbb4 5920* Do not use any uninitialized global data (or implicitly initialized
2729af9d
WD
5921 as zero data - BSS segment) at all - this is undefined, initiali-
5922 zation is performed later (when relocating to RAM).
5923
5924* Stack space is very limited. Avoid big data buffers or things like
5925 that.
5926
5927Having only the stack as writable memory limits means we cannot use
b445bbb4 5928normal global data to share information between the code. But it
2729af9d
WD
5929turned out that the implementation of U-Boot can be greatly
5930simplified by making a global data structure (gd_t) available to all
5931functions. We could pass a pointer to this data as argument to _all_
5932functions, but this would bloat the code. Instead we use a feature of
5933the GCC compiler (Global Register Variables) to share the data: we
5934place a pointer (gd) to the global data into a register which we
5935reserve for this purpose.
5936
5937When choosing a register for such a purpose we are restricted by the
5938relevant (E)ABI specifications for the current architecture, and by
5939GCC's implementation.
5940
5941For PowerPC, the following registers have specific use:
5942 R1: stack pointer
e7670f6c 5943 R2: reserved for system use
2729af9d
WD
5944 R3-R4: parameter passing and return values
5945 R5-R10: parameter passing
5946 R13: small data area pointer
5947 R30: GOT pointer
5948 R31: frame pointer
5949
e6bee808
JT
5950 (U-Boot also uses R12 as internal GOT pointer. r12
5951 is a volatile register so r12 needs to be reset when
5952 going back and forth between asm and C)
2729af9d 5953
e7670f6c 5954 ==> U-Boot will use R2 to hold a pointer to the global data
2729af9d
WD
5955
5956 Note: on PPC, we could use a static initializer (since the
5957 address of the global data structure is known at compile time),
5958 but it turned out that reserving a register results in somewhat
5959 smaller code - although the code savings are not that big (on
5960 average for all boards 752 bytes for the whole U-Boot image,
5961 624 text + 127 data).
5962
c4db335c 5963On Blackfin, the normal C ABI (except for P3) is followed as documented here:
4c58eb55
MF
5964 http://docs.blackfin.uclinux.org/doku.php?id=application_binary_interface
5965
c4db335c 5966 ==> U-Boot will use P3 to hold a pointer to the global data
4c58eb55 5967
2729af9d
WD
5968On ARM, the following registers are used:
5969
5970 R0: function argument word/integer result
5971 R1-R3: function argument word
12eba1b4
JH
5972 R9: platform specific
5973 R10: stack limit (used only if stack checking is enabled)
2729af9d
WD
5974 R11: argument (frame) pointer
5975 R12: temporary workspace
5976 R13: stack pointer
5977 R14: link register
5978 R15: program counter
5979
12eba1b4
JH
5980 ==> U-Boot will use R9 to hold a pointer to the global data
5981
5982 Note: on ARM, only R_ARM_RELATIVE relocations are supported.
2729af9d 5983
0df01fd3
TC
5984On Nios II, the ABI is documented here:
5985 http://www.altera.com/literature/hb/nios2/n2cpu_nii51016.pdf
5986
5987 ==> U-Boot will use gp to hold a pointer to the global data
5988
5989 Note: on Nios II, we give "-G0" option to gcc and don't use gp
5990 to access small data sections, so gp is free.
5991
afc1ce82
ML
5992On NDS32, the following registers are used:
5993
5994 R0-R1: argument/return
5995 R2-R5: argument
5996 R15: temporary register for assembler
5997 R16: trampoline register
5998 R28: frame pointer (FP)
5999 R29: global pointer (GP)
6000 R30: link register (LP)
6001 R31: stack pointer (SP)
6002 PC: program counter (PC)
6003
6004 ==> U-Boot will use R10 to hold a pointer to the global data
6005
d87080b7
WD
6006NOTE: DECLARE_GLOBAL_DATA_PTR must be used with file-global scope,
6007or current versions of GCC may "optimize" the code too much.
2729af9d
WD
6008
6009Memory Management:
6010------------------
6011
6012U-Boot runs in system state and uses physical addresses, i.e. the
6013MMU is not used either for address mapping nor for memory protection.
6014
6015The available memory is mapped to fixed addresses using the memory
6016controller. In this process, a contiguous block is formed for each
6017memory type (Flash, SDRAM, SRAM), even when it consists of several
6018physical memory banks.
6019
6020U-Boot is installed in the first 128 kB of the first Flash bank (on
6021TQM8xxL modules this is the range 0x40000000 ... 0x4001FFFF). After
6022booting and sizing and initializing DRAM, the code relocates itself
6023to the upper end of DRAM. Immediately below the U-Boot code some
6d0f6bcf 6024memory is reserved for use by malloc() [see CONFIG_SYS_MALLOC_LEN
2729af9d
WD
6025configuration setting]. Below that, a structure with global Board
6026Info data is placed, followed by the stack (growing downward).
6027
6028Additionally, some exception handler code is copied to the low 8 kB
6029of DRAM (0x00000000 ... 0x00001FFF).
6030
6031So a typical memory configuration with 16 MB of DRAM could look like
6032this:
6033
6034 0x0000 0000 Exception Vector code
6035 :
6036 0x0000 1FFF
6037 0x0000 2000 Free for Application Use
6038 :
6039 :
6040
6041 :
6042 :
6043 0x00FB FF20 Monitor Stack (Growing downward)
6044 0x00FB FFAC Board Info Data and permanent copy of global data
6045 0x00FC 0000 Malloc Arena
6046 :
6047 0x00FD FFFF
6048 0x00FE 0000 RAM Copy of Monitor Code
6049 ... eventually: LCD or video framebuffer
6050 ... eventually: pRAM (Protected RAM - unchanged by reset)
6051 0x00FF FFFF [End of RAM]
6052
6053
6054System Initialization:
6055----------------------
c609719b 6056
2729af9d 6057In the reset configuration, U-Boot starts at the reset entry point
11ccc33f 6058(on most PowerPC systems at address 0x00000100). Because of the reset
b445bbb4 6059configuration for CS0# this is a mirror of the on board Flash memory.
2729af9d
WD
6060To be able to re-map memory U-Boot then jumps to its link address.
6061To be able to implement the initialization code in C, a (small!)
6062initial stack is set up in the internal Dual Ported RAM (in case CPUs
6063which provide such a feature like MPC8xx or MPC8260), or in a locked
6064part of the data cache. After that, U-Boot initializes the CPU core,
6065the caches and the SIU.
6066
6067Next, all (potentially) available memory banks are mapped using a
6068preliminary mapping. For example, we put them on 512 MB boundaries
6069(multiples of 0x20000000: SDRAM on 0x00000000 and 0x20000000, Flash
6070on 0x40000000 and 0x60000000, SRAM on 0x80000000). Then UPM A is
6071programmed for SDRAM access. Using the temporary configuration, a
6072simple memory test is run that determines the size of the SDRAM
6073banks.
6074
6075When there is more than one SDRAM bank, and the banks are of
6076different size, the largest is mapped first. For equal size, the first
6077bank (CS2#) is mapped first. The first mapping is always for address
60780x00000000, with any additional banks following immediately to create
6079contiguous memory starting from 0.
6080
6081Then, the monitor installs itself at the upper end of the SDRAM area
6082and allocates memory for use by malloc() and for the global Board
6083Info data; also, the exception vector code is copied to the low RAM
6084pages, and the final stack is set up.
6085
6086Only after this relocation will you have a "normal" C environment;
6087until that you are restricted in several ways, mostly because you are
6088running from ROM, and because the code will have to be relocated to a
6089new address in RAM.
6090
6091
6092U-Boot Porting Guide:
6093----------------------
c609719b 6094
2729af9d
WD
6095[Based on messages by Jerry Van Baren in the U-Boot-Users mailing
6096list, October 2002]
c609719b
WD
6097
6098
6c3fef28 6099int main(int argc, char *argv[])
2729af9d
WD
6100{
6101 sighandler_t no_more_time;
c609719b 6102
6c3fef28
JVB
6103 signal(SIGALRM, no_more_time);
6104 alarm(PROJECT_DEADLINE - toSec (3 * WEEK));
c609719b 6105
2729af9d 6106 if (available_money > available_manpower) {
6c3fef28 6107 Pay consultant to port U-Boot;
c609719b
WD
6108 return 0;
6109 }
6110
2729af9d
WD
6111 Download latest U-Boot source;
6112
0668236b 6113 Subscribe to u-boot mailing list;
2729af9d 6114
6c3fef28
JVB
6115 if (clueless)
6116 email("Hi, I am new to U-Boot, how do I get started?");
2729af9d
WD
6117
6118 while (learning) {
6119 Read the README file in the top level directory;
6c3fef28
JVB
6120 Read http://www.denx.de/twiki/bin/view/DULG/Manual;
6121 Read applicable doc/*.README;
2729af9d 6122 Read the source, Luke;
6c3fef28 6123 /* find . -name "*.[chS]" | xargs grep -i <keyword> */
2729af9d
WD
6124 }
6125
6c3fef28
JVB
6126 if (available_money > toLocalCurrency ($2500))
6127 Buy a BDI3000;
6128 else
2729af9d 6129 Add a lot of aggravation and time;
2729af9d 6130
6c3fef28
JVB
6131 if (a similar board exists) { /* hopefully... */
6132 cp -a board/<similar> board/<myboard>
6133 cp include/configs/<similar>.h include/configs/<myboard>.h
6134 } else {
6135 Create your own board support subdirectory;
6136 Create your own board include/configs/<myboard>.h file;
6137 }
6138 Edit new board/<myboard> files
6139 Edit new include/configs/<myboard>.h
6140
6141 while (!accepted) {
6142 while (!running) {
6143 do {
6144 Add / modify source code;
6145 } until (compiles);
6146 Debug;
6147 if (clueless)
6148 email("Hi, I am having problems...");
6149 }
6150 Send patch file to the U-Boot email list;
6151 if (reasonable critiques)
6152 Incorporate improvements from email list code review;
6153 else
6154 Defend code as written;
2729af9d 6155 }
2729af9d
WD
6156
6157 return 0;
6158}
6159
6160void no_more_time (int sig)
6161{
6162 hire_a_guru();
6163}
6164
c609719b 6165
2729af9d
WD
6166Coding Standards:
6167-----------------
c609719b 6168
2729af9d 6169All contributions to U-Boot should conform to the Linux kernel
2c051651 6170coding style; see the file "Documentation/CodingStyle" and the script
7ca9296e 6171"scripts/Lindent" in your Linux kernel source directory.
2c051651
DZ
6172
6173Source files originating from a different project (for example the
6174MTD subsystem) are generally exempt from these guidelines and are not
b445bbb4 6175reformatted to ease subsequent migration to newer versions of those
2c051651
DZ
6176sources.
6177
6178Please note that U-Boot is implemented in C (and to some small parts in
6179Assembler); no C++ is used, so please do not use C++ style comments (//)
6180in your code.
c609719b 6181
2729af9d
WD
6182Please also stick to the following formatting rules:
6183- remove any trailing white space
7ca9296e 6184- use TAB characters for indentation and vertical alignment, not spaces
2729af9d 6185- make sure NOT to use DOS '\r\n' line feeds
7ca9296e 6186- do not add more than 2 consecutive empty lines to source files
2729af9d 6187- do not add trailing empty lines to source files
180d3f74 6188
2729af9d
WD
6189Submissions which do not conform to the standards may be returned
6190with a request to reformat the changes.
c609719b
WD
6191
6192
2729af9d
WD
6193Submitting Patches:
6194-------------------
c609719b 6195
2729af9d
WD
6196Since the number of patches for U-Boot is growing, we need to
6197establish some rules. Submissions which do not conform to these rules
6198may be rejected, even when they contain important and valuable stuff.
c609719b 6199
0d28f34b 6200Please see http://www.denx.de/wiki/U-Boot/Patches for details.
218ca724 6201
0668236b
WD
6202Patches shall be sent to the u-boot mailing list <u-boot@lists.denx.de>;
6203see http://lists.denx.de/mailman/listinfo/u-boot
6204
2729af9d
WD
6205When you send a patch, please include the following information with
6206it:
c609719b 6207
2729af9d
WD
6208* For bug fixes: a description of the bug and how your patch fixes
6209 this bug. Please try to include a way of demonstrating that the
6210 patch actually fixes something.
c609719b 6211
2729af9d
WD
6212* For new features: a description of the feature and your
6213 implementation.
c609719b 6214
2729af9d 6215* A CHANGELOG entry as plaintext (separate from the patch)
c609719b 6216
7207b366
RD
6217* For major contributions, add a MAINTAINERS file with your
6218 information and associated file and directory references.
c609719b 6219
27af930e
AA
6220* When you add support for a new board, don't forget to add a
6221 maintainer e-mail address to the boards.cfg file, too.
c609719b 6222
2729af9d
WD
6223* If your patch adds new configuration options, don't forget to
6224 document these in the README file.
c609719b 6225
218ca724
WD
6226* The patch itself. If you are using git (which is *strongly*
6227 recommended) you can easily generate the patch using the
7ca9296e 6228 "git format-patch". If you then use "git send-email" to send it to
218ca724
WD
6229 the U-Boot mailing list, you will avoid most of the common problems
6230 with some other mail clients.
6231
6232 If you cannot use git, use "diff -purN OLD NEW". If your version of
6233 diff does not support these options, then get the latest version of
6234 GNU diff.
c609719b 6235
218ca724
WD
6236 The current directory when running this command shall be the parent
6237 directory of the U-Boot source tree (i. e. please make sure that
6238 your patch includes sufficient directory information for the
6239 affected files).
6dff5529 6240
218ca724
WD
6241 We prefer patches as plain text. MIME attachments are discouraged,
6242 and compressed attachments must not be used.
c609719b 6243
2729af9d
WD
6244* If one logical set of modifications affects or creates several
6245 files, all these changes shall be submitted in a SINGLE patch file.
52f52c14 6246
2729af9d
WD
6247* Changesets that contain different, unrelated modifications shall be
6248 submitted as SEPARATE patches, one patch per changeset.
8bde7f77 6249
52f52c14 6250
2729af9d 6251Notes:
c609719b 6252
6de80f21 6253* Before sending the patch, run the buildman script on your patched
2729af9d
WD
6254 source tree and make sure that no errors or warnings are reported
6255 for any of the boards.
c609719b 6256
2729af9d
WD
6257* Keep your modifications to the necessary minimum: A patch
6258 containing several unrelated changes or arbitrary reformats will be
6259 returned with a request to re-formatting / split it.
c609719b 6260
2729af9d
WD
6261* If you modify existing code, make sure that your new code does not
6262 add to the memory footprint of the code ;-) Small is beautiful!
6263 When adding new features, these should compile conditionally only
6264 (using #ifdef), and the resulting code with the new feature
6265 disabled must not need more memory than the old code without your
6266 modification.
90dc6704 6267
0668236b
WD
6268* Remember that there is a size limit of 100 kB per message on the
6269 u-boot mailing list. Bigger patches will be moderated. If they are
6270 reasonable and not too big, they will be acknowledged. But patches
6271 bigger than the size limit should be avoided.