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CommitLineData
272cc70b
AF
1/*
2 * Copyright 2008, Freescale Semiconductor, Inc
3 * Andy Fleming
4 *
5 * Based vaguely on the Linux code
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26#include <config.h>
27#include <common.h>
28#include <command.h>
29#include <mmc.h>
30#include <part.h>
31#include <malloc.h>
32#include <linux/list.h>
9b1f942c 33#include <div64.h>
272cc70b 34
ce0fbcd2
MW
35/* Set block count limit because of 16 bit register limit on some hardware*/
36#ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT
37#define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535
38#endif
39
272cc70b
AF
40static struct list_head mmc_devices;
41static int cur_dev_num = -1;
42
d23d8d7e
NK
43int __weak board_mmc_getwp(struct mmc *mmc)
44{
45 return -1;
46}
47
48int mmc_getwp(struct mmc *mmc)
49{
50 int wp;
51
52 wp = board_mmc_getwp(mmc);
53
d4e1da4e
PK
54 if (wp < 0) {
55 if (mmc->getwp)
56 wp = mmc->getwp(mmc);
57 else
58 wp = 0;
59 }
d23d8d7e
NK
60
61 return wp;
62}
63
314284b1 64int __board_mmc_getcd(struct mmc *mmc) {
11fdade2
SB
65 return -1;
66}
67
314284b1 68int board_mmc_getcd(struct mmc *mmc)__attribute__((weak,
11fdade2
SB
69 alias("__board_mmc_getcd")));
70
fdbb873e
KP
71static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
72 struct mmc_data *data)
272cc70b 73{
8635ff9e 74 struct mmc_data backup;
5db2fe3a 75 int ret;
8635ff9e
MV
76
77 memset(&backup, 0, sizeof(backup));
78
8635ff9e 79#ifdef CONFIG_MMC_TRACE
5db2fe3a
RR
80 int i;
81 u8 *ptr;
82
83 printf("CMD_SEND:%d\n", cmd->cmdidx);
84 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
5db2fe3a
RR
85 ret = mmc->send_cmd(mmc, cmd, data);
86 switch (cmd->resp_type) {
87 case MMC_RSP_NONE:
88 printf("\t\tMMC_RSP_NONE\n");
89 break;
90 case MMC_RSP_R1:
91 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
92 cmd->response[0]);
93 break;
94 case MMC_RSP_R1b:
95 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
96 cmd->response[0]);
97 break;
98 case MMC_RSP_R2:
99 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
100 cmd->response[0]);
101 printf("\t\t \t\t 0x%08X \n",
102 cmd->response[1]);
103 printf("\t\t \t\t 0x%08X \n",
104 cmd->response[2]);
105 printf("\t\t \t\t 0x%08X \n",
106 cmd->response[3]);
107 printf("\n");
108 printf("\t\t\t\t\tDUMPING DATA\n");
109 for (i = 0; i < 4; i++) {
110 int j;
111 printf("\t\t\t\t\t%03d - ", i*4);
146bec79 112 ptr = (u8 *)&cmd->response[i];
5db2fe3a
RR
113 ptr += 3;
114 for (j = 0; j < 4; j++)
115 printf("%02X ", *ptr--);
116 printf("\n");
117 }
118 break;
119 case MMC_RSP_R3:
120 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
121 cmd->response[0]);
122 break;
123 default:
124 printf("\t\tERROR MMC rsp not supported\n");
125 break;
126 }
5db2fe3a 127#else
8635ff9e 128 ret = mmc->send_cmd(mmc, cmd, data);
5db2fe3a 129#endif
8635ff9e 130 return ret;
272cc70b
AF
131}
132
fdbb873e 133static int mmc_send_status(struct mmc *mmc, int timeout)
5d4fc8d9
RR
134{
135 struct mmc_cmd cmd;
d617c426 136 int err, retries = 5;
5d4fc8d9
RR
137#ifdef CONFIG_MMC_TRACE
138 int status;
139#endif
140
141 cmd.cmdidx = MMC_CMD_SEND_STATUS;
142 cmd.resp_type = MMC_RSP_R1;
aaf3d41a
MV
143 if (!mmc_host_is_spi(mmc))
144 cmd.cmdarg = mmc->rca << 16;
5d4fc8d9
RR
145
146 do {
147 err = mmc_send_cmd(mmc, &cmd, NULL);
d617c426
JK
148 if (!err) {
149 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
150 (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
151 MMC_STATE_PRG)
152 break;
153 else if (cmd.response[0] & MMC_STATUS_MASK) {
154 printf("Status Error: 0x%08X\n",
155 cmd.response[0]);
156 return COMM_ERR;
157 }
158 } else if (--retries < 0)
5d4fc8d9 159 return err;
5d4fc8d9
RR
160
161 udelay(1000);
162
5d4fc8d9
RR
163 } while (timeout--);
164
5db2fe3a
RR
165#ifdef CONFIG_MMC_TRACE
166 status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
167 printf("CURR STATE:%d\n", status);
168#endif
5b0c942f 169 if (timeout <= 0) {
5d4fc8d9
RR
170 printf("Timeout waiting card ready\n");
171 return TIMEOUT;
172 }
173
174 return 0;
175}
176
fdbb873e 177static int mmc_set_blocklen(struct mmc *mmc, int len)
272cc70b
AF
178{
179 struct mmc_cmd cmd;
180
181 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
182 cmd.resp_type = MMC_RSP_R1;
183 cmd.cmdarg = len;
272cc70b
AF
184
185 return mmc_send_cmd(mmc, &cmd, NULL);
186}
187
188struct mmc *find_mmc_device(int dev_num)
189{
190 struct mmc *m;
191 struct list_head *entry;
192
193 list_for_each(entry, &mmc_devices) {
194 m = list_entry(entry, struct mmc, link);
195
196 if (m->block_dev.dev == dev_num)
197 return m;
198 }
199
200 printf("MMC Device %d not found\n", dev_num);
201
202 return NULL;
203}
204
e6f99a56
LW
205static ulong mmc_erase_t(struct mmc *mmc, ulong start, lbaint_t blkcnt)
206{
207 struct mmc_cmd cmd;
208 ulong end;
209 int err, start_cmd, end_cmd;
210
211 if (mmc->high_capacity)
212 end = start + blkcnt - 1;
213 else {
214 end = (start + blkcnt - 1) * mmc->write_bl_len;
215 start *= mmc->write_bl_len;
216 }
217
218 if (IS_SD(mmc)) {
219 start_cmd = SD_CMD_ERASE_WR_BLK_START;
220 end_cmd = SD_CMD_ERASE_WR_BLK_END;
221 } else {
222 start_cmd = MMC_CMD_ERASE_GROUP_START;
223 end_cmd = MMC_CMD_ERASE_GROUP_END;
224 }
225
226 cmd.cmdidx = start_cmd;
227 cmd.cmdarg = start;
228 cmd.resp_type = MMC_RSP_R1;
e6f99a56
LW
229
230 err = mmc_send_cmd(mmc, &cmd, NULL);
231 if (err)
232 goto err_out;
233
234 cmd.cmdidx = end_cmd;
235 cmd.cmdarg = end;
236
237 err = mmc_send_cmd(mmc, &cmd, NULL);
238 if (err)
239 goto err_out;
240
241 cmd.cmdidx = MMC_CMD_ERASE;
242 cmd.cmdarg = SECURE_ERASE;
243 cmd.resp_type = MMC_RSP_R1b;
244
245 err = mmc_send_cmd(mmc, &cmd, NULL);
246 if (err)
247 goto err_out;
248
249 return 0;
250
251err_out:
252 puts("mmc erase failed\n");
253 return err;
254}
255
256static unsigned long
ff8fef56 257mmc_berase(int dev_num, lbaint_t start, lbaint_t blkcnt)
e6f99a56
LW
258{
259 int err = 0;
260 struct mmc *mmc = find_mmc_device(dev_num);
261 lbaint_t blk = 0, blk_r = 0;
d2d8afae 262 int timeout = 1000;
e6f99a56
LW
263
264 if (!mmc)
265 return -1;
266
267 if ((start % mmc->erase_grp_size) || (blkcnt % mmc->erase_grp_size))
268 printf("\n\nCaution! Your devices Erase group is 0x%x\n"
ff8fef56
SS
269 "The erase range would be change to "
270 "0x" LBAF "~0x" LBAF "\n\n",
e6f99a56
LW
271 mmc->erase_grp_size, start & ~(mmc->erase_grp_size - 1),
272 ((start + blkcnt + mmc->erase_grp_size)
273 & ~(mmc->erase_grp_size - 1)) - 1);
274
275 while (blk < blkcnt) {
276 blk_r = ((blkcnt - blk) > mmc->erase_grp_size) ?
277 mmc->erase_grp_size : (blkcnt - blk);
278 err = mmc_erase_t(mmc, start + blk, blk_r);
279 if (err)
280 break;
281
282 blk += blk_r;
d2d8afae
JH
283
284 /* Waiting for the ready status */
285 if (mmc_send_status(mmc, timeout))
286 return 0;
e6f99a56
LW
287 }
288
289 return blk;
290}
291
272cc70b 292static ulong
ff8fef56 293mmc_write_blocks(struct mmc *mmc, lbaint_t start, lbaint_t blkcnt, const void*src)
272cc70b
AF
294{
295 struct mmc_cmd cmd;
296 struct mmc_data data;
5d4fc8d9 297 int timeout = 1000;
272cc70b 298
d2bf29e3 299 if ((start + blkcnt) > mmc->block_dev.lba) {
ff8fef56 300 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
d2bf29e3
LW
301 start + blkcnt, mmc->block_dev.lba);
302 return 0;
303 }
272cc70b 304
a586c0aa
RC
305 if (blkcnt == 0)
306 return 0;
307 else if (blkcnt == 1)
272cc70b 308 cmd.cmdidx = MMC_CMD_WRITE_SINGLE_BLOCK;
a586c0aa
RC
309 else
310 cmd.cmdidx = MMC_CMD_WRITE_MULTIPLE_BLOCK;
272cc70b
AF
311
312 if (mmc->high_capacity)
313 cmd.cmdarg = start;
314 else
def412b6 315 cmd.cmdarg = start * mmc->write_bl_len;
272cc70b
AF
316
317 cmd.resp_type = MMC_RSP_R1;
272cc70b
AF
318
319 data.src = src;
320 data.blocks = blkcnt;
def412b6 321 data.blocksize = mmc->write_bl_len;
272cc70b
AF
322 data.flags = MMC_DATA_WRITE;
323
def412b6
SS
324 if (mmc_send_cmd(mmc, &cmd, &data)) {
325 printf("mmc write failed\n");
326 return 0;
272cc70b
AF
327 }
328
d52ebf10
TC
329 /* SPI multiblock writes terminate using a special
330 * token, not a STOP_TRANSMISSION request.
331 */
332 if (!mmc_host_is_spi(mmc) && blkcnt > 1) {
272cc70b
AF
333 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
334 cmd.cmdarg = 0;
335 cmd.resp_type = MMC_RSP_R1b;
def412b6
SS
336 if (mmc_send_cmd(mmc, &cmd, NULL)) {
337 printf("mmc fail to send stop cmd\n");
338 return 0;
0158126e 339 }
272cc70b
AF
340 }
341
93ad0d18
JK
342 /* Waiting for the ready status */
343 if (mmc_send_status(mmc, timeout))
344 return 0;
345
272cc70b
AF
346 return blkcnt;
347}
348
0158126e 349static ulong
ff8fef56 350mmc_bwrite(int dev_num, lbaint_t start, lbaint_t blkcnt, const void*src)
0158126e 351{
0158126e
LW
352 lbaint_t cur, blocks_todo = blkcnt;
353
def412b6 354 struct mmc *mmc = find_mmc_device(dev_num);
0158126e 355 if (!mmc)
def412b6 356 return 0;
0158126e 357
def412b6
SS
358 if (mmc_set_blocklen(mmc, mmc->write_bl_len))
359 return 0;
0158126e
LW
360
361 do {
8feafcc4 362 cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo;
0158126e 363 if(mmc_write_blocks(mmc, start, cur, src) != cur)
def412b6 364 return 0;
0158126e
LW
365 blocks_todo -= cur;
366 start += cur;
367 src += cur * mmc->write_bl_len;
368 } while (blocks_todo > 0);
369
370 return blkcnt;
371}
372
ff8fef56 373static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
fdbb873e 374 lbaint_t blkcnt)
272cc70b
AF
375{
376 struct mmc_cmd cmd;
377 struct mmc_data data;
378
4a1a06bc
AS
379 if (blkcnt > 1)
380 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
381 else
382 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
272cc70b
AF
383
384 if (mmc->high_capacity)
4a1a06bc 385 cmd.cmdarg = start;
272cc70b 386 else
4a1a06bc 387 cmd.cmdarg = start * mmc->read_bl_len;
272cc70b
AF
388
389 cmd.resp_type = MMC_RSP_R1;
272cc70b
AF
390
391 data.dest = dst;
4a1a06bc 392 data.blocks = blkcnt;
272cc70b
AF
393 data.blocksize = mmc->read_bl_len;
394 data.flags = MMC_DATA_READ;
395
4a1a06bc
AS
396 if (mmc_send_cmd(mmc, &cmd, &data))
397 return 0;
272cc70b 398
4a1a06bc
AS
399 if (blkcnt > 1) {
400 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
401 cmd.cmdarg = 0;
402 cmd.resp_type = MMC_RSP_R1b;
4a1a06bc
AS
403 if (mmc_send_cmd(mmc, &cmd, NULL)) {
404 printf("mmc fail to send stop cmd\n");
405 return 0;
406 }
272cc70b
AF
407 }
408
4a1a06bc 409 return blkcnt;
272cc70b
AF
410}
411
ff8fef56 412static ulong mmc_bread(int dev_num, lbaint_t start, lbaint_t blkcnt, void *dst)
272cc70b 413{
4a1a06bc
AS
414 lbaint_t cur, blocks_todo = blkcnt;
415
416 if (blkcnt == 0)
417 return 0;
272cc70b 418
4a1a06bc 419 struct mmc *mmc = find_mmc_device(dev_num);
272cc70b
AF
420 if (!mmc)
421 return 0;
422
d2bf29e3 423 if ((start + blkcnt) > mmc->block_dev.lba) {
ff8fef56 424 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
d2bf29e3
LW
425 start + blkcnt, mmc->block_dev.lba);
426 return 0;
427 }
272cc70b 428
4a1a06bc 429 if (mmc_set_blocklen(mmc, mmc->read_bl_len))
272cc70b 430 return 0;
272cc70b 431
4a1a06bc 432 do {
8feafcc4 433 cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo;
4a1a06bc
AS
434 if(mmc_read_blocks(mmc, dst, start, cur) != cur)
435 return 0;
436 blocks_todo -= cur;
437 start += cur;
438 dst += cur * mmc->read_bl_len;
439 } while (blocks_todo > 0);
272cc70b
AF
440
441 return blkcnt;
442}
443
fdbb873e 444static int mmc_go_idle(struct mmc *mmc)
272cc70b
AF
445{
446 struct mmc_cmd cmd;
447 int err;
448
449 udelay(1000);
450
451 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
452 cmd.cmdarg = 0;
453 cmd.resp_type = MMC_RSP_NONE;
272cc70b
AF
454
455 err = mmc_send_cmd(mmc, &cmd, NULL);
456
457 if (err)
458 return err;
459
460 udelay(2000);
461
462 return 0;
463}
464
fdbb873e 465static int sd_send_op_cond(struct mmc *mmc)
272cc70b
AF
466{
467 int timeout = 1000;
468 int err;
469 struct mmc_cmd cmd;
470
471 do {
472 cmd.cmdidx = MMC_CMD_APP_CMD;
473 cmd.resp_type = MMC_RSP_R1;
474 cmd.cmdarg = 0;
272cc70b
AF
475
476 err = mmc_send_cmd(mmc, &cmd, NULL);
477
478 if (err)
479 return err;
480
481 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
482 cmd.resp_type = MMC_RSP_R3;
250de12b
SB
483
484 /*
485 * Most cards do not answer if some reserved bits
486 * in the ocr are set. However, Some controller
487 * can set bit 7 (reserved for low voltages), but
488 * how to manage low voltages SD card is not yet
489 * specified.
490 */
d52ebf10
TC
491 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
492 (mmc->voltages & 0xff8000);
272cc70b
AF
493
494 if (mmc->version == SD_VERSION_2)
495 cmd.cmdarg |= OCR_HCS;
496
497 err = mmc_send_cmd(mmc, &cmd, NULL);
498
499 if (err)
500 return err;
501
502 udelay(1000);
503 } while ((!(cmd.response[0] & OCR_BUSY)) && timeout--);
504
505 if (timeout <= 0)
506 return UNUSABLE_ERR;
507
508 if (mmc->version != SD_VERSION_2)
509 mmc->version = SD_VERSION_1_0;
510
d52ebf10
TC
511 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
512 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
513 cmd.resp_type = MMC_RSP_R3;
514 cmd.cmdarg = 0;
d52ebf10
TC
515
516 err = mmc_send_cmd(mmc, &cmd, NULL);
517
518 if (err)
519 return err;
520 }
521
998be3dd 522 mmc->ocr = cmd.response[0];
272cc70b
AF
523
524 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
525 mmc->rca = 0;
526
527 return 0;
528}
529
e9550449
CLC
530/* We pass in the cmd since otherwise the init seems to fail */
531static int mmc_send_op_cond_iter(struct mmc *mmc, struct mmc_cmd *cmd,
532 int use_arg)
272cc70b 533{
272cc70b
AF
534 int err;
535
e9550449
CLC
536 cmd->cmdidx = MMC_CMD_SEND_OP_COND;
537 cmd->resp_type = MMC_RSP_R3;
538 cmd->cmdarg = 0;
539 if (use_arg && !mmc_host_is_spi(mmc)) {
540 cmd->cmdarg =
541 (mmc->voltages &
542 (mmc->op_cond_response & OCR_VOLTAGE_MASK)) |
543 (mmc->op_cond_response & OCR_ACCESS_MODE);
544
545 if (mmc->host_caps & MMC_MODE_HC)
546 cmd->cmdarg |= OCR_HCS;
547 }
548 err = mmc_send_cmd(mmc, cmd, NULL);
549 if (err)
550 return err;
551 mmc->op_cond_response = cmd->response[0];
552 return 0;
553}
554
555int mmc_send_op_cond(struct mmc *mmc)
556{
557 struct mmc_cmd cmd;
558 int err, i;
559
272cc70b
AF
560 /* Some cards seem to need this */
561 mmc_go_idle(mmc);
562
31cacbab 563 /* Asking to the card its capabilities */
e9550449
CLC
564 mmc->op_cond_pending = 1;
565 for (i = 0; i < 2; i++) {
566 err = mmc_send_op_cond_iter(mmc, &cmd, i != 0);
567 if (err)
568 return err;
cd6881b5 569
e9550449
CLC
570 /* exit if not busy (flag seems to be inverted) */
571 if (mmc->op_cond_response & OCR_BUSY)
572 return 0;
573 }
574 return IN_PROGRESS;
575}
cd6881b5 576
e9550449
CLC
577int mmc_complete_op_cond(struct mmc *mmc)
578{
579 struct mmc_cmd cmd;
580 int timeout = 1000;
581 uint start;
582 int err;
cd6881b5 583
e9550449
CLC
584 mmc->op_cond_pending = 0;
585 start = get_timer(0);
272cc70b 586 do {
e9550449 587 err = mmc_send_op_cond_iter(mmc, &cmd, 1);
272cc70b
AF
588 if (err)
589 return err;
e9550449
CLC
590 if (get_timer(start) > timeout)
591 return UNUSABLE_ERR;
592 udelay(100);
593 } while (!(mmc->op_cond_response & OCR_BUSY));
272cc70b 594
d52ebf10
TC
595 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
596 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
597 cmd.resp_type = MMC_RSP_R3;
598 cmd.cmdarg = 0;
d52ebf10
TC
599
600 err = mmc_send_cmd(mmc, &cmd, NULL);
601
602 if (err)
603 return err;
604 }
605
272cc70b 606 mmc->version = MMC_VERSION_UNKNOWN;
998be3dd 607 mmc->ocr = cmd.response[0];
272cc70b
AF
608
609 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
610 mmc->rca = 0;
611
612 return 0;
613}
614
615
fdbb873e 616static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
272cc70b
AF
617{
618 struct mmc_cmd cmd;
619 struct mmc_data data;
620 int err;
621
622 /* Get the Card Status Register */
623 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
624 cmd.resp_type = MMC_RSP_R1;
625 cmd.cmdarg = 0;
272cc70b 626
cdfd1ac6 627 data.dest = (char *)ext_csd;
272cc70b 628 data.blocks = 1;
8bfa195e 629 data.blocksize = MMC_MAX_BLOCK_LEN;
272cc70b
AF
630 data.flags = MMC_DATA_READ;
631
632 err = mmc_send_cmd(mmc, &cmd, &data);
633
634 return err;
635}
636
637
fdbb873e 638static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
272cc70b
AF
639{
640 struct mmc_cmd cmd;
5d4fc8d9
RR
641 int timeout = 1000;
642 int ret;
272cc70b
AF
643
644 cmd.cmdidx = MMC_CMD_SWITCH;
645 cmd.resp_type = MMC_RSP_R1b;
646 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
5d4fc8d9
RR
647 (index << 16) |
648 (value << 8);
272cc70b 649
5d4fc8d9
RR
650 ret = mmc_send_cmd(mmc, &cmd, NULL);
651
652 /* Waiting for the ready status */
93ad0d18
JK
653 if (!ret)
654 ret = mmc_send_status(mmc, timeout);
5d4fc8d9
RR
655
656 return ret;
657
272cc70b
AF
658}
659
fdbb873e 660static int mmc_change_freq(struct mmc *mmc)
272cc70b 661{
8bfa195e 662 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
272cc70b
AF
663 char cardtype;
664 int err;
665
666 mmc->card_caps = 0;
667
d52ebf10
TC
668 if (mmc_host_is_spi(mmc))
669 return 0;
670
272cc70b
AF
671 /* Only version 4 supports high-speed */
672 if (mmc->version < MMC_VERSION_4)
673 return 0;
674
272cc70b
AF
675 err = mmc_send_ext_csd(mmc, ext_csd);
676
677 if (err)
678 return err;
679
0560db18 680 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
272cc70b
AF
681
682 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
683
684 if (err)
685 return err;
686
687 /* Now check to see that it worked */
688 err = mmc_send_ext_csd(mmc, ext_csd);
689
690 if (err)
691 return err;
692
693 /* No high-speed support */
0560db18 694 if (!ext_csd[EXT_CSD_HS_TIMING])
272cc70b
AF
695 return 0;
696
697 /* High Speed is set, there are two types: 52MHz and 26MHz */
698 if (cardtype & MMC_HS_52MHZ)
699 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
700 else
701 mmc->card_caps |= MMC_MODE_HS;
702
703 return 0;
704}
705
f866a46d
SW
706static int mmc_set_capacity(struct mmc *mmc, int part_num)
707{
708 switch (part_num) {
709 case 0:
710 mmc->capacity = mmc->capacity_user;
711 break;
712 case 1:
713 case 2:
714 mmc->capacity = mmc->capacity_boot;
715 break;
716 case 3:
717 mmc->capacity = mmc->capacity_rpmb;
718 break;
719 case 4:
720 case 5:
721 case 6:
722 case 7:
723 mmc->capacity = mmc->capacity_gp[part_num - 4];
724 break;
725 default:
726 return -1;
727 }
728
729 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
730
731 return 0;
732}
733
bc897b1d
LW
734int mmc_switch_part(int dev_num, unsigned int part_num)
735{
736 struct mmc *mmc = find_mmc_device(dev_num);
f866a46d 737 int ret;
bc897b1d
LW
738
739 if (!mmc)
740 return -1;
741
f866a46d
SW
742 ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
743 (mmc->part_config & ~PART_ACCESS_MASK)
744 | (part_num & PART_ACCESS_MASK));
745 if (ret)
746 return ret;
747
748 return mmc_set_capacity(mmc, part_num);
bc897b1d
LW
749}
750
48972d90
TR
751int mmc_getcd(struct mmc *mmc)
752{
753 int cd;
754
755 cd = board_mmc_getcd(mmc);
756
d4e1da4e
PK
757 if (cd < 0) {
758 if (mmc->getcd)
759 cd = mmc->getcd(mmc);
760 else
761 cd = 1;
762 }
48972d90
TR
763
764 return cd;
765}
766
fdbb873e 767static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
272cc70b
AF
768{
769 struct mmc_cmd cmd;
770 struct mmc_data data;
771
772 /* Switch the frequency */
773 cmd.cmdidx = SD_CMD_SWITCH_FUNC;
774 cmd.resp_type = MMC_RSP_R1;
775 cmd.cmdarg = (mode << 31) | 0xffffff;
776 cmd.cmdarg &= ~(0xf << (group * 4));
777 cmd.cmdarg |= value << (group * 4);
272cc70b
AF
778
779 data.dest = (char *)resp;
780 data.blocksize = 64;
781 data.blocks = 1;
782 data.flags = MMC_DATA_READ;
783
784 return mmc_send_cmd(mmc, &cmd, &data);
785}
786
787
fdbb873e 788static int sd_change_freq(struct mmc *mmc)
272cc70b
AF
789{
790 int err;
791 struct mmc_cmd cmd;
f781dd38
A
792 ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
793 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
272cc70b
AF
794 struct mmc_data data;
795 int timeout;
796
797 mmc->card_caps = 0;
798
d52ebf10
TC
799 if (mmc_host_is_spi(mmc))
800 return 0;
801
272cc70b
AF
802 /* Read the SCR to find out if this card supports higher speeds */
803 cmd.cmdidx = MMC_CMD_APP_CMD;
804 cmd.resp_type = MMC_RSP_R1;
805 cmd.cmdarg = mmc->rca << 16;
272cc70b
AF
806
807 err = mmc_send_cmd(mmc, &cmd, NULL);
808
809 if (err)
810 return err;
811
812 cmd.cmdidx = SD_CMD_APP_SEND_SCR;
813 cmd.resp_type = MMC_RSP_R1;
814 cmd.cmdarg = 0;
272cc70b
AF
815
816 timeout = 3;
817
818retry_scr:
f781dd38 819 data.dest = (char *)scr;
272cc70b
AF
820 data.blocksize = 8;
821 data.blocks = 1;
822 data.flags = MMC_DATA_READ;
823
824 err = mmc_send_cmd(mmc, &cmd, &data);
825
826 if (err) {
827 if (timeout--)
828 goto retry_scr;
829
830 return err;
831 }
832
4e3d89ba
YK
833 mmc->scr[0] = __be32_to_cpu(scr[0]);
834 mmc->scr[1] = __be32_to_cpu(scr[1]);
272cc70b
AF
835
836 switch ((mmc->scr[0] >> 24) & 0xf) {
837 case 0:
838 mmc->version = SD_VERSION_1_0;
839 break;
840 case 1:
841 mmc->version = SD_VERSION_1_10;
842 break;
843 case 2:
844 mmc->version = SD_VERSION_2;
1741c64d
JC
845 if ((mmc->scr[0] >> 15) & 0x1)
846 mmc->version = SD_VERSION_3;
272cc70b
AF
847 break;
848 default:
849 mmc->version = SD_VERSION_1_0;
850 break;
851 }
852
b44c7083
AS
853 if (mmc->scr[0] & SD_DATA_4BIT)
854 mmc->card_caps |= MMC_MODE_4BIT;
855
272cc70b
AF
856 /* Version 1.0 doesn't support switching */
857 if (mmc->version == SD_VERSION_1_0)
858 return 0;
859
860 timeout = 4;
861 while (timeout--) {
862 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
f781dd38 863 (u8 *)switch_status);
272cc70b
AF
864
865 if (err)
866 return err;
867
868 /* The high-speed function is busy. Try again */
4e3d89ba 869 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
272cc70b
AF
870 break;
871 }
872
272cc70b 873 /* If high-speed isn't supported, we return */
4e3d89ba 874 if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
272cc70b
AF
875 return 0;
876
2c3fbf4c
ML
877 /*
878 * If the host doesn't support SD_HIGHSPEED, do not switch card to
879 * HIGHSPEED mode even if the card support SD_HIGHSPPED.
880 * This can avoid furthur problem when the card runs in different
881 * mode between the host.
882 */
883 if (!((mmc->host_caps & MMC_MODE_HS_52MHz) &&
884 (mmc->host_caps & MMC_MODE_HS)))
885 return 0;
886
f781dd38 887 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
272cc70b
AF
888
889 if (err)
890 return err;
891
4e3d89ba 892 if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
272cc70b
AF
893 mmc->card_caps |= MMC_MODE_HS;
894
895 return 0;
896}
897
898/* frequency bases */
899/* divided by 10 to be nice to platforms without floating point */
5f837c2c 900static const int fbase[] = {
272cc70b
AF
901 10000,
902 100000,
903 1000000,
904 10000000,
905};
906
907/* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
908 * to platforms without floating point.
909 */
5f837c2c 910static const int multipliers[] = {
272cc70b
AF
911 0, /* reserved */
912 10,
913 12,
914 13,
915 15,
916 20,
917 25,
918 30,
919 35,
920 40,
921 45,
922 50,
923 55,
924 60,
925 70,
926 80,
927};
928
fdbb873e 929static void mmc_set_ios(struct mmc *mmc)
272cc70b
AF
930{
931 mmc->set_ios(mmc);
932}
933
934void mmc_set_clock(struct mmc *mmc, uint clock)
935{
936 if (clock > mmc->f_max)
937 clock = mmc->f_max;
938
939 if (clock < mmc->f_min)
940 clock = mmc->f_min;
941
942 mmc->clock = clock;
943
944 mmc_set_ios(mmc);
945}
946
fdbb873e 947static void mmc_set_bus_width(struct mmc *mmc, uint width)
272cc70b
AF
948{
949 mmc->bus_width = width;
950
951 mmc_set_ios(mmc);
952}
953
fdbb873e 954static int mmc_startup(struct mmc *mmc)
272cc70b 955{
f866a46d 956 int err, i;
272cc70b 957 uint mult, freq;
639b7827 958 u64 cmult, csize, capacity;
272cc70b 959 struct mmc_cmd cmd;
8bfa195e
SG
960 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
961 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
5d4fc8d9 962 int timeout = 1000;
272cc70b 963
d52ebf10
TC
964#ifdef CONFIG_MMC_SPI_CRC_ON
965 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
966 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
967 cmd.resp_type = MMC_RSP_R1;
968 cmd.cmdarg = 1;
d52ebf10
TC
969 err = mmc_send_cmd(mmc, &cmd, NULL);
970
971 if (err)
972 return err;
973 }
974#endif
975
272cc70b 976 /* Put the Card in Identify Mode */
d52ebf10
TC
977 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
978 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
272cc70b
AF
979 cmd.resp_type = MMC_RSP_R2;
980 cmd.cmdarg = 0;
272cc70b
AF
981
982 err = mmc_send_cmd(mmc, &cmd, NULL);
983
984 if (err)
985 return err;
986
987 memcpy(mmc->cid, cmd.response, 16);
988
989 /*
990 * For MMC cards, set the Relative Address.
991 * For SD cards, get the Relatvie Address.
992 * This also puts the cards into Standby State
993 */
d52ebf10
TC
994 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
995 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
996 cmd.cmdarg = mmc->rca << 16;
997 cmd.resp_type = MMC_RSP_R6;
272cc70b 998
d52ebf10 999 err = mmc_send_cmd(mmc, &cmd, NULL);
272cc70b 1000
d52ebf10
TC
1001 if (err)
1002 return err;
272cc70b 1003
d52ebf10
TC
1004 if (IS_SD(mmc))
1005 mmc->rca = (cmd.response[0] >> 16) & 0xffff;
1006 }
272cc70b
AF
1007
1008 /* Get the Card-Specific Data */
1009 cmd.cmdidx = MMC_CMD_SEND_CSD;
1010 cmd.resp_type = MMC_RSP_R2;
1011 cmd.cmdarg = mmc->rca << 16;
272cc70b
AF
1012
1013 err = mmc_send_cmd(mmc, &cmd, NULL);
1014
5d4fc8d9
RR
1015 /* Waiting for the ready status */
1016 mmc_send_status(mmc, timeout);
1017
272cc70b
AF
1018 if (err)
1019 return err;
1020
998be3dd
RV
1021 mmc->csd[0] = cmd.response[0];
1022 mmc->csd[1] = cmd.response[1];
1023 mmc->csd[2] = cmd.response[2];
1024 mmc->csd[3] = cmd.response[3];
272cc70b
AF
1025
1026 if (mmc->version == MMC_VERSION_UNKNOWN) {
0b453ffe 1027 int version = (cmd.response[0] >> 26) & 0xf;
272cc70b
AF
1028
1029 switch (version) {
1030 case 0:
1031 mmc->version = MMC_VERSION_1_2;
1032 break;
1033 case 1:
1034 mmc->version = MMC_VERSION_1_4;
1035 break;
1036 case 2:
1037 mmc->version = MMC_VERSION_2_2;
1038 break;
1039 case 3:
1040 mmc->version = MMC_VERSION_3;
1041 break;
1042 case 4:
1043 mmc->version = MMC_VERSION_4;
1044 break;
1045 default:
1046 mmc->version = MMC_VERSION_1_2;
1047 break;
1048 }
1049 }
1050
1051 /* divide frequency by 10, since the mults are 10x bigger */
0b453ffe
RV
1052 freq = fbase[(cmd.response[0] & 0x7)];
1053 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
272cc70b
AF
1054
1055 mmc->tran_speed = freq * mult;
1056
998be3dd 1057 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
272cc70b
AF
1058
1059 if (IS_SD(mmc))
1060 mmc->write_bl_len = mmc->read_bl_len;
1061 else
998be3dd 1062 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
272cc70b
AF
1063
1064 if (mmc->high_capacity) {
1065 csize = (mmc->csd[1] & 0x3f) << 16
1066 | (mmc->csd[2] & 0xffff0000) >> 16;
1067 cmult = 8;
1068 } else {
1069 csize = (mmc->csd[1] & 0x3ff) << 2
1070 | (mmc->csd[2] & 0xc0000000) >> 30;
1071 cmult = (mmc->csd[2] & 0x00038000) >> 15;
1072 }
1073
f866a46d
SW
1074 mmc->capacity_user = (csize + 1) << (cmult + 2);
1075 mmc->capacity_user *= mmc->read_bl_len;
1076 mmc->capacity_boot = 0;
1077 mmc->capacity_rpmb = 0;
1078 for (i = 0; i < 4; i++)
1079 mmc->capacity_gp[i] = 0;
272cc70b 1080
8bfa195e
SG
1081 if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
1082 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
272cc70b 1083
8bfa195e
SG
1084 if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
1085 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
272cc70b
AF
1086
1087 /* Select the card, and put it into Transfer Mode */
d52ebf10
TC
1088 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1089 cmd.cmdidx = MMC_CMD_SELECT_CARD;
fe8f7066 1090 cmd.resp_type = MMC_RSP_R1;
d52ebf10 1091 cmd.cmdarg = mmc->rca << 16;
d52ebf10 1092 err = mmc_send_cmd(mmc, &cmd, NULL);
272cc70b 1093
d52ebf10
TC
1094 if (err)
1095 return err;
1096 }
272cc70b 1097
e6f99a56
LW
1098 /*
1099 * For SD, its erase group is always one sector
1100 */
1101 mmc->erase_grp_size = 1;
bc897b1d 1102 mmc->part_config = MMCPART_NOAVAILABLE;
d23e2c09
SG
1103 if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
1104 /* check ext_csd version and capacity */
1105 err = mmc_send_ext_csd(mmc, ext_csd);
fdbb873e 1106 if (!err && (ext_csd[EXT_CSD_REV] >= 2)) {
639b7827
YS
1107 /*
1108 * According to the JEDEC Standard, the value of
1109 * ext_csd's capacity is valid if the value is more
1110 * than 2GB
1111 */
0560db18
LW
1112 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
1113 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
1114 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
1115 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
8bfa195e 1116 capacity *= MMC_MAX_BLOCK_LEN;
b1f1e821 1117 if ((capacity >> 20) > 2 * 1024)
f866a46d 1118 mmc->capacity_user = capacity;
d23e2c09 1119 }
bc897b1d 1120
64f4a619
JC
1121 switch (ext_csd[EXT_CSD_REV]) {
1122 case 1:
1123 mmc->version = MMC_VERSION_4_1;
1124 break;
1125 case 2:
1126 mmc->version = MMC_VERSION_4_2;
1127 break;
1128 case 3:
1129 mmc->version = MMC_VERSION_4_3;
1130 break;
1131 case 5:
1132 mmc->version = MMC_VERSION_4_41;
1133 break;
1134 case 6:
1135 mmc->version = MMC_VERSION_4_5;
1136 break;
1137 }
1138
e6f99a56
LW
1139 /*
1140 * Check whether GROUP_DEF is set, if yes, read out
1141 * group size from ext_csd directly, or calculate
1142 * the group size from the csd value.
1143 */
8bfa195e 1144 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF]) {
0560db18 1145 mmc->erase_grp_size =
8bfa195e
SG
1146 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] *
1147 MMC_MAX_BLOCK_LEN * 1024;
1148 } else {
e6f99a56
LW
1149 int erase_gsz, erase_gmul;
1150 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
1151 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
1152 mmc->erase_grp_size = (erase_gsz + 1)
1153 * (erase_gmul + 1);
1154 }
1155
bc897b1d 1156 /* store the partition info of emmc */
8948ea83
SW
1157 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
1158 ext_csd[EXT_CSD_BOOT_MULT])
0560db18 1159 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
f866a46d
SW
1160
1161 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
1162
1163 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
1164
1165 for (i = 0; i < 4; i++) {
1166 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
1167 mmc->capacity_gp[i] = (ext_csd[idx + 2] << 16) +
1168 (ext_csd[idx + 1] << 8) + ext_csd[idx];
1169 mmc->capacity_gp[i] *=
1170 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1171 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1172 }
d23e2c09
SG
1173 }
1174
f866a46d
SW
1175 err = mmc_set_capacity(mmc, mmc->part_num);
1176 if (err)
1177 return err;
1178
272cc70b
AF
1179 if (IS_SD(mmc))
1180 err = sd_change_freq(mmc);
1181 else
1182 err = mmc_change_freq(mmc);
1183
1184 if (err)
1185 return err;
1186
1187 /* Restrict card's capabilities by what the host can do */
1188 mmc->card_caps &= mmc->host_caps;
1189
1190 if (IS_SD(mmc)) {
1191 if (mmc->card_caps & MMC_MODE_4BIT) {
1192 cmd.cmdidx = MMC_CMD_APP_CMD;
1193 cmd.resp_type = MMC_RSP_R1;
1194 cmd.cmdarg = mmc->rca << 16;
272cc70b
AF
1195
1196 err = mmc_send_cmd(mmc, &cmd, NULL);
1197 if (err)
1198 return err;
1199
1200 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1201 cmd.resp_type = MMC_RSP_R1;
1202 cmd.cmdarg = 2;
272cc70b
AF
1203 err = mmc_send_cmd(mmc, &cmd, NULL);
1204 if (err)
1205 return err;
1206
1207 mmc_set_bus_width(mmc, 4);
1208 }
1209
1210 if (mmc->card_caps & MMC_MODE_HS)
ad5fd922 1211 mmc->tran_speed = 50000000;
272cc70b 1212 else
ad5fd922 1213 mmc->tran_speed = 25000000;
272cc70b 1214 } else {
7798f6db
AF
1215 int idx;
1216
1217 /* An array of possible bus widths in order of preference */
1218 static unsigned ext_csd_bits[] = {
1219 EXT_CSD_BUS_WIDTH_8,
1220 EXT_CSD_BUS_WIDTH_4,
1221 EXT_CSD_BUS_WIDTH_1,
1222 };
1223
1224 /* An array to map CSD bus widths to host cap bits */
1225 static unsigned ext_to_hostcaps[] = {
1226 [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
1227 [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
1228 };
1229
1230 /* An array to map chosen bus width to an integer */
1231 static unsigned widths[] = {
1232 8, 4, 1,
1233 };
1234
1235 for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
1236 unsigned int extw = ext_csd_bits[idx];
1237
1238 /*
1239 * Check to make sure the controller supports
1240 * this bus width, if it's more than 1
1241 */
1242 if (extw != EXT_CSD_BUS_WIDTH_1 &&
1243 !(mmc->host_caps & ext_to_hostcaps[extw]))
1244 continue;
1245
272cc70b 1246 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
7798f6db 1247 EXT_CSD_BUS_WIDTH, extw);
272cc70b
AF
1248
1249 if (err)
4137894e 1250 continue;
272cc70b 1251
7798f6db 1252 mmc_set_bus_width(mmc, widths[idx]);
4137894e
LW
1253
1254 err = mmc_send_ext_csd(mmc, test_csd);
1255 if (!err && ext_csd[EXT_CSD_PARTITIONING_SUPPORT] \
1256 == test_csd[EXT_CSD_PARTITIONING_SUPPORT]
1257 && ext_csd[EXT_CSD_ERASE_GROUP_DEF] \
1258 == test_csd[EXT_CSD_ERASE_GROUP_DEF] \
1259 && ext_csd[EXT_CSD_REV] \
1260 == test_csd[EXT_CSD_REV]
1261 && ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] \
1262 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1263 && memcmp(&ext_csd[EXT_CSD_SEC_CNT], \
1264 &test_csd[EXT_CSD_SEC_CNT], 4) == 0) {
1265
7798f6db 1266 mmc->card_caps |= ext_to_hostcaps[extw];
4137894e
LW
1267 break;
1268 }
272cc70b
AF
1269 }
1270
1271 if (mmc->card_caps & MMC_MODE_HS) {
1272 if (mmc->card_caps & MMC_MODE_HS_52MHz)
ad5fd922 1273 mmc->tran_speed = 52000000;
272cc70b 1274 else
ad5fd922
JC
1275 mmc->tran_speed = 26000000;
1276 }
272cc70b
AF
1277 }
1278
ad5fd922
JC
1279 mmc_set_clock(mmc, mmc->tran_speed);
1280
272cc70b
AF
1281 /* fill in device description */
1282 mmc->block_dev.lun = 0;
1283 mmc->block_dev.type = 0;
1284 mmc->block_dev.blksz = mmc->read_bl_len;
0472fbfd 1285 mmc->block_dev.log2blksz = LOG2(mmc->block_dev.blksz);
9b1f942c 1286 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
babce5f6
TH
1287 sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x",
1288 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
1289 (mmc->cid[3] >> 16) & 0xffff);
1290 sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
1291 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1292 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
1293 (mmc->cid[2] >> 24) & 0xff);
1294 sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
1295 (mmc->cid[2] >> 16) & 0xf);
122efd43 1296#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
272cc70b 1297 init_part(&mmc->block_dev);
122efd43 1298#endif
272cc70b
AF
1299
1300 return 0;
1301}
1302
fdbb873e 1303static int mmc_send_if_cond(struct mmc *mmc)
272cc70b
AF
1304{
1305 struct mmc_cmd cmd;
1306 int err;
1307
1308 cmd.cmdidx = SD_CMD_SEND_IF_COND;
1309 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
1310 cmd.cmdarg = ((mmc->voltages & 0xff8000) != 0) << 8 | 0xaa;
1311 cmd.resp_type = MMC_RSP_R7;
272cc70b
AF
1312
1313 err = mmc_send_cmd(mmc, &cmd, NULL);
1314
1315 if (err)
1316 return err;
1317
998be3dd 1318 if ((cmd.response[0] & 0xff) != 0xaa)
272cc70b
AF
1319 return UNUSABLE_ERR;
1320 else
1321 mmc->version = SD_VERSION_2;
1322
1323 return 0;
1324}
1325
1326int mmc_register(struct mmc *mmc)
1327{
1328 /* Setup the universal parts of the block interface just once */
1329 mmc->block_dev.if_type = IF_TYPE_MMC;
1330 mmc->block_dev.dev = cur_dev_num++;
1331 mmc->block_dev.removable = 1;
1332 mmc->block_dev.block_read = mmc_bread;
1333 mmc->block_dev.block_write = mmc_bwrite;
e6f99a56 1334 mmc->block_dev.block_erase = mmc_berase;
8feafcc4
JR
1335 if (!mmc->b_max)
1336 mmc->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
272cc70b
AF
1337
1338 INIT_LIST_HEAD (&mmc->link);
1339
1340 list_add_tail (&mmc->link, &mmc_devices);
1341
1342 return 0;
1343}
1344
df3fc526 1345#ifdef CONFIG_PARTITIONS
272cc70b
AF
1346block_dev_desc_t *mmc_get_dev(int dev)
1347{
1348 struct mmc *mmc = find_mmc_device(dev);
6bb4b4bc 1349 if (!mmc || mmc_init(mmc))
40242bc3 1350 return NULL;
272cc70b 1351
40242bc3 1352 return &mmc->block_dev;
272cc70b 1353}
df3fc526 1354#endif
272cc70b 1355
e9550449 1356int mmc_start_init(struct mmc *mmc)
272cc70b 1357{
afd5932b 1358 int err;
272cc70b 1359
48972d90
TR
1360 if (mmc_getcd(mmc) == 0) {
1361 mmc->has_init = 0;
1362 printf("MMC: no card present\n");
1363 return NO_CARD_ERR;
1364 }
1365
bc897b1d
LW
1366 if (mmc->has_init)
1367 return 0;
1368
272cc70b
AF
1369 err = mmc->init(mmc);
1370
1371 if (err)
1372 return err;
1373
b86b85e2
IY
1374 mmc_set_bus_width(mmc, 1);
1375 mmc_set_clock(mmc, 1);
1376
272cc70b
AF
1377 /* Reset the Card */
1378 err = mmc_go_idle(mmc);
1379
1380 if (err)
1381 return err;
1382
bc897b1d
LW
1383 /* The internal partition reset to user partition(0) at every CMD0*/
1384 mmc->part_num = 0;
1385
272cc70b 1386 /* Test for SD version 2 */
afd5932b 1387 err = mmc_send_if_cond(mmc);
272cc70b 1388
272cc70b
AF
1389 /* Now try to get the SD card's operating condition */
1390 err = sd_send_op_cond(mmc);
1391
1392 /* If the command timed out, we check for an MMC card */
1393 if (err == TIMEOUT) {
1394 err = mmc_send_op_cond(mmc);
1395
e9550449 1396 if (err && err != IN_PROGRESS) {
272cc70b
AF
1397 printf("Card did not respond to voltage select!\n");
1398 return UNUSABLE_ERR;
1399 }
1400 }
1401
e9550449
CLC
1402 if (err == IN_PROGRESS)
1403 mmc->init_in_progress = 1;
1404
1405 return err;
1406}
1407
1408static int mmc_complete_init(struct mmc *mmc)
1409{
1410 int err = 0;
1411
1412 if (mmc->op_cond_pending)
1413 err = mmc_complete_op_cond(mmc);
1414
1415 if (!err)
1416 err = mmc_startup(mmc);
bc897b1d
LW
1417 if (err)
1418 mmc->has_init = 0;
1419 else
1420 mmc->has_init = 1;
e9550449
CLC
1421 mmc->init_in_progress = 0;
1422 return err;
1423}
1424
1425int mmc_init(struct mmc *mmc)
1426{
1427 int err = IN_PROGRESS;
1428 unsigned start = get_timer(0);
1429
1430 if (mmc->has_init)
1431 return 0;
1432 if (!mmc->init_in_progress)
1433 err = mmc_start_init(mmc);
1434
1435 if (!err || err == IN_PROGRESS)
1436 err = mmc_complete_init(mmc);
1437 debug("%s: %d, time %lu\n", __func__, err, get_timer(start));
bc897b1d 1438 return err;
272cc70b
AF
1439}
1440
1441/*
1442 * CPU and board-specific MMC initializations. Aliased function
1443 * signals caller to move on
1444 */
1445static int __def_mmc_init(bd_t *bis)
1446{
1447 return -1;
1448}
1449
f9a109b3
PT
1450int cpu_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init")));
1451int board_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init")));
272cc70b
AF
1452
1453void print_mmc_devices(char separator)
1454{
1455 struct mmc *m;
1456 struct list_head *entry;
1457
1458 list_for_each(entry, &mmc_devices) {
1459 m = list_entry(entry, struct mmc, link);
1460
1461 printf("%s: %d", m->name, m->block_dev.dev);
1462
1463 if (entry->next != &mmc_devices)
1464 printf("%c ", separator);
1465 }
1466
1467 printf("\n");
1468}
1469
ea6ebe21
LW
1470int get_mmc_num(void)
1471{
1472 return cur_dev_num;
1473}
1474
e9550449
CLC
1475void mmc_set_preinit(struct mmc *mmc, int preinit)
1476{
1477 mmc->preinit = preinit;
1478}
1479
1480static void do_preinit(void)
1481{
1482 struct mmc *m;
1483 struct list_head *entry;
1484
1485 list_for_each(entry, &mmc_devices) {
1486 m = list_entry(entry, struct mmc, link);
1487
1488 if (m->preinit)
1489 mmc_start_init(m);
1490 }
1491}
1492
1493
272cc70b
AF
1494int mmc_initialize(bd_t *bis)
1495{
1496 INIT_LIST_HEAD (&mmc_devices);
1497 cur_dev_num = 0;
1498
1499 if (board_mmc_init(bis) < 0)
1500 cpu_mmc_init(bis);
1501
1502 print_mmc_devices(',');
1503
e9550449 1504 do_preinit();
272cc70b
AF
1505 return 0;
1506}
3690d6d6
A
1507
1508#ifdef CONFIG_SUPPORT_EMMC_BOOT
1509/*
1510 * This function changes the size of boot partition and the size of rpmb
1511 * partition present on EMMC devices.
1512 *
1513 * Input Parameters:
1514 * struct *mmc: pointer for the mmc device strcuture
1515 * bootsize: size of boot partition
1516 * rpmbsize: size of rpmb partition
1517 *
1518 * Returns 0 on success.
1519 */
1520
1521int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
1522 unsigned long rpmbsize)
1523{
1524 int err;
1525 struct mmc_cmd cmd;
1526
1527 /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */
1528 cmd.cmdidx = MMC_CMD_RES_MAN;
1529 cmd.resp_type = MMC_RSP_R1b;
1530 cmd.cmdarg = MMC_CMD62_ARG1;
1531
1532 err = mmc_send_cmd(mmc, &cmd, NULL);
1533 if (err) {
1534 debug("mmc_boot_partition_size_change: Error1 = %d\n", err);
1535 return err;
1536 }
1537
1538 /* Boot partition changing mode */
1539 cmd.cmdidx = MMC_CMD_RES_MAN;
1540 cmd.resp_type = MMC_RSP_R1b;
1541 cmd.cmdarg = MMC_CMD62_ARG2;
1542
1543 err = mmc_send_cmd(mmc, &cmd, NULL);
1544 if (err) {
1545 debug("mmc_boot_partition_size_change: Error2 = %d\n", err);
1546 return err;
1547 }
1548 /* boot partition size is multiple of 128KB */
1549 bootsize = (bootsize * 1024) / 128;
1550
1551 /* Arg: boot partition size */
1552 cmd.cmdidx = MMC_CMD_RES_MAN;
1553 cmd.resp_type = MMC_RSP_R1b;
1554 cmd.cmdarg = bootsize;
1555
1556 err = mmc_send_cmd(mmc, &cmd, NULL);
1557 if (err) {
1558 debug("mmc_boot_partition_size_change: Error3 = %d\n", err);
1559 return err;
1560 }
1561 /* RPMB partition size is multiple of 128KB */
1562 rpmbsize = (rpmbsize * 1024) / 128;
1563 /* Arg: RPMB partition size */
1564 cmd.cmdidx = MMC_CMD_RES_MAN;
1565 cmd.resp_type = MMC_RSP_R1b;
1566 cmd.cmdarg = rpmbsize;
1567
1568 err = mmc_send_cmd(mmc, &cmd, NULL);
1569 if (err) {
1570 debug("mmc_boot_partition_size_change: Error4 = %d\n", err);
1571 return err;
1572 }
1573 return 0;
1574}
1575
1576/*
1577 * This function shall form and send the commands to open / close the
1578 * boot partition specified by user.
1579 *
1580 * Input Parameters:
1581 * ack: 0x0 - No boot acknowledge sent (default)
1582 * 0x1 - Boot acknowledge sent during boot operation
1583 * part_num: User selects boot data that will be sent to master
1584 * 0x0 - Device not boot enabled (default)
1585 * 0x1 - Boot partition 1 enabled for boot
1586 * 0x2 - Boot partition 2 enabled for boot
1587 * access: User selects partitions to access
1588 * 0x0 : No access to boot partition (default)
1589 * 0x1 : R/W boot partition 1
1590 * 0x2 : R/W boot partition 2
1591 * 0x3 : R/W Replay Protected Memory Block (RPMB)
1592 *
1593 * Returns 0 on success.
1594 */
1595int mmc_boot_part_access(struct mmc *mmc, u8 ack, u8 part_num, u8 access)
1596{
1597 int err;
1598 struct mmc_cmd cmd;
1599
1600 /* Boot ack enable, boot partition enable , boot partition access */
1601 cmd.cmdidx = MMC_CMD_SWITCH;
1602 cmd.resp_type = MMC_RSP_R1b;
1603
1604 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
1605 (EXT_CSD_PART_CONF << 16) |
1606 ((EXT_CSD_BOOT_ACK(ack) |
1607 EXT_CSD_BOOT_PART_NUM(part_num) |
1608 EXT_CSD_PARTITION_ACCESS(access)) << 8);
1609
1610 err = mmc_send_cmd(mmc, &cmd, NULL);
1611 if (err) {
1612 if (access) {
1613 debug("mmc boot partition#%d open fail:Error1 = %d\n",
1614 part_num, err);
1615 } else {
1616 debug("mmc boot partition#%d close fail:Error = %d\n",
1617 part_num, err);
1618 }
1619 return err;
1620 }
1621
1622 if (access) {
1623 /* 4bit transfer mode at booting time. */
1624 cmd.cmdidx = MMC_CMD_SWITCH;
1625 cmd.resp_type = MMC_RSP_R1b;
1626
1627 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
1628 (EXT_CSD_BOOT_BUS_WIDTH << 16) |
1629 ((1 << 0) << 8);
1630
1631 err = mmc_send_cmd(mmc, &cmd, NULL);
1632 if (err) {
1633 debug("mmc boot partition#%d open fail:Error2 = %d\n",
1634 part_num, err);
1635 return err;
1636 }
1637 }
1638 return 0;
1639}
1640#endif