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mmc: Minor cleanup of sdhci.c
[people/ms/u-boot.git] / drivers / mmc / mmc.c
CommitLineData
272cc70b
AF
1/*
2 * Copyright 2008, Freescale Semiconductor, Inc
3 * Andy Fleming
4 *
5 * Based vaguely on the Linux code
6 *
1a459660 7 * SPDX-License-Identifier: GPL-2.0+
272cc70b
AF
8 */
9
10#include <config.h>
11#include <common.h>
12#include <command.h>
13#include <mmc.h>
14#include <part.h>
15#include <malloc.h>
16#include <linux/list.h>
9b1f942c 17#include <div64.h>
da61fa5f 18#include "mmc_private.h"
272cc70b 19
ce0fbcd2
MW
20/* Set block count limit because of 16 bit register limit on some hardware*/
21#ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT
22#define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535
23#endif
24
272cc70b
AF
25static struct list_head mmc_devices;
26static int cur_dev_num = -1;
27
d23d8d7e
NK
28int __weak board_mmc_getwp(struct mmc *mmc)
29{
30 return -1;
31}
32
33int mmc_getwp(struct mmc *mmc)
34{
35 int wp;
36
37 wp = board_mmc_getwp(mmc);
38
d4e1da4e
PK
39 if (wp < 0) {
40 if (mmc->getwp)
41 wp = mmc->getwp(mmc);
42 else
43 wp = 0;
44 }
d23d8d7e
NK
45
46 return wp;
47}
48
314284b1 49int __board_mmc_getcd(struct mmc *mmc) {
11fdade2
SB
50 return -1;
51}
52
314284b1 53int board_mmc_getcd(struct mmc *mmc)__attribute__((weak,
11fdade2
SB
54 alias("__board_mmc_getcd")));
55
da61fa5f 56int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
272cc70b 57{
5db2fe3a 58 int ret;
8635ff9e 59
8635ff9e 60#ifdef CONFIG_MMC_TRACE
5db2fe3a
RR
61 int i;
62 u8 *ptr;
63
64 printf("CMD_SEND:%d\n", cmd->cmdidx);
65 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
5db2fe3a
RR
66 ret = mmc->send_cmd(mmc, cmd, data);
67 switch (cmd->resp_type) {
68 case MMC_RSP_NONE:
69 printf("\t\tMMC_RSP_NONE\n");
70 break;
71 case MMC_RSP_R1:
72 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
73 cmd->response[0]);
74 break;
75 case MMC_RSP_R1b:
76 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
77 cmd->response[0]);
78 break;
79 case MMC_RSP_R2:
80 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
81 cmd->response[0]);
82 printf("\t\t \t\t 0x%08X \n",
83 cmd->response[1]);
84 printf("\t\t \t\t 0x%08X \n",
85 cmd->response[2]);
86 printf("\t\t \t\t 0x%08X \n",
87 cmd->response[3]);
88 printf("\n");
89 printf("\t\t\t\t\tDUMPING DATA\n");
90 for (i = 0; i < 4; i++) {
91 int j;
92 printf("\t\t\t\t\t%03d - ", i*4);
146bec79 93 ptr = (u8 *)&cmd->response[i];
5db2fe3a
RR
94 ptr += 3;
95 for (j = 0; j < 4; j++)
96 printf("%02X ", *ptr--);
97 printf("\n");
98 }
99 break;
100 case MMC_RSP_R3:
101 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
102 cmd->response[0]);
103 break;
104 default:
105 printf("\t\tERROR MMC rsp not supported\n");
106 break;
107 }
5db2fe3a 108#else
8635ff9e 109 ret = mmc->send_cmd(mmc, cmd, data);
5db2fe3a 110#endif
8635ff9e 111 return ret;
272cc70b
AF
112}
113
da61fa5f 114int mmc_send_status(struct mmc *mmc, int timeout)
5d4fc8d9
RR
115{
116 struct mmc_cmd cmd;
d617c426 117 int err, retries = 5;
5d4fc8d9
RR
118#ifdef CONFIG_MMC_TRACE
119 int status;
120#endif
121
122 cmd.cmdidx = MMC_CMD_SEND_STATUS;
123 cmd.resp_type = MMC_RSP_R1;
aaf3d41a
MV
124 if (!mmc_host_is_spi(mmc))
125 cmd.cmdarg = mmc->rca << 16;
5d4fc8d9
RR
126
127 do {
128 err = mmc_send_cmd(mmc, &cmd, NULL);
d617c426
JK
129 if (!err) {
130 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
131 (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
132 MMC_STATE_PRG)
133 break;
134 else if (cmd.response[0] & MMC_STATUS_MASK) {
56196826 135#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
d617c426
JK
136 printf("Status Error: 0x%08X\n",
137 cmd.response[0]);
56196826 138#endif
d617c426
JK
139 return COMM_ERR;
140 }
141 } else if (--retries < 0)
5d4fc8d9 142 return err;
5d4fc8d9
RR
143
144 udelay(1000);
145
5d4fc8d9
RR
146 } while (timeout--);
147
5db2fe3a
RR
148#ifdef CONFIG_MMC_TRACE
149 status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
150 printf("CURR STATE:%d\n", status);
151#endif
5b0c942f 152 if (timeout <= 0) {
56196826 153#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
5d4fc8d9 154 printf("Timeout waiting card ready\n");
56196826 155#endif
5d4fc8d9
RR
156 return TIMEOUT;
157 }
158
159 return 0;
160}
161
da61fa5f 162int mmc_set_blocklen(struct mmc *mmc, int len)
272cc70b
AF
163{
164 struct mmc_cmd cmd;
165
166 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
167 cmd.resp_type = MMC_RSP_R1;
168 cmd.cmdarg = len;
272cc70b
AF
169
170 return mmc_send_cmd(mmc, &cmd, NULL);
171}
172
173struct mmc *find_mmc_device(int dev_num)
174{
175 struct mmc *m;
176 struct list_head *entry;
177
178 list_for_each(entry, &mmc_devices) {
179 m = list_entry(entry, struct mmc, link);
180
181 if (m->block_dev.dev == dev_num)
182 return m;
183 }
184
56196826 185#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
272cc70b 186 printf("MMC Device %d not found\n", dev_num);
56196826 187#endif
272cc70b
AF
188
189 return NULL;
190}
191
ff8fef56 192static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
fdbb873e 193 lbaint_t blkcnt)
272cc70b
AF
194{
195 struct mmc_cmd cmd;
196 struct mmc_data data;
197
4a1a06bc
AS
198 if (blkcnt > 1)
199 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
200 else
201 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
272cc70b
AF
202
203 if (mmc->high_capacity)
4a1a06bc 204 cmd.cmdarg = start;
272cc70b 205 else
4a1a06bc 206 cmd.cmdarg = start * mmc->read_bl_len;
272cc70b
AF
207
208 cmd.resp_type = MMC_RSP_R1;
272cc70b
AF
209
210 data.dest = dst;
4a1a06bc 211 data.blocks = blkcnt;
272cc70b
AF
212 data.blocksize = mmc->read_bl_len;
213 data.flags = MMC_DATA_READ;
214
4a1a06bc
AS
215 if (mmc_send_cmd(mmc, &cmd, &data))
216 return 0;
272cc70b 217
4a1a06bc
AS
218 if (blkcnt > 1) {
219 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
220 cmd.cmdarg = 0;
221 cmd.resp_type = MMC_RSP_R1b;
4a1a06bc 222 if (mmc_send_cmd(mmc, &cmd, NULL)) {
56196826 223#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
4a1a06bc 224 printf("mmc fail to send stop cmd\n");
56196826 225#endif
4a1a06bc
AS
226 return 0;
227 }
272cc70b
AF
228 }
229
4a1a06bc 230 return blkcnt;
272cc70b
AF
231}
232
ff8fef56 233static ulong mmc_bread(int dev_num, lbaint_t start, lbaint_t blkcnt, void *dst)
272cc70b 234{
4a1a06bc
AS
235 lbaint_t cur, blocks_todo = blkcnt;
236
237 if (blkcnt == 0)
238 return 0;
272cc70b 239
4a1a06bc 240 struct mmc *mmc = find_mmc_device(dev_num);
272cc70b
AF
241 if (!mmc)
242 return 0;
243
d2bf29e3 244 if ((start + blkcnt) > mmc->block_dev.lba) {
56196826 245#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
ff8fef56 246 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
d2bf29e3 247 start + blkcnt, mmc->block_dev.lba);
56196826 248#endif
d2bf29e3
LW
249 return 0;
250 }
272cc70b 251
4a1a06bc 252 if (mmc_set_blocklen(mmc, mmc->read_bl_len))
272cc70b 253 return 0;
272cc70b 254
4a1a06bc 255 do {
8feafcc4 256 cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo;
4a1a06bc
AS
257 if(mmc_read_blocks(mmc, dst, start, cur) != cur)
258 return 0;
259 blocks_todo -= cur;
260 start += cur;
261 dst += cur * mmc->read_bl_len;
262 } while (blocks_todo > 0);
272cc70b
AF
263
264 return blkcnt;
265}
266
fdbb873e 267static int mmc_go_idle(struct mmc *mmc)
272cc70b
AF
268{
269 struct mmc_cmd cmd;
270 int err;
271
272 udelay(1000);
273
274 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
275 cmd.cmdarg = 0;
276 cmd.resp_type = MMC_RSP_NONE;
272cc70b
AF
277
278 err = mmc_send_cmd(mmc, &cmd, NULL);
279
280 if (err)
281 return err;
282
283 udelay(2000);
284
285 return 0;
286}
287
fdbb873e 288static int sd_send_op_cond(struct mmc *mmc)
272cc70b
AF
289{
290 int timeout = 1000;
291 int err;
292 struct mmc_cmd cmd;
293
294 do {
295 cmd.cmdidx = MMC_CMD_APP_CMD;
296 cmd.resp_type = MMC_RSP_R1;
297 cmd.cmdarg = 0;
272cc70b
AF
298
299 err = mmc_send_cmd(mmc, &cmd, NULL);
300
301 if (err)
302 return err;
303
304 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
305 cmd.resp_type = MMC_RSP_R3;
250de12b
SB
306
307 /*
308 * Most cards do not answer if some reserved bits
309 * in the ocr are set. However, Some controller
310 * can set bit 7 (reserved for low voltages), but
311 * how to manage low voltages SD card is not yet
312 * specified.
313 */
d52ebf10
TC
314 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
315 (mmc->voltages & 0xff8000);
272cc70b
AF
316
317 if (mmc->version == SD_VERSION_2)
318 cmd.cmdarg |= OCR_HCS;
319
320 err = mmc_send_cmd(mmc, &cmd, NULL);
321
322 if (err)
323 return err;
324
325 udelay(1000);
326 } while ((!(cmd.response[0] & OCR_BUSY)) && timeout--);
327
328 if (timeout <= 0)
329 return UNUSABLE_ERR;
330
331 if (mmc->version != SD_VERSION_2)
332 mmc->version = SD_VERSION_1_0;
333
d52ebf10
TC
334 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
335 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
336 cmd.resp_type = MMC_RSP_R3;
337 cmd.cmdarg = 0;
d52ebf10
TC
338
339 err = mmc_send_cmd(mmc, &cmd, NULL);
340
341 if (err)
342 return err;
343 }
344
998be3dd 345 mmc->ocr = cmd.response[0];
272cc70b
AF
346
347 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
348 mmc->rca = 0;
349
350 return 0;
351}
352
e9550449
CLC
353/* We pass in the cmd since otherwise the init seems to fail */
354static int mmc_send_op_cond_iter(struct mmc *mmc, struct mmc_cmd *cmd,
355 int use_arg)
272cc70b 356{
272cc70b
AF
357 int err;
358
e9550449
CLC
359 cmd->cmdidx = MMC_CMD_SEND_OP_COND;
360 cmd->resp_type = MMC_RSP_R3;
361 cmd->cmdarg = 0;
362 if (use_arg && !mmc_host_is_spi(mmc)) {
363 cmd->cmdarg =
364 (mmc->voltages &
365 (mmc->op_cond_response & OCR_VOLTAGE_MASK)) |
366 (mmc->op_cond_response & OCR_ACCESS_MODE);
367
368 if (mmc->host_caps & MMC_MODE_HC)
369 cmd->cmdarg |= OCR_HCS;
370 }
371 err = mmc_send_cmd(mmc, cmd, NULL);
372 if (err)
373 return err;
374 mmc->op_cond_response = cmd->response[0];
375 return 0;
376}
377
378int mmc_send_op_cond(struct mmc *mmc)
379{
380 struct mmc_cmd cmd;
381 int err, i;
382
272cc70b
AF
383 /* Some cards seem to need this */
384 mmc_go_idle(mmc);
385
31cacbab 386 /* Asking to the card its capabilities */
e9550449
CLC
387 mmc->op_cond_pending = 1;
388 for (i = 0; i < 2; i++) {
389 err = mmc_send_op_cond_iter(mmc, &cmd, i != 0);
390 if (err)
391 return err;
cd6881b5 392
e9550449
CLC
393 /* exit if not busy (flag seems to be inverted) */
394 if (mmc->op_cond_response & OCR_BUSY)
395 return 0;
396 }
397 return IN_PROGRESS;
398}
cd6881b5 399
e9550449
CLC
400int mmc_complete_op_cond(struct mmc *mmc)
401{
402 struct mmc_cmd cmd;
403 int timeout = 1000;
404 uint start;
405 int err;
cd6881b5 406
e9550449
CLC
407 mmc->op_cond_pending = 0;
408 start = get_timer(0);
272cc70b 409 do {
e9550449 410 err = mmc_send_op_cond_iter(mmc, &cmd, 1);
272cc70b
AF
411 if (err)
412 return err;
e9550449
CLC
413 if (get_timer(start) > timeout)
414 return UNUSABLE_ERR;
415 udelay(100);
416 } while (!(mmc->op_cond_response & OCR_BUSY));
272cc70b 417
d52ebf10
TC
418 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
419 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
420 cmd.resp_type = MMC_RSP_R3;
421 cmd.cmdarg = 0;
d52ebf10
TC
422
423 err = mmc_send_cmd(mmc, &cmd, NULL);
424
425 if (err)
426 return err;
427 }
428
272cc70b 429 mmc->version = MMC_VERSION_UNKNOWN;
998be3dd 430 mmc->ocr = cmd.response[0];
272cc70b
AF
431
432 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
433 mmc->rca = 0;
434
435 return 0;
436}
437
438
fdbb873e 439static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
272cc70b
AF
440{
441 struct mmc_cmd cmd;
442 struct mmc_data data;
443 int err;
444
445 /* Get the Card Status Register */
446 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
447 cmd.resp_type = MMC_RSP_R1;
448 cmd.cmdarg = 0;
272cc70b 449
cdfd1ac6 450 data.dest = (char *)ext_csd;
272cc70b 451 data.blocks = 1;
8bfa195e 452 data.blocksize = MMC_MAX_BLOCK_LEN;
272cc70b
AF
453 data.flags = MMC_DATA_READ;
454
455 err = mmc_send_cmd(mmc, &cmd, &data);
456
457 return err;
458}
459
460
fdbb873e 461static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
272cc70b
AF
462{
463 struct mmc_cmd cmd;
5d4fc8d9
RR
464 int timeout = 1000;
465 int ret;
272cc70b
AF
466
467 cmd.cmdidx = MMC_CMD_SWITCH;
468 cmd.resp_type = MMC_RSP_R1b;
469 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
5d4fc8d9
RR
470 (index << 16) |
471 (value << 8);
272cc70b 472
5d4fc8d9
RR
473 ret = mmc_send_cmd(mmc, &cmd, NULL);
474
475 /* Waiting for the ready status */
93ad0d18
JK
476 if (!ret)
477 ret = mmc_send_status(mmc, timeout);
5d4fc8d9
RR
478
479 return ret;
480
272cc70b
AF
481}
482
fdbb873e 483static int mmc_change_freq(struct mmc *mmc)
272cc70b 484{
8bfa195e 485 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
272cc70b
AF
486 char cardtype;
487 int err;
488
489 mmc->card_caps = 0;
490
d52ebf10
TC
491 if (mmc_host_is_spi(mmc))
492 return 0;
493
272cc70b
AF
494 /* Only version 4 supports high-speed */
495 if (mmc->version < MMC_VERSION_4)
496 return 0;
497
272cc70b
AF
498 err = mmc_send_ext_csd(mmc, ext_csd);
499
500 if (err)
501 return err;
502
0560db18 503 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
272cc70b
AF
504
505 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
506
507 if (err)
508 return err;
509
510 /* Now check to see that it worked */
511 err = mmc_send_ext_csd(mmc, ext_csd);
512
513 if (err)
514 return err;
515
516 /* No high-speed support */
0560db18 517 if (!ext_csd[EXT_CSD_HS_TIMING])
272cc70b
AF
518 return 0;
519
520 /* High Speed is set, there are two types: 52MHz and 26MHz */
521 if (cardtype & MMC_HS_52MHZ)
522 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
523 else
524 mmc->card_caps |= MMC_MODE_HS;
525
526 return 0;
527}
528
f866a46d
SW
529static int mmc_set_capacity(struct mmc *mmc, int part_num)
530{
531 switch (part_num) {
532 case 0:
533 mmc->capacity = mmc->capacity_user;
534 break;
535 case 1:
536 case 2:
537 mmc->capacity = mmc->capacity_boot;
538 break;
539 case 3:
540 mmc->capacity = mmc->capacity_rpmb;
541 break;
542 case 4:
543 case 5:
544 case 6:
545 case 7:
546 mmc->capacity = mmc->capacity_gp[part_num - 4];
547 break;
548 default:
549 return -1;
550 }
551
552 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
553
554 return 0;
555}
556
bc897b1d
LW
557int mmc_switch_part(int dev_num, unsigned int part_num)
558{
559 struct mmc *mmc = find_mmc_device(dev_num);
f866a46d 560 int ret;
bc897b1d
LW
561
562 if (!mmc)
563 return -1;
564
f866a46d
SW
565 ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
566 (mmc->part_config & ~PART_ACCESS_MASK)
567 | (part_num & PART_ACCESS_MASK));
568 if (ret)
569 return ret;
570
571 return mmc_set_capacity(mmc, part_num);
bc897b1d
LW
572}
573
48972d90
TR
574int mmc_getcd(struct mmc *mmc)
575{
576 int cd;
577
578 cd = board_mmc_getcd(mmc);
579
d4e1da4e
PK
580 if (cd < 0) {
581 if (mmc->getcd)
582 cd = mmc->getcd(mmc);
583 else
584 cd = 1;
585 }
48972d90
TR
586
587 return cd;
588}
589
fdbb873e 590static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
272cc70b
AF
591{
592 struct mmc_cmd cmd;
593 struct mmc_data data;
594
595 /* Switch the frequency */
596 cmd.cmdidx = SD_CMD_SWITCH_FUNC;
597 cmd.resp_type = MMC_RSP_R1;
598 cmd.cmdarg = (mode << 31) | 0xffffff;
599 cmd.cmdarg &= ~(0xf << (group * 4));
600 cmd.cmdarg |= value << (group * 4);
272cc70b
AF
601
602 data.dest = (char *)resp;
603 data.blocksize = 64;
604 data.blocks = 1;
605 data.flags = MMC_DATA_READ;
606
607 return mmc_send_cmd(mmc, &cmd, &data);
608}
609
610
fdbb873e 611static int sd_change_freq(struct mmc *mmc)
272cc70b
AF
612{
613 int err;
614 struct mmc_cmd cmd;
f781dd38
A
615 ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
616 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
272cc70b
AF
617 struct mmc_data data;
618 int timeout;
619
620 mmc->card_caps = 0;
621
d52ebf10
TC
622 if (mmc_host_is_spi(mmc))
623 return 0;
624
272cc70b
AF
625 /* Read the SCR to find out if this card supports higher speeds */
626 cmd.cmdidx = MMC_CMD_APP_CMD;
627 cmd.resp_type = MMC_RSP_R1;
628 cmd.cmdarg = mmc->rca << 16;
272cc70b
AF
629
630 err = mmc_send_cmd(mmc, &cmd, NULL);
631
632 if (err)
633 return err;
634
635 cmd.cmdidx = SD_CMD_APP_SEND_SCR;
636 cmd.resp_type = MMC_RSP_R1;
637 cmd.cmdarg = 0;
272cc70b
AF
638
639 timeout = 3;
640
641retry_scr:
f781dd38 642 data.dest = (char *)scr;
272cc70b
AF
643 data.blocksize = 8;
644 data.blocks = 1;
645 data.flags = MMC_DATA_READ;
646
647 err = mmc_send_cmd(mmc, &cmd, &data);
648
649 if (err) {
650 if (timeout--)
651 goto retry_scr;
652
653 return err;
654 }
655
4e3d89ba
YK
656 mmc->scr[0] = __be32_to_cpu(scr[0]);
657 mmc->scr[1] = __be32_to_cpu(scr[1]);
272cc70b
AF
658
659 switch ((mmc->scr[0] >> 24) & 0xf) {
660 case 0:
661 mmc->version = SD_VERSION_1_0;
662 break;
663 case 1:
664 mmc->version = SD_VERSION_1_10;
665 break;
666 case 2:
667 mmc->version = SD_VERSION_2;
1741c64d
JC
668 if ((mmc->scr[0] >> 15) & 0x1)
669 mmc->version = SD_VERSION_3;
272cc70b
AF
670 break;
671 default:
672 mmc->version = SD_VERSION_1_0;
673 break;
674 }
675
b44c7083
AS
676 if (mmc->scr[0] & SD_DATA_4BIT)
677 mmc->card_caps |= MMC_MODE_4BIT;
678
272cc70b
AF
679 /* Version 1.0 doesn't support switching */
680 if (mmc->version == SD_VERSION_1_0)
681 return 0;
682
683 timeout = 4;
684 while (timeout--) {
685 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
f781dd38 686 (u8 *)switch_status);
272cc70b
AF
687
688 if (err)
689 return err;
690
691 /* The high-speed function is busy. Try again */
4e3d89ba 692 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
272cc70b
AF
693 break;
694 }
695
272cc70b 696 /* If high-speed isn't supported, we return */
4e3d89ba 697 if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
272cc70b
AF
698 return 0;
699
2c3fbf4c
ML
700 /*
701 * If the host doesn't support SD_HIGHSPEED, do not switch card to
702 * HIGHSPEED mode even if the card support SD_HIGHSPPED.
703 * This can avoid furthur problem when the card runs in different
704 * mode between the host.
705 */
706 if (!((mmc->host_caps & MMC_MODE_HS_52MHz) &&
707 (mmc->host_caps & MMC_MODE_HS)))
708 return 0;
709
f781dd38 710 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
272cc70b
AF
711
712 if (err)
713 return err;
714
4e3d89ba 715 if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
272cc70b
AF
716 mmc->card_caps |= MMC_MODE_HS;
717
718 return 0;
719}
720
721/* frequency bases */
722/* divided by 10 to be nice to platforms without floating point */
5f837c2c 723static const int fbase[] = {
272cc70b
AF
724 10000,
725 100000,
726 1000000,
727 10000000,
728};
729
730/* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
731 * to platforms without floating point.
732 */
5f837c2c 733static const int multipliers[] = {
272cc70b
AF
734 0, /* reserved */
735 10,
736 12,
737 13,
738 15,
739 20,
740 25,
741 30,
742 35,
743 40,
744 45,
745 50,
746 55,
747 60,
748 70,
749 80,
750};
751
fdbb873e 752static void mmc_set_ios(struct mmc *mmc)
272cc70b
AF
753{
754 mmc->set_ios(mmc);
755}
756
757void mmc_set_clock(struct mmc *mmc, uint clock)
758{
759 if (clock > mmc->f_max)
760 clock = mmc->f_max;
761
762 if (clock < mmc->f_min)
763 clock = mmc->f_min;
764
765 mmc->clock = clock;
766
767 mmc_set_ios(mmc);
768}
769
fdbb873e 770static void mmc_set_bus_width(struct mmc *mmc, uint width)
272cc70b
AF
771{
772 mmc->bus_width = width;
773
774 mmc_set_ios(mmc);
775}
776
fdbb873e 777static int mmc_startup(struct mmc *mmc)
272cc70b 778{
f866a46d 779 int err, i;
272cc70b 780 uint mult, freq;
639b7827 781 u64 cmult, csize, capacity;
272cc70b 782 struct mmc_cmd cmd;
8bfa195e
SG
783 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
784 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
5d4fc8d9 785 int timeout = 1000;
272cc70b 786
d52ebf10
TC
787#ifdef CONFIG_MMC_SPI_CRC_ON
788 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
789 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
790 cmd.resp_type = MMC_RSP_R1;
791 cmd.cmdarg = 1;
d52ebf10
TC
792 err = mmc_send_cmd(mmc, &cmd, NULL);
793
794 if (err)
795 return err;
796 }
797#endif
798
272cc70b 799 /* Put the Card in Identify Mode */
d52ebf10
TC
800 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
801 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
272cc70b
AF
802 cmd.resp_type = MMC_RSP_R2;
803 cmd.cmdarg = 0;
272cc70b
AF
804
805 err = mmc_send_cmd(mmc, &cmd, NULL);
806
807 if (err)
808 return err;
809
810 memcpy(mmc->cid, cmd.response, 16);
811
812 /*
813 * For MMC cards, set the Relative Address.
814 * For SD cards, get the Relatvie Address.
815 * This also puts the cards into Standby State
816 */
d52ebf10
TC
817 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
818 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
819 cmd.cmdarg = mmc->rca << 16;
820 cmd.resp_type = MMC_RSP_R6;
272cc70b 821
d52ebf10 822 err = mmc_send_cmd(mmc, &cmd, NULL);
272cc70b 823
d52ebf10
TC
824 if (err)
825 return err;
272cc70b 826
d52ebf10
TC
827 if (IS_SD(mmc))
828 mmc->rca = (cmd.response[0] >> 16) & 0xffff;
829 }
272cc70b
AF
830
831 /* Get the Card-Specific Data */
832 cmd.cmdidx = MMC_CMD_SEND_CSD;
833 cmd.resp_type = MMC_RSP_R2;
834 cmd.cmdarg = mmc->rca << 16;
272cc70b
AF
835
836 err = mmc_send_cmd(mmc, &cmd, NULL);
837
5d4fc8d9
RR
838 /* Waiting for the ready status */
839 mmc_send_status(mmc, timeout);
840
272cc70b
AF
841 if (err)
842 return err;
843
998be3dd
RV
844 mmc->csd[0] = cmd.response[0];
845 mmc->csd[1] = cmd.response[1];
846 mmc->csd[2] = cmd.response[2];
847 mmc->csd[3] = cmd.response[3];
272cc70b
AF
848
849 if (mmc->version == MMC_VERSION_UNKNOWN) {
0b453ffe 850 int version = (cmd.response[0] >> 26) & 0xf;
272cc70b
AF
851
852 switch (version) {
853 case 0:
854 mmc->version = MMC_VERSION_1_2;
855 break;
856 case 1:
857 mmc->version = MMC_VERSION_1_4;
858 break;
859 case 2:
860 mmc->version = MMC_VERSION_2_2;
861 break;
862 case 3:
863 mmc->version = MMC_VERSION_3;
864 break;
865 case 4:
866 mmc->version = MMC_VERSION_4;
867 break;
868 default:
869 mmc->version = MMC_VERSION_1_2;
870 break;
871 }
872 }
873
874 /* divide frequency by 10, since the mults are 10x bigger */
0b453ffe
RV
875 freq = fbase[(cmd.response[0] & 0x7)];
876 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
272cc70b
AF
877
878 mmc->tran_speed = freq * mult;
879
998be3dd 880 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
272cc70b
AF
881
882 if (IS_SD(mmc))
883 mmc->write_bl_len = mmc->read_bl_len;
884 else
998be3dd 885 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
272cc70b
AF
886
887 if (mmc->high_capacity) {
888 csize = (mmc->csd[1] & 0x3f) << 16
889 | (mmc->csd[2] & 0xffff0000) >> 16;
890 cmult = 8;
891 } else {
892 csize = (mmc->csd[1] & 0x3ff) << 2
893 | (mmc->csd[2] & 0xc0000000) >> 30;
894 cmult = (mmc->csd[2] & 0x00038000) >> 15;
895 }
896
f866a46d
SW
897 mmc->capacity_user = (csize + 1) << (cmult + 2);
898 mmc->capacity_user *= mmc->read_bl_len;
899 mmc->capacity_boot = 0;
900 mmc->capacity_rpmb = 0;
901 for (i = 0; i < 4; i++)
902 mmc->capacity_gp[i] = 0;
272cc70b 903
8bfa195e
SG
904 if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
905 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
272cc70b 906
8bfa195e
SG
907 if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
908 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
272cc70b
AF
909
910 /* Select the card, and put it into Transfer Mode */
d52ebf10
TC
911 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
912 cmd.cmdidx = MMC_CMD_SELECT_CARD;
fe8f7066 913 cmd.resp_type = MMC_RSP_R1;
d52ebf10 914 cmd.cmdarg = mmc->rca << 16;
d52ebf10 915 err = mmc_send_cmd(mmc, &cmd, NULL);
272cc70b 916
d52ebf10
TC
917 if (err)
918 return err;
919 }
272cc70b 920
e6f99a56
LW
921 /*
922 * For SD, its erase group is always one sector
923 */
924 mmc->erase_grp_size = 1;
bc897b1d 925 mmc->part_config = MMCPART_NOAVAILABLE;
d23e2c09
SG
926 if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
927 /* check ext_csd version and capacity */
928 err = mmc_send_ext_csd(mmc, ext_csd);
fdbb873e 929 if (!err && (ext_csd[EXT_CSD_REV] >= 2)) {
639b7827
YS
930 /*
931 * According to the JEDEC Standard, the value of
932 * ext_csd's capacity is valid if the value is more
933 * than 2GB
934 */
0560db18
LW
935 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
936 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
937 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
938 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
8bfa195e 939 capacity *= MMC_MAX_BLOCK_LEN;
b1f1e821 940 if ((capacity >> 20) > 2 * 1024)
f866a46d 941 mmc->capacity_user = capacity;
d23e2c09 942 }
bc897b1d 943
64f4a619
JC
944 switch (ext_csd[EXT_CSD_REV]) {
945 case 1:
946 mmc->version = MMC_VERSION_4_1;
947 break;
948 case 2:
949 mmc->version = MMC_VERSION_4_2;
950 break;
951 case 3:
952 mmc->version = MMC_VERSION_4_3;
953 break;
954 case 5:
955 mmc->version = MMC_VERSION_4_41;
956 break;
957 case 6:
958 mmc->version = MMC_VERSION_4_5;
959 break;
960 }
961
e6f99a56 962 /*
1937e5aa
OM
963 * Host needs to enable ERASE_GRP_DEF bit if device is
964 * partitioned. This bit will be lost every time after a reset
965 * or power off. This will affect erase size.
e6f99a56 966 */
1937e5aa
OM
967 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
968 (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB)) {
969 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
970 EXT_CSD_ERASE_GROUP_DEF, 1);
971
972 if (err)
973 return err;
974
975 /* Read out group size from ext_csd */
0560db18 976 mmc->erase_grp_size =
8bfa195e
SG
977 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] *
978 MMC_MAX_BLOCK_LEN * 1024;
979 } else {
1937e5aa 980 /* Calculate the group size from the csd value. */
e6f99a56
LW
981 int erase_gsz, erase_gmul;
982 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
983 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
984 mmc->erase_grp_size = (erase_gsz + 1)
985 * (erase_gmul + 1);
986 }
987
bc897b1d 988 /* store the partition info of emmc */
8948ea83
SW
989 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
990 ext_csd[EXT_CSD_BOOT_MULT])
0560db18 991 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
f866a46d
SW
992
993 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
994
995 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
996
997 for (i = 0; i < 4; i++) {
998 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
999 mmc->capacity_gp[i] = (ext_csd[idx + 2] << 16) +
1000 (ext_csd[idx + 1] << 8) + ext_csd[idx];
1001 mmc->capacity_gp[i] *=
1002 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1003 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1004 }
d23e2c09
SG
1005 }
1006
f866a46d
SW
1007 err = mmc_set_capacity(mmc, mmc->part_num);
1008 if (err)
1009 return err;
1010
272cc70b
AF
1011 if (IS_SD(mmc))
1012 err = sd_change_freq(mmc);
1013 else
1014 err = mmc_change_freq(mmc);
1015
1016 if (err)
1017 return err;
1018
1019 /* Restrict card's capabilities by what the host can do */
1020 mmc->card_caps &= mmc->host_caps;
1021
1022 if (IS_SD(mmc)) {
1023 if (mmc->card_caps & MMC_MODE_4BIT) {
1024 cmd.cmdidx = MMC_CMD_APP_CMD;
1025 cmd.resp_type = MMC_RSP_R1;
1026 cmd.cmdarg = mmc->rca << 16;
272cc70b
AF
1027
1028 err = mmc_send_cmd(mmc, &cmd, NULL);
1029 if (err)
1030 return err;
1031
1032 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1033 cmd.resp_type = MMC_RSP_R1;
1034 cmd.cmdarg = 2;
272cc70b
AF
1035 err = mmc_send_cmd(mmc, &cmd, NULL);
1036 if (err)
1037 return err;
1038
1039 mmc_set_bus_width(mmc, 4);
1040 }
1041
1042 if (mmc->card_caps & MMC_MODE_HS)
ad5fd922 1043 mmc->tran_speed = 50000000;
272cc70b 1044 else
ad5fd922 1045 mmc->tran_speed = 25000000;
272cc70b 1046 } else {
7798f6db
AF
1047 int idx;
1048
1049 /* An array of possible bus widths in order of preference */
1050 static unsigned ext_csd_bits[] = {
1051 EXT_CSD_BUS_WIDTH_8,
1052 EXT_CSD_BUS_WIDTH_4,
1053 EXT_CSD_BUS_WIDTH_1,
1054 };
1055
1056 /* An array to map CSD bus widths to host cap bits */
1057 static unsigned ext_to_hostcaps[] = {
1058 [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
1059 [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
1060 };
1061
1062 /* An array to map chosen bus width to an integer */
1063 static unsigned widths[] = {
1064 8, 4, 1,
1065 };
1066
1067 for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
1068 unsigned int extw = ext_csd_bits[idx];
1069
1070 /*
1071 * Check to make sure the controller supports
1072 * this bus width, if it's more than 1
1073 */
1074 if (extw != EXT_CSD_BUS_WIDTH_1 &&
1075 !(mmc->host_caps & ext_to_hostcaps[extw]))
1076 continue;
1077
272cc70b 1078 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
7798f6db 1079 EXT_CSD_BUS_WIDTH, extw);
272cc70b
AF
1080
1081 if (err)
4137894e 1082 continue;
272cc70b 1083
7798f6db 1084 mmc_set_bus_width(mmc, widths[idx]);
4137894e
LW
1085
1086 err = mmc_send_ext_csd(mmc, test_csd);
1087 if (!err && ext_csd[EXT_CSD_PARTITIONING_SUPPORT] \
1088 == test_csd[EXT_CSD_PARTITIONING_SUPPORT]
1089 && ext_csd[EXT_CSD_ERASE_GROUP_DEF] \
1090 == test_csd[EXT_CSD_ERASE_GROUP_DEF] \
1091 && ext_csd[EXT_CSD_REV] \
1092 == test_csd[EXT_CSD_REV]
1093 && ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] \
1094 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1095 && memcmp(&ext_csd[EXT_CSD_SEC_CNT], \
1096 &test_csd[EXT_CSD_SEC_CNT], 4) == 0) {
1097
7798f6db 1098 mmc->card_caps |= ext_to_hostcaps[extw];
4137894e
LW
1099 break;
1100 }
272cc70b
AF
1101 }
1102
1103 if (mmc->card_caps & MMC_MODE_HS) {
1104 if (mmc->card_caps & MMC_MODE_HS_52MHz)
ad5fd922 1105 mmc->tran_speed = 52000000;
272cc70b 1106 else
ad5fd922
JC
1107 mmc->tran_speed = 26000000;
1108 }
272cc70b
AF
1109 }
1110
ad5fd922
JC
1111 mmc_set_clock(mmc, mmc->tran_speed);
1112
272cc70b
AF
1113 /* fill in device description */
1114 mmc->block_dev.lun = 0;
1115 mmc->block_dev.type = 0;
1116 mmc->block_dev.blksz = mmc->read_bl_len;
0472fbfd 1117 mmc->block_dev.log2blksz = LOG2(mmc->block_dev.blksz);
9b1f942c 1118 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
56196826 1119#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
babce5f6
TH
1120 sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x",
1121 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
1122 (mmc->cid[3] >> 16) & 0xffff);
1123 sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
1124 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1125 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
1126 (mmc->cid[2] >> 24) & 0xff);
1127 sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
1128 (mmc->cid[2] >> 16) & 0xf);
56196826
PB
1129#else
1130 mmc->block_dev.vendor[0] = 0;
1131 mmc->block_dev.product[0] = 0;
1132 mmc->block_dev.revision[0] = 0;
1133#endif
122efd43 1134#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
272cc70b 1135 init_part(&mmc->block_dev);
122efd43 1136#endif
272cc70b
AF
1137
1138 return 0;
1139}
1140
fdbb873e 1141static int mmc_send_if_cond(struct mmc *mmc)
272cc70b
AF
1142{
1143 struct mmc_cmd cmd;
1144 int err;
1145
1146 cmd.cmdidx = SD_CMD_SEND_IF_COND;
1147 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
1148 cmd.cmdarg = ((mmc->voltages & 0xff8000) != 0) << 8 | 0xaa;
1149 cmd.resp_type = MMC_RSP_R7;
272cc70b
AF
1150
1151 err = mmc_send_cmd(mmc, &cmd, NULL);
1152
1153 if (err)
1154 return err;
1155
998be3dd 1156 if ((cmd.response[0] & 0xff) != 0xaa)
272cc70b
AF
1157 return UNUSABLE_ERR;
1158 else
1159 mmc->version = SD_VERSION_2;
1160
1161 return 0;
1162}
1163
1164int mmc_register(struct mmc *mmc)
1165{
1166 /* Setup the universal parts of the block interface just once */
1167 mmc->block_dev.if_type = IF_TYPE_MMC;
1168 mmc->block_dev.dev = cur_dev_num++;
1169 mmc->block_dev.removable = 1;
1170 mmc->block_dev.block_read = mmc_bread;
1171 mmc->block_dev.block_write = mmc_bwrite;
e6f99a56 1172 mmc->block_dev.block_erase = mmc_berase;
8feafcc4
JR
1173 if (!mmc->b_max)
1174 mmc->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
272cc70b
AF
1175
1176 INIT_LIST_HEAD (&mmc->link);
1177
1178 list_add_tail (&mmc->link, &mmc_devices);
1179
1180 return 0;
1181}
1182
df3fc526 1183#ifdef CONFIG_PARTITIONS
272cc70b
AF
1184block_dev_desc_t *mmc_get_dev(int dev)
1185{
1186 struct mmc *mmc = find_mmc_device(dev);
6bb4b4bc 1187 if (!mmc || mmc_init(mmc))
40242bc3 1188 return NULL;
272cc70b 1189
40242bc3 1190 return &mmc->block_dev;
272cc70b 1191}
df3fc526 1192#endif
272cc70b 1193
e9550449 1194int mmc_start_init(struct mmc *mmc)
272cc70b 1195{
afd5932b 1196 int err;
272cc70b 1197
48972d90
TR
1198 if (mmc_getcd(mmc) == 0) {
1199 mmc->has_init = 0;
56196826 1200#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
48972d90 1201 printf("MMC: no card present\n");
56196826 1202#endif
48972d90
TR
1203 return NO_CARD_ERR;
1204 }
1205
bc897b1d
LW
1206 if (mmc->has_init)
1207 return 0;
1208
272cc70b
AF
1209 err = mmc->init(mmc);
1210
1211 if (err)
1212 return err;
1213
b86b85e2
IY
1214 mmc_set_bus_width(mmc, 1);
1215 mmc_set_clock(mmc, 1);
1216
272cc70b
AF
1217 /* Reset the Card */
1218 err = mmc_go_idle(mmc);
1219
1220 if (err)
1221 return err;
1222
bc897b1d
LW
1223 /* The internal partition reset to user partition(0) at every CMD0*/
1224 mmc->part_num = 0;
1225
272cc70b 1226 /* Test for SD version 2 */
afd5932b 1227 err = mmc_send_if_cond(mmc);
272cc70b 1228
272cc70b
AF
1229 /* Now try to get the SD card's operating condition */
1230 err = sd_send_op_cond(mmc);
1231
1232 /* If the command timed out, we check for an MMC card */
1233 if (err == TIMEOUT) {
1234 err = mmc_send_op_cond(mmc);
1235
e9550449 1236 if (err && err != IN_PROGRESS) {
56196826 1237#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
272cc70b 1238 printf("Card did not respond to voltage select!\n");
56196826 1239#endif
272cc70b
AF
1240 return UNUSABLE_ERR;
1241 }
1242 }
1243
e9550449
CLC
1244 if (err == IN_PROGRESS)
1245 mmc->init_in_progress = 1;
1246
1247 return err;
1248}
1249
1250static int mmc_complete_init(struct mmc *mmc)
1251{
1252 int err = 0;
1253
1254 if (mmc->op_cond_pending)
1255 err = mmc_complete_op_cond(mmc);
1256
1257 if (!err)
1258 err = mmc_startup(mmc);
bc897b1d
LW
1259 if (err)
1260 mmc->has_init = 0;
1261 else
1262 mmc->has_init = 1;
e9550449
CLC
1263 mmc->init_in_progress = 0;
1264 return err;
1265}
1266
1267int mmc_init(struct mmc *mmc)
1268{
1269 int err = IN_PROGRESS;
1270 unsigned start = get_timer(0);
1271
1272 if (mmc->has_init)
1273 return 0;
1274 if (!mmc->init_in_progress)
1275 err = mmc_start_init(mmc);
1276
1277 if (!err || err == IN_PROGRESS)
1278 err = mmc_complete_init(mmc);
1279 debug("%s: %d, time %lu\n", __func__, err, get_timer(start));
bc897b1d 1280 return err;
272cc70b
AF
1281}
1282
1283/*
1284 * CPU and board-specific MMC initializations. Aliased function
1285 * signals caller to move on
1286 */
1287static int __def_mmc_init(bd_t *bis)
1288{
1289 return -1;
1290}
1291
f9a109b3
PT
1292int cpu_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init")));
1293int board_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init")));
272cc70b 1294
56196826
PB
1295#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1296
272cc70b
AF
1297void print_mmc_devices(char separator)
1298{
1299 struct mmc *m;
1300 struct list_head *entry;
1301
1302 list_for_each(entry, &mmc_devices) {
1303 m = list_entry(entry, struct mmc, link);
1304
1305 printf("%s: %d", m->name, m->block_dev.dev);
1306
1307 if (entry->next != &mmc_devices)
1308 printf("%c ", separator);
1309 }
1310
1311 printf("\n");
1312}
1313
56196826
PB
1314#else
1315void print_mmc_devices(char separator) { }
1316#endif
1317
ea6ebe21
LW
1318int get_mmc_num(void)
1319{
1320 return cur_dev_num;
1321}
1322
e9550449
CLC
1323void mmc_set_preinit(struct mmc *mmc, int preinit)
1324{
1325 mmc->preinit = preinit;
1326}
1327
1328static void do_preinit(void)
1329{
1330 struct mmc *m;
1331 struct list_head *entry;
1332
1333 list_for_each(entry, &mmc_devices) {
1334 m = list_entry(entry, struct mmc, link);
1335
1336 if (m->preinit)
1337 mmc_start_init(m);
1338 }
1339}
1340
1341
272cc70b
AF
1342int mmc_initialize(bd_t *bis)
1343{
1344 INIT_LIST_HEAD (&mmc_devices);
1345 cur_dev_num = 0;
1346
1347 if (board_mmc_init(bis) < 0)
1348 cpu_mmc_init(bis);
1349
bb0dc108 1350#ifndef CONFIG_SPL_BUILD
272cc70b 1351 print_mmc_devices(',');
bb0dc108 1352#endif
272cc70b 1353
e9550449 1354 do_preinit();
272cc70b
AF
1355 return 0;
1356}
3690d6d6
A
1357
1358#ifdef CONFIG_SUPPORT_EMMC_BOOT
1359/*
1360 * This function changes the size of boot partition and the size of rpmb
1361 * partition present on EMMC devices.
1362 *
1363 * Input Parameters:
1364 * struct *mmc: pointer for the mmc device strcuture
1365 * bootsize: size of boot partition
1366 * rpmbsize: size of rpmb partition
1367 *
1368 * Returns 0 on success.
1369 */
1370
1371int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
1372 unsigned long rpmbsize)
1373{
1374 int err;
1375 struct mmc_cmd cmd;
1376
1377 /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */
1378 cmd.cmdidx = MMC_CMD_RES_MAN;
1379 cmd.resp_type = MMC_RSP_R1b;
1380 cmd.cmdarg = MMC_CMD62_ARG1;
1381
1382 err = mmc_send_cmd(mmc, &cmd, NULL);
1383 if (err) {
1384 debug("mmc_boot_partition_size_change: Error1 = %d\n", err);
1385 return err;
1386 }
1387
1388 /* Boot partition changing mode */
1389 cmd.cmdidx = MMC_CMD_RES_MAN;
1390 cmd.resp_type = MMC_RSP_R1b;
1391 cmd.cmdarg = MMC_CMD62_ARG2;
1392
1393 err = mmc_send_cmd(mmc, &cmd, NULL);
1394 if (err) {
1395 debug("mmc_boot_partition_size_change: Error2 = %d\n", err);
1396 return err;
1397 }
1398 /* boot partition size is multiple of 128KB */
1399 bootsize = (bootsize * 1024) / 128;
1400
1401 /* Arg: boot partition size */
1402 cmd.cmdidx = MMC_CMD_RES_MAN;
1403 cmd.resp_type = MMC_RSP_R1b;
1404 cmd.cmdarg = bootsize;
1405
1406 err = mmc_send_cmd(mmc, &cmd, NULL);
1407 if (err) {
1408 debug("mmc_boot_partition_size_change: Error3 = %d\n", err);
1409 return err;
1410 }
1411 /* RPMB partition size is multiple of 128KB */
1412 rpmbsize = (rpmbsize * 1024) / 128;
1413 /* Arg: RPMB partition size */
1414 cmd.cmdidx = MMC_CMD_RES_MAN;
1415 cmd.resp_type = MMC_RSP_R1b;
1416 cmd.cmdarg = rpmbsize;
1417
1418 err = mmc_send_cmd(mmc, &cmd, NULL);
1419 if (err) {
1420 debug("mmc_boot_partition_size_change: Error4 = %d\n", err);
1421 return err;
1422 }
1423 return 0;
1424}
1425
1426/*
1427 * This function shall form and send the commands to open / close the
1428 * boot partition specified by user.
1429 *
1430 * Input Parameters:
1431 * ack: 0x0 - No boot acknowledge sent (default)
1432 * 0x1 - Boot acknowledge sent during boot operation
1433 * part_num: User selects boot data that will be sent to master
1434 * 0x0 - Device not boot enabled (default)
1435 * 0x1 - Boot partition 1 enabled for boot
1436 * 0x2 - Boot partition 2 enabled for boot
1437 * access: User selects partitions to access
1438 * 0x0 : No access to boot partition (default)
1439 * 0x1 : R/W boot partition 1
1440 * 0x2 : R/W boot partition 2
1441 * 0x3 : R/W Replay Protected Memory Block (RPMB)
1442 *
1443 * Returns 0 on success.
1444 */
1445int mmc_boot_part_access(struct mmc *mmc, u8 ack, u8 part_num, u8 access)
1446{
1447 int err;
1448 struct mmc_cmd cmd;
1449
1450 /* Boot ack enable, boot partition enable , boot partition access */
1451 cmd.cmdidx = MMC_CMD_SWITCH;
1452 cmd.resp_type = MMC_RSP_R1b;
1453
1454 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
1455 (EXT_CSD_PART_CONF << 16) |
1456 ((EXT_CSD_BOOT_ACK(ack) |
1457 EXT_CSD_BOOT_PART_NUM(part_num) |
1458 EXT_CSD_PARTITION_ACCESS(access)) << 8);
1459
1460 err = mmc_send_cmd(mmc, &cmd, NULL);
1461 if (err) {
1462 if (access) {
1463 debug("mmc boot partition#%d open fail:Error1 = %d\n",
1464 part_num, err);
1465 } else {
1466 debug("mmc boot partition#%d close fail:Error = %d\n",
1467 part_num, err);
1468 }
1469 return err;
1470 }
1471
1472 if (access) {
1473 /* 4bit transfer mode at booting time. */
1474 cmd.cmdidx = MMC_CMD_SWITCH;
1475 cmd.resp_type = MMC_RSP_R1b;
1476
1477 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
1478 (EXT_CSD_BOOT_BUS_WIDTH << 16) |
1479 ((1 << 0) << 8);
1480
1481 err = mmc_send_cmd(mmc, &cmd, NULL);
1482 if (err) {
1483 debug("mmc boot partition#%d open fail:Error2 = %d\n",
1484 part_num, err);
1485 return err;
1486 }
1487 }
1488 return 0;
1489}
1490#endif