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mmc: size optimization when !CONFIG_MMC_SPI
[people/ms/u-boot.git] / drivers / mmc / mmc.c
CommitLineData
272cc70b
AF
1/*
2 * Copyright 2008, Freescale Semiconductor, Inc
3 * Andy Fleming
4 *
5 * Based vaguely on the Linux code
6 *
1a459660 7 * SPDX-License-Identifier: GPL-2.0+
272cc70b
AF
8 */
9
10#include <config.h>
11#include <common.h>
12#include <command.h>
13#include <mmc.h>
14#include <part.h>
15#include <malloc.h>
16#include <linux/list.h>
9b1f942c 17#include <div64.h>
272cc70b 18
ce0fbcd2
MW
19/* Set block count limit because of 16 bit register limit on some hardware*/
20#ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT
21#define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535
22#endif
23
272cc70b
AF
24static struct list_head mmc_devices;
25static int cur_dev_num = -1;
26
d23d8d7e
NK
27int __weak board_mmc_getwp(struct mmc *mmc)
28{
29 return -1;
30}
31
32int mmc_getwp(struct mmc *mmc)
33{
34 int wp;
35
36 wp = board_mmc_getwp(mmc);
37
d4e1da4e
PK
38 if (wp < 0) {
39 if (mmc->getwp)
40 wp = mmc->getwp(mmc);
41 else
42 wp = 0;
43 }
d23d8d7e
NK
44
45 return wp;
46}
47
314284b1 48int __board_mmc_getcd(struct mmc *mmc) {
11fdade2
SB
49 return -1;
50}
51
314284b1 52int board_mmc_getcd(struct mmc *mmc)__attribute__((weak,
11fdade2
SB
53 alias("__board_mmc_getcd")));
54
fdbb873e
KP
55static int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
56 struct mmc_data *data)
272cc70b 57{
5db2fe3a 58 int ret;
8635ff9e 59
8635ff9e 60#ifdef CONFIG_MMC_TRACE
5db2fe3a
RR
61 int i;
62 u8 *ptr;
63
64 printf("CMD_SEND:%d\n", cmd->cmdidx);
65 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
5db2fe3a
RR
66 ret = mmc->send_cmd(mmc, cmd, data);
67 switch (cmd->resp_type) {
68 case MMC_RSP_NONE:
69 printf("\t\tMMC_RSP_NONE\n");
70 break;
71 case MMC_RSP_R1:
72 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
73 cmd->response[0]);
74 break;
75 case MMC_RSP_R1b:
76 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
77 cmd->response[0]);
78 break;
79 case MMC_RSP_R2:
80 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
81 cmd->response[0]);
82 printf("\t\t \t\t 0x%08X \n",
83 cmd->response[1]);
84 printf("\t\t \t\t 0x%08X \n",
85 cmd->response[2]);
86 printf("\t\t \t\t 0x%08X \n",
87 cmd->response[3]);
88 printf("\n");
89 printf("\t\t\t\t\tDUMPING DATA\n");
90 for (i = 0; i < 4; i++) {
91 int j;
92 printf("\t\t\t\t\t%03d - ", i*4);
146bec79 93 ptr = (u8 *)&cmd->response[i];
5db2fe3a
RR
94 ptr += 3;
95 for (j = 0; j < 4; j++)
96 printf("%02X ", *ptr--);
97 printf("\n");
98 }
99 break;
100 case MMC_RSP_R3:
101 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
102 cmd->response[0]);
103 break;
104 default:
105 printf("\t\tERROR MMC rsp not supported\n");
106 break;
107 }
5db2fe3a 108#else
8635ff9e 109 ret = mmc->send_cmd(mmc, cmd, data);
5db2fe3a 110#endif
8635ff9e 111 return ret;
272cc70b
AF
112}
113
fdbb873e 114static int mmc_send_status(struct mmc *mmc, int timeout)
5d4fc8d9
RR
115{
116 struct mmc_cmd cmd;
d617c426 117 int err, retries = 5;
5d4fc8d9
RR
118#ifdef CONFIG_MMC_TRACE
119 int status;
120#endif
121
122 cmd.cmdidx = MMC_CMD_SEND_STATUS;
123 cmd.resp_type = MMC_RSP_R1;
aaf3d41a
MV
124 if (!mmc_host_is_spi(mmc))
125 cmd.cmdarg = mmc->rca << 16;
5d4fc8d9
RR
126
127 do {
128 err = mmc_send_cmd(mmc, &cmd, NULL);
d617c426
JK
129 if (!err) {
130 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
131 (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
132 MMC_STATE_PRG)
133 break;
134 else if (cmd.response[0] & MMC_STATUS_MASK) {
56196826 135#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
d617c426
JK
136 printf("Status Error: 0x%08X\n",
137 cmd.response[0]);
56196826 138#endif
d617c426
JK
139 return COMM_ERR;
140 }
141 } else if (--retries < 0)
5d4fc8d9 142 return err;
5d4fc8d9
RR
143
144 udelay(1000);
145
5d4fc8d9
RR
146 } while (timeout--);
147
5db2fe3a
RR
148#ifdef CONFIG_MMC_TRACE
149 status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
150 printf("CURR STATE:%d\n", status);
151#endif
5b0c942f 152 if (timeout <= 0) {
56196826 153#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
5d4fc8d9 154 printf("Timeout waiting card ready\n");
56196826 155#endif
5d4fc8d9
RR
156 return TIMEOUT;
157 }
158
159 return 0;
160}
161
fdbb873e 162static int mmc_set_blocklen(struct mmc *mmc, int len)
272cc70b
AF
163{
164 struct mmc_cmd cmd;
165
166 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
167 cmd.resp_type = MMC_RSP_R1;
168 cmd.cmdarg = len;
272cc70b
AF
169
170 return mmc_send_cmd(mmc, &cmd, NULL);
171}
172
173struct mmc *find_mmc_device(int dev_num)
174{
175 struct mmc *m;
176 struct list_head *entry;
177
178 list_for_each(entry, &mmc_devices) {
179 m = list_entry(entry, struct mmc, link);
180
181 if (m->block_dev.dev == dev_num)
182 return m;
183 }
184
56196826 185#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
272cc70b 186 printf("MMC Device %d not found\n", dev_num);
56196826 187#endif
272cc70b
AF
188
189 return NULL;
190}
191
e6f99a56
LW
192static ulong mmc_erase_t(struct mmc *mmc, ulong start, lbaint_t blkcnt)
193{
194 struct mmc_cmd cmd;
195 ulong end;
196 int err, start_cmd, end_cmd;
197
198 if (mmc->high_capacity)
199 end = start + blkcnt - 1;
200 else {
201 end = (start + blkcnt - 1) * mmc->write_bl_len;
202 start *= mmc->write_bl_len;
203 }
204
205 if (IS_SD(mmc)) {
206 start_cmd = SD_CMD_ERASE_WR_BLK_START;
207 end_cmd = SD_CMD_ERASE_WR_BLK_END;
208 } else {
209 start_cmd = MMC_CMD_ERASE_GROUP_START;
210 end_cmd = MMC_CMD_ERASE_GROUP_END;
211 }
212
213 cmd.cmdidx = start_cmd;
214 cmd.cmdarg = start;
215 cmd.resp_type = MMC_RSP_R1;
e6f99a56
LW
216
217 err = mmc_send_cmd(mmc, &cmd, NULL);
218 if (err)
219 goto err_out;
220
221 cmd.cmdidx = end_cmd;
222 cmd.cmdarg = end;
223
224 err = mmc_send_cmd(mmc, &cmd, NULL);
225 if (err)
226 goto err_out;
227
228 cmd.cmdidx = MMC_CMD_ERASE;
229 cmd.cmdarg = SECURE_ERASE;
230 cmd.resp_type = MMC_RSP_R1b;
231
232 err = mmc_send_cmd(mmc, &cmd, NULL);
233 if (err)
234 goto err_out;
235
236 return 0;
237
238err_out:
56196826 239#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
e6f99a56 240 puts("mmc erase failed\n");
56196826 241#endif
e6f99a56
LW
242 return err;
243}
244
245static unsigned long
ff8fef56 246mmc_berase(int dev_num, lbaint_t start, lbaint_t blkcnt)
e6f99a56
LW
247{
248 int err = 0;
249 struct mmc *mmc = find_mmc_device(dev_num);
250 lbaint_t blk = 0, blk_r = 0;
d2d8afae 251 int timeout = 1000;
e6f99a56
LW
252
253 if (!mmc)
254 return -1;
255
56196826 256#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
e6f99a56
LW
257 if ((start % mmc->erase_grp_size) || (blkcnt % mmc->erase_grp_size))
258 printf("\n\nCaution! Your devices Erase group is 0x%x\n"
ff8fef56
SS
259 "The erase range would be change to "
260 "0x" LBAF "~0x" LBAF "\n\n",
e6f99a56
LW
261 mmc->erase_grp_size, start & ~(mmc->erase_grp_size - 1),
262 ((start + blkcnt + mmc->erase_grp_size)
263 & ~(mmc->erase_grp_size - 1)) - 1);
56196826 264#endif
e6f99a56
LW
265
266 while (blk < blkcnt) {
267 blk_r = ((blkcnt - blk) > mmc->erase_grp_size) ?
268 mmc->erase_grp_size : (blkcnt - blk);
269 err = mmc_erase_t(mmc, start + blk, blk_r);
270 if (err)
271 break;
272
273 blk += blk_r;
d2d8afae
JH
274
275 /* Waiting for the ready status */
276 if (mmc_send_status(mmc, timeout))
277 return 0;
e6f99a56
LW
278 }
279
280 return blk;
281}
282
272cc70b 283static ulong
ff8fef56 284mmc_write_blocks(struct mmc *mmc, lbaint_t start, lbaint_t blkcnt, const void*src)
272cc70b
AF
285{
286 struct mmc_cmd cmd;
287 struct mmc_data data;
5d4fc8d9 288 int timeout = 1000;
272cc70b 289
d2bf29e3 290 if ((start + blkcnt) > mmc->block_dev.lba) {
56196826 291#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
ff8fef56 292 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
d2bf29e3 293 start + blkcnt, mmc->block_dev.lba);
56196826 294#endif
d2bf29e3
LW
295 return 0;
296 }
272cc70b 297
a586c0aa
RC
298 if (blkcnt == 0)
299 return 0;
300 else if (blkcnt == 1)
272cc70b 301 cmd.cmdidx = MMC_CMD_WRITE_SINGLE_BLOCK;
a586c0aa
RC
302 else
303 cmd.cmdidx = MMC_CMD_WRITE_MULTIPLE_BLOCK;
272cc70b
AF
304
305 if (mmc->high_capacity)
306 cmd.cmdarg = start;
307 else
def412b6 308 cmd.cmdarg = start * mmc->write_bl_len;
272cc70b
AF
309
310 cmd.resp_type = MMC_RSP_R1;
272cc70b
AF
311
312 data.src = src;
313 data.blocks = blkcnt;
def412b6 314 data.blocksize = mmc->write_bl_len;
272cc70b
AF
315 data.flags = MMC_DATA_WRITE;
316
def412b6 317 if (mmc_send_cmd(mmc, &cmd, &data)) {
56196826 318#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
def412b6 319 printf("mmc write failed\n");
56196826 320#endif
def412b6 321 return 0;
272cc70b
AF
322 }
323
d52ebf10
TC
324 /* SPI multiblock writes terminate using a special
325 * token, not a STOP_TRANSMISSION request.
326 */
327 if (!mmc_host_is_spi(mmc) && blkcnt > 1) {
272cc70b
AF
328 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
329 cmd.cmdarg = 0;
330 cmd.resp_type = MMC_RSP_R1b;
def412b6 331 if (mmc_send_cmd(mmc, &cmd, NULL)) {
56196826 332#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
def412b6 333 printf("mmc fail to send stop cmd\n");
56196826 334#endif
def412b6 335 return 0;
0158126e 336 }
272cc70b
AF
337 }
338
93ad0d18
JK
339 /* Waiting for the ready status */
340 if (mmc_send_status(mmc, timeout))
341 return 0;
342
272cc70b
AF
343 return blkcnt;
344}
345
0158126e 346static ulong
ff8fef56 347mmc_bwrite(int dev_num, lbaint_t start, lbaint_t blkcnt, const void*src)
0158126e 348{
0158126e
LW
349 lbaint_t cur, blocks_todo = blkcnt;
350
def412b6 351 struct mmc *mmc = find_mmc_device(dev_num);
0158126e 352 if (!mmc)
def412b6 353 return 0;
0158126e 354
def412b6
SS
355 if (mmc_set_blocklen(mmc, mmc->write_bl_len))
356 return 0;
0158126e
LW
357
358 do {
8feafcc4 359 cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo;
0158126e 360 if(mmc_write_blocks(mmc, start, cur, src) != cur)
def412b6 361 return 0;
0158126e
LW
362 blocks_todo -= cur;
363 start += cur;
364 src += cur * mmc->write_bl_len;
365 } while (blocks_todo > 0);
366
367 return blkcnt;
368}
369
ff8fef56 370static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
fdbb873e 371 lbaint_t blkcnt)
272cc70b
AF
372{
373 struct mmc_cmd cmd;
374 struct mmc_data data;
375
4a1a06bc
AS
376 if (blkcnt > 1)
377 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
378 else
379 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
272cc70b
AF
380
381 if (mmc->high_capacity)
4a1a06bc 382 cmd.cmdarg = start;
272cc70b 383 else
4a1a06bc 384 cmd.cmdarg = start * mmc->read_bl_len;
272cc70b
AF
385
386 cmd.resp_type = MMC_RSP_R1;
272cc70b
AF
387
388 data.dest = dst;
4a1a06bc 389 data.blocks = blkcnt;
272cc70b
AF
390 data.blocksize = mmc->read_bl_len;
391 data.flags = MMC_DATA_READ;
392
4a1a06bc
AS
393 if (mmc_send_cmd(mmc, &cmd, &data))
394 return 0;
272cc70b 395
4a1a06bc
AS
396 if (blkcnt > 1) {
397 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
398 cmd.cmdarg = 0;
399 cmd.resp_type = MMC_RSP_R1b;
4a1a06bc 400 if (mmc_send_cmd(mmc, &cmd, NULL)) {
56196826 401#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
4a1a06bc 402 printf("mmc fail to send stop cmd\n");
56196826 403#endif
4a1a06bc
AS
404 return 0;
405 }
272cc70b
AF
406 }
407
4a1a06bc 408 return blkcnt;
272cc70b
AF
409}
410
ff8fef56 411static ulong mmc_bread(int dev_num, lbaint_t start, lbaint_t blkcnt, void *dst)
272cc70b 412{
4a1a06bc
AS
413 lbaint_t cur, blocks_todo = blkcnt;
414
415 if (blkcnt == 0)
416 return 0;
272cc70b 417
4a1a06bc 418 struct mmc *mmc = find_mmc_device(dev_num);
272cc70b
AF
419 if (!mmc)
420 return 0;
421
d2bf29e3 422 if ((start + blkcnt) > mmc->block_dev.lba) {
56196826 423#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
ff8fef56 424 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
d2bf29e3 425 start + blkcnt, mmc->block_dev.lba);
56196826 426#endif
d2bf29e3
LW
427 return 0;
428 }
272cc70b 429
4a1a06bc 430 if (mmc_set_blocklen(mmc, mmc->read_bl_len))
272cc70b 431 return 0;
272cc70b 432
4a1a06bc 433 do {
8feafcc4 434 cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo;
4a1a06bc
AS
435 if(mmc_read_blocks(mmc, dst, start, cur) != cur)
436 return 0;
437 blocks_todo -= cur;
438 start += cur;
439 dst += cur * mmc->read_bl_len;
440 } while (blocks_todo > 0);
272cc70b
AF
441
442 return blkcnt;
443}
444
fdbb873e 445static int mmc_go_idle(struct mmc *mmc)
272cc70b
AF
446{
447 struct mmc_cmd cmd;
448 int err;
449
450 udelay(1000);
451
452 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
453 cmd.cmdarg = 0;
454 cmd.resp_type = MMC_RSP_NONE;
272cc70b
AF
455
456 err = mmc_send_cmd(mmc, &cmd, NULL);
457
458 if (err)
459 return err;
460
461 udelay(2000);
462
463 return 0;
464}
465
fdbb873e 466static int sd_send_op_cond(struct mmc *mmc)
272cc70b
AF
467{
468 int timeout = 1000;
469 int err;
470 struct mmc_cmd cmd;
471
472 do {
473 cmd.cmdidx = MMC_CMD_APP_CMD;
474 cmd.resp_type = MMC_RSP_R1;
475 cmd.cmdarg = 0;
272cc70b
AF
476
477 err = mmc_send_cmd(mmc, &cmd, NULL);
478
479 if (err)
480 return err;
481
482 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
483 cmd.resp_type = MMC_RSP_R3;
250de12b
SB
484
485 /*
486 * Most cards do not answer if some reserved bits
487 * in the ocr are set. However, Some controller
488 * can set bit 7 (reserved for low voltages), but
489 * how to manage low voltages SD card is not yet
490 * specified.
491 */
d52ebf10
TC
492 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
493 (mmc->voltages & 0xff8000);
272cc70b
AF
494
495 if (mmc->version == SD_VERSION_2)
496 cmd.cmdarg |= OCR_HCS;
497
498 err = mmc_send_cmd(mmc, &cmd, NULL);
499
500 if (err)
501 return err;
502
503 udelay(1000);
504 } while ((!(cmd.response[0] & OCR_BUSY)) && timeout--);
505
506 if (timeout <= 0)
507 return UNUSABLE_ERR;
508
509 if (mmc->version != SD_VERSION_2)
510 mmc->version = SD_VERSION_1_0;
511
d52ebf10
TC
512 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
513 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
514 cmd.resp_type = MMC_RSP_R3;
515 cmd.cmdarg = 0;
d52ebf10
TC
516
517 err = mmc_send_cmd(mmc, &cmd, NULL);
518
519 if (err)
520 return err;
521 }
522
998be3dd 523 mmc->ocr = cmd.response[0];
272cc70b
AF
524
525 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
526 mmc->rca = 0;
527
528 return 0;
529}
530
e9550449
CLC
531/* We pass in the cmd since otherwise the init seems to fail */
532static int mmc_send_op_cond_iter(struct mmc *mmc, struct mmc_cmd *cmd,
533 int use_arg)
272cc70b 534{
272cc70b
AF
535 int err;
536
e9550449
CLC
537 cmd->cmdidx = MMC_CMD_SEND_OP_COND;
538 cmd->resp_type = MMC_RSP_R3;
539 cmd->cmdarg = 0;
540 if (use_arg && !mmc_host_is_spi(mmc)) {
541 cmd->cmdarg =
542 (mmc->voltages &
543 (mmc->op_cond_response & OCR_VOLTAGE_MASK)) |
544 (mmc->op_cond_response & OCR_ACCESS_MODE);
545
546 if (mmc->host_caps & MMC_MODE_HC)
547 cmd->cmdarg |= OCR_HCS;
548 }
549 err = mmc_send_cmd(mmc, cmd, NULL);
550 if (err)
551 return err;
552 mmc->op_cond_response = cmd->response[0];
553 return 0;
554}
555
556int mmc_send_op_cond(struct mmc *mmc)
557{
558 struct mmc_cmd cmd;
559 int err, i;
560
272cc70b
AF
561 /* Some cards seem to need this */
562 mmc_go_idle(mmc);
563
31cacbab 564 /* Asking to the card its capabilities */
e9550449
CLC
565 mmc->op_cond_pending = 1;
566 for (i = 0; i < 2; i++) {
567 err = mmc_send_op_cond_iter(mmc, &cmd, i != 0);
568 if (err)
569 return err;
cd6881b5 570
e9550449
CLC
571 /* exit if not busy (flag seems to be inverted) */
572 if (mmc->op_cond_response & OCR_BUSY)
573 return 0;
574 }
575 return IN_PROGRESS;
576}
cd6881b5 577
e9550449
CLC
578int mmc_complete_op_cond(struct mmc *mmc)
579{
580 struct mmc_cmd cmd;
581 int timeout = 1000;
582 uint start;
583 int err;
cd6881b5 584
e9550449
CLC
585 mmc->op_cond_pending = 0;
586 start = get_timer(0);
272cc70b 587 do {
e9550449 588 err = mmc_send_op_cond_iter(mmc, &cmd, 1);
272cc70b
AF
589 if (err)
590 return err;
e9550449
CLC
591 if (get_timer(start) > timeout)
592 return UNUSABLE_ERR;
593 udelay(100);
594 } while (!(mmc->op_cond_response & OCR_BUSY));
272cc70b 595
d52ebf10
TC
596 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
597 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
598 cmd.resp_type = MMC_RSP_R3;
599 cmd.cmdarg = 0;
d52ebf10
TC
600
601 err = mmc_send_cmd(mmc, &cmd, NULL);
602
603 if (err)
604 return err;
605 }
606
272cc70b 607 mmc->version = MMC_VERSION_UNKNOWN;
998be3dd 608 mmc->ocr = cmd.response[0];
272cc70b
AF
609
610 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
611 mmc->rca = 0;
612
613 return 0;
614}
615
616
fdbb873e 617static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
272cc70b
AF
618{
619 struct mmc_cmd cmd;
620 struct mmc_data data;
621 int err;
622
623 /* Get the Card Status Register */
624 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
625 cmd.resp_type = MMC_RSP_R1;
626 cmd.cmdarg = 0;
272cc70b 627
cdfd1ac6 628 data.dest = (char *)ext_csd;
272cc70b 629 data.blocks = 1;
8bfa195e 630 data.blocksize = MMC_MAX_BLOCK_LEN;
272cc70b
AF
631 data.flags = MMC_DATA_READ;
632
633 err = mmc_send_cmd(mmc, &cmd, &data);
634
635 return err;
636}
637
638
fdbb873e 639static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
272cc70b
AF
640{
641 struct mmc_cmd cmd;
5d4fc8d9
RR
642 int timeout = 1000;
643 int ret;
272cc70b
AF
644
645 cmd.cmdidx = MMC_CMD_SWITCH;
646 cmd.resp_type = MMC_RSP_R1b;
647 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
5d4fc8d9
RR
648 (index << 16) |
649 (value << 8);
272cc70b 650
5d4fc8d9
RR
651 ret = mmc_send_cmd(mmc, &cmd, NULL);
652
653 /* Waiting for the ready status */
93ad0d18
JK
654 if (!ret)
655 ret = mmc_send_status(mmc, timeout);
5d4fc8d9
RR
656
657 return ret;
658
272cc70b
AF
659}
660
fdbb873e 661static int mmc_change_freq(struct mmc *mmc)
272cc70b 662{
8bfa195e 663 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
272cc70b
AF
664 char cardtype;
665 int err;
666
667 mmc->card_caps = 0;
668
d52ebf10
TC
669 if (mmc_host_is_spi(mmc))
670 return 0;
671
272cc70b
AF
672 /* Only version 4 supports high-speed */
673 if (mmc->version < MMC_VERSION_4)
674 return 0;
675
272cc70b
AF
676 err = mmc_send_ext_csd(mmc, ext_csd);
677
678 if (err)
679 return err;
680
0560db18 681 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
272cc70b
AF
682
683 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
684
685 if (err)
686 return err;
687
688 /* Now check to see that it worked */
689 err = mmc_send_ext_csd(mmc, ext_csd);
690
691 if (err)
692 return err;
693
694 /* No high-speed support */
0560db18 695 if (!ext_csd[EXT_CSD_HS_TIMING])
272cc70b
AF
696 return 0;
697
698 /* High Speed is set, there are two types: 52MHz and 26MHz */
699 if (cardtype & MMC_HS_52MHZ)
700 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
701 else
702 mmc->card_caps |= MMC_MODE_HS;
703
704 return 0;
705}
706
f866a46d
SW
707static int mmc_set_capacity(struct mmc *mmc, int part_num)
708{
709 switch (part_num) {
710 case 0:
711 mmc->capacity = mmc->capacity_user;
712 break;
713 case 1:
714 case 2:
715 mmc->capacity = mmc->capacity_boot;
716 break;
717 case 3:
718 mmc->capacity = mmc->capacity_rpmb;
719 break;
720 case 4:
721 case 5:
722 case 6:
723 case 7:
724 mmc->capacity = mmc->capacity_gp[part_num - 4];
725 break;
726 default:
727 return -1;
728 }
729
730 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
731
732 return 0;
733}
734
bc897b1d
LW
735int mmc_switch_part(int dev_num, unsigned int part_num)
736{
737 struct mmc *mmc = find_mmc_device(dev_num);
f866a46d 738 int ret;
bc897b1d
LW
739
740 if (!mmc)
741 return -1;
742
f866a46d
SW
743 ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
744 (mmc->part_config & ~PART_ACCESS_MASK)
745 | (part_num & PART_ACCESS_MASK));
746 if (ret)
747 return ret;
748
749 return mmc_set_capacity(mmc, part_num);
bc897b1d
LW
750}
751
48972d90
TR
752int mmc_getcd(struct mmc *mmc)
753{
754 int cd;
755
756 cd = board_mmc_getcd(mmc);
757
d4e1da4e
PK
758 if (cd < 0) {
759 if (mmc->getcd)
760 cd = mmc->getcd(mmc);
761 else
762 cd = 1;
763 }
48972d90
TR
764
765 return cd;
766}
767
fdbb873e 768static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
272cc70b
AF
769{
770 struct mmc_cmd cmd;
771 struct mmc_data data;
772
773 /* Switch the frequency */
774 cmd.cmdidx = SD_CMD_SWITCH_FUNC;
775 cmd.resp_type = MMC_RSP_R1;
776 cmd.cmdarg = (mode << 31) | 0xffffff;
777 cmd.cmdarg &= ~(0xf << (group * 4));
778 cmd.cmdarg |= value << (group * 4);
272cc70b
AF
779
780 data.dest = (char *)resp;
781 data.blocksize = 64;
782 data.blocks = 1;
783 data.flags = MMC_DATA_READ;
784
785 return mmc_send_cmd(mmc, &cmd, &data);
786}
787
788
fdbb873e 789static int sd_change_freq(struct mmc *mmc)
272cc70b
AF
790{
791 int err;
792 struct mmc_cmd cmd;
f781dd38
A
793 ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
794 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
272cc70b
AF
795 struct mmc_data data;
796 int timeout;
797
798 mmc->card_caps = 0;
799
d52ebf10
TC
800 if (mmc_host_is_spi(mmc))
801 return 0;
802
272cc70b
AF
803 /* Read the SCR to find out if this card supports higher speeds */
804 cmd.cmdidx = MMC_CMD_APP_CMD;
805 cmd.resp_type = MMC_RSP_R1;
806 cmd.cmdarg = mmc->rca << 16;
272cc70b
AF
807
808 err = mmc_send_cmd(mmc, &cmd, NULL);
809
810 if (err)
811 return err;
812
813 cmd.cmdidx = SD_CMD_APP_SEND_SCR;
814 cmd.resp_type = MMC_RSP_R1;
815 cmd.cmdarg = 0;
272cc70b
AF
816
817 timeout = 3;
818
819retry_scr:
f781dd38 820 data.dest = (char *)scr;
272cc70b
AF
821 data.blocksize = 8;
822 data.blocks = 1;
823 data.flags = MMC_DATA_READ;
824
825 err = mmc_send_cmd(mmc, &cmd, &data);
826
827 if (err) {
828 if (timeout--)
829 goto retry_scr;
830
831 return err;
832 }
833
4e3d89ba
YK
834 mmc->scr[0] = __be32_to_cpu(scr[0]);
835 mmc->scr[1] = __be32_to_cpu(scr[1]);
272cc70b
AF
836
837 switch ((mmc->scr[0] >> 24) & 0xf) {
838 case 0:
839 mmc->version = SD_VERSION_1_0;
840 break;
841 case 1:
842 mmc->version = SD_VERSION_1_10;
843 break;
844 case 2:
845 mmc->version = SD_VERSION_2;
1741c64d
JC
846 if ((mmc->scr[0] >> 15) & 0x1)
847 mmc->version = SD_VERSION_3;
272cc70b
AF
848 break;
849 default:
850 mmc->version = SD_VERSION_1_0;
851 break;
852 }
853
b44c7083
AS
854 if (mmc->scr[0] & SD_DATA_4BIT)
855 mmc->card_caps |= MMC_MODE_4BIT;
856
272cc70b
AF
857 /* Version 1.0 doesn't support switching */
858 if (mmc->version == SD_VERSION_1_0)
859 return 0;
860
861 timeout = 4;
862 while (timeout--) {
863 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
f781dd38 864 (u8 *)switch_status);
272cc70b
AF
865
866 if (err)
867 return err;
868
869 /* The high-speed function is busy. Try again */
4e3d89ba 870 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
272cc70b
AF
871 break;
872 }
873
272cc70b 874 /* If high-speed isn't supported, we return */
4e3d89ba 875 if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
272cc70b
AF
876 return 0;
877
2c3fbf4c
ML
878 /*
879 * If the host doesn't support SD_HIGHSPEED, do not switch card to
880 * HIGHSPEED mode even if the card support SD_HIGHSPPED.
881 * This can avoid furthur problem when the card runs in different
882 * mode between the host.
883 */
884 if (!((mmc->host_caps & MMC_MODE_HS_52MHz) &&
885 (mmc->host_caps & MMC_MODE_HS)))
886 return 0;
887
f781dd38 888 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
272cc70b
AF
889
890 if (err)
891 return err;
892
4e3d89ba 893 if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
272cc70b
AF
894 mmc->card_caps |= MMC_MODE_HS;
895
896 return 0;
897}
898
899/* frequency bases */
900/* divided by 10 to be nice to platforms without floating point */
5f837c2c 901static const int fbase[] = {
272cc70b
AF
902 10000,
903 100000,
904 1000000,
905 10000000,
906};
907
908/* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
909 * to platforms without floating point.
910 */
5f837c2c 911static const int multipliers[] = {
272cc70b
AF
912 0, /* reserved */
913 10,
914 12,
915 13,
916 15,
917 20,
918 25,
919 30,
920 35,
921 40,
922 45,
923 50,
924 55,
925 60,
926 70,
927 80,
928};
929
fdbb873e 930static void mmc_set_ios(struct mmc *mmc)
272cc70b
AF
931{
932 mmc->set_ios(mmc);
933}
934
935void mmc_set_clock(struct mmc *mmc, uint clock)
936{
937 if (clock > mmc->f_max)
938 clock = mmc->f_max;
939
940 if (clock < mmc->f_min)
941 clock = mmc->f_min;
942
943 mmc->clock = clock;
944
945 mmc_set_ios(mmc);
946}
947
fdbb873e 948static void mmc_set_bus_width(struct mmc *mmc, uint width)
272cc70b
AF
949{
950 mmc->bus_width = width;
951
952 mmc_set_ios(mmc);
953}
954
fdbb873e 955static int mmc_startup(struct mmc *mmc)
272cc70b 956{
f866a46d 957 int err, i;
272cc70b 958 uint mult, freq;
639b7827 959 u64 cmult, csize, capacity;
272cc70b 960 struct mmc_cmd cmd;
8bfa195e
SG
961 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
962 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
5d4fc8d9 963 int timeout = 1000;
272cc70b 964
d52ebf10
TC
965#ifdef CONFIG_MMC_SPI_CRC_ON
966 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
967 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
968 cmd.resp_type = MMC_RSP_R1;
969 cmd.cmdarg = 1;
d52ebf10
TC
970 err = mmc_send_cmd(mmc, &cmd, NULL);
971
972 if (err)
973 return err;
974 }
975#endif
976
272cc70b 977 /* Put the Card in Identify Mode */
d52ebf10
TC
978 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
979 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
272cc70b
AF
980 cmd.resp_type = MMC_RSP_R2;
981 cmd.cmdarg = 0;
272cc70b
AF
982
983 err = mmc_send_cmd(mmc, &cmd, NULL);
984
985 if (err)
986 return err;
987
988 memcpy(mmc->cid, cmd.response, 16);
989
990 /*
991 * For MMC cards, set the Relative Address.
992 * For SD cards, get the Relatvie Address.
993 * This also puts the cards into Standby State
994 */
d52ebf10
TC
995 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
996 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
997 cmd.cmdarg = mmc->rca << 16;
998 cmd.resp_type = MMC_RSP_R6;
272cc70b 999
d52ebf10 1000 err = mmc_send_cmd(mmc, &cmd, NULL);
272cc70b 1001
d52ebf10
TC
1002 if (err)
1003 return err;
272cc70b 1004
d52ebf10
TC
1005 if (IS_SD(mmc))
1006 mmc->rca = (cmd.response[0] >> 16) & 0xffff;
1007 }
272cc70b
AF
1008
1009 /* Get the Card-Specific Data */
1010 cmd.cmdidx = MMC_CMD_SEND_CSD;
1011 cmd.resp_type = MMC_RSP_R2;
1012 cmd.cmdarg = mmc->rca << 16;
272cc70b
AF
1013
1014 err = mmc_send_cmd(mmc, &cmd, NULL);
1015
5d4fc8d9
RR
1016 /* Waiting for the ready status */
1017 mmc_send_status(mmc, timeout);
1018
272cc70b
AF
1019 if (err)
1020 return err;
1021
998be3dd
RV
1022 mmc->csd[0] = cmd.response[0];
1023 mmc->csd[1] = cmd.response[1];
1024 mmc->csd[2] = cmd.response[2];
1025 mmc->csd[3] = cmd.response[3];
272cc70b
AF
1026
1027 if (mmc->version == MMC_VERSION_UNKNOWN) {
0b453ffe 1028 int version = (cmd.response[0] >> 26) & 0xf;
272cc70b
AF
1029
1030 switch (version) {
1031 case 0:
1032 mmc->version = MMC_VERSION_1_2;
1033 break;
1034 case 1:
1035 mmc->version = MMC_VERSION_1_4;
1036 break;
1037 case 2:
1038 mmc->version = MMC_VERSION_2_2;
1039 break;
1040 case 3:
1041 mmc->version = MMC_VERSION_3;
1042 break;
1043 case 4:
1044 mmc->version = MMC_VERSION_4;
1045 break;
1046 default:
1047 mmc->version = MMC_VERSION_1_2;
1048 break;
1049 }
1050 }
1051
1052 /* divide frequency by 10, since the mults are 10x bigger */
0b453ffe
RV
1053 freq = fbase[(cmd.response[0] & 0x7)];
1054 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
272cc70b
AF
1055
1056 mmc->tran_speed = freq * mult;
1057
998be3dd 1058 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
272cc70b
AF
1059
1060 if (IS_SD(mmc))
1061 mmc->write_bl_len = mmc->read_bl_len;
1062 else
998be3dd 1063 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
272cc70b
AF
1064
1065 if (mmc->high_capacity) {
1066 csize = (mmc->csd[1] & 0x3f) << 16
1067 | (mmc->csd[2] & 0xffff0000) >> 16;
1068 cmult = 8;
1069 } else {
1070 csize = (mmc->csd[1] & 0x3ff) << 2
1071 | (mmc->csd[2] & 0xc0000000) >> 30;
1072 cmult = (mmc->csd[2] & 0x00038000) >> 15;
1073 }
1074
f866a46d
SW
1075 mmc->capacity_user = (csize + 1) << (cmult + 2);
1076 mmc->capacity_user *= mmc->read_bl_len;
1077 mmc->capacity_boot = 0;
1078 mmc->capacity_rpmb = 0;
1079 for (i = 0; i < 4; i++)
1080 mmc->capacity_gp[i] = 0;
272cc70b 1081
8bfa195e
SG
1082 if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
1083 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
272cc70b 1084
8bfa195e
SG
1085 if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
1086 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
272cc70b
AF
1087
1088 /* Select the card, and put it into Transfer Mode */
d52ebf10
TC
1089 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1090 cmd.cmdidx = MMC_CMD_SELECT_CARD;
fe8f7066 1091 cmd.resp_type = MMC_RSP_R1;
d52ebf10 1092 cmd.cmdarg = mmc->rca << 16;
d52ebf10 1093 err = mmc_send_cmd(mmc, &cmd, NULL);
272cc70b 1094
d52ebf10
TC
1095 if (err)
1096 return err;
1097 }
272cc70b 1098
e6f99a56
LW
1099 /*
1100 * For SD, its erase group is always one sector
1101 */
1102 mmc->erase_grp_size = 1;
bc897b1d 1103 mmc->part_config = MMCPART_NOAVAILABLE;
d23e2c09
SG
1104 if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
1105 /* check ext_csd version and capacity */
1106 err = mmc_send_ext_csd(mmc, ext_csd);
fdbb873e 1107 if (!err && (ext_csd[EXT_CSD_REV] >= 2)) {
639b7827
YS
1108 /*
1109 * According to the JEDEC Standard, the value of
1110 * ext_csd's capacity is valid if the value is more
1111 * than 2GB
1112 */
0560db18
LW
1113 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
1114 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
1115 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
1116 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
8bfa195e 1117 capacity *= MMC_MAX_BLOCK_LEN;
b1f1e821 1118 if ((capacity >> 20) > 2 * 1024)
f866a46d 1119 mmc->capacity_user = capacity;
d23e2c09 1120 }
bc897b1d 1121
64f4a619
JC
1122 switch (ext_csd[EXT_CSD_REV]) {
1123 case 1:
1124 mmc->version = MMC_VERSION_4_1;
1125 break;
1126 case 2:
1127 mmc->version = MMC_VERSION_4_2;
1128 break;
1129 case 3:
1130 mmc->version = MMC_VERSION_4_3;
1131 break;
1132 case 5:
1133 mmc->version = MMC_VERSION_4_41;
1134 break;
1135 case 6:
1136 mmc->version = MMC_VERSION_4_5;
1137 break;
1138 }
1139
e6f99a56
LW
1140 /*
1141 * Check whether GROUP_DEF is set, if yes, read out
1142 * group size from ext_csd directly, or calculate
1143 * the group size from the csd value.
1144 */
8bfa195e 1145 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF]) {
0560db18 1146 mmc->erase_grp_size =
8bfa195e
SG
1147 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] *
1148 MMC_MAX_BLOCK_LEN * 1024;
1149 } else {
e6f99a56
LW
1150 int erase_gsz, erase_gmul;
1151 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
1152 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
1153 mmc->erase_grp_size = (erase_gsz + 1)
1154 * (erase_gmul + 1);
1155 }
1156
bc897b1d 1157 /* store the partition info of emmc */
8948ea83
SW
1158 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
1159 ext_csd[EXT_CSD_BOOT_MULT])
0560db18 1160 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
f866a46d
SW
1161
1162 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
1163
1164 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
1165
1166 for (i = 0; i < 4; i++) {
1167 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
1168 mmc->capacity_gp[i] = (ext_csd[idx + 2] << 16) +
1169 (ext_csd[idx + 1] << 8) + ext_csd[idx];
1170 mmc->capacity_gp[i] *=
1171 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1172 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1173 }
d23e2c09
SG
1174 }
1175
f866a46d
SW
1176 err = mmc_set_capacity(mmc, mmc->part_num);
1177 if (err)
1178 return err;
1179
272cc70b
AF
1180 if (IS_SD(mmc))
1181 err = sd_change_freq(mmc);
1182 else
1183 err = mmc_change_freq(mmc);
1184
1185 if (err)
1186 return err;
1187
1188 /* Restrict card's capabilities by what the host can do */
1189 mmc->card_caps &= mmc->host_caps;
1190
1191 if (IS_SD(mmc)) {
1192 if (mmc->card_caps & MMC_MODE_4BIT) {
1193 cmd.cmdidx = MMC_CMD_APP_CMD;
1194 cmd.resp_type = MMC_RSP_R1;
1195 cmd.cmdarg = mmc->rca << 16;
272cc70b
AF
1196
1197 err = mmc_send_cmd(mmc, &cmd, NULL);
1198 if (err)
1199 return err;
1200
1201 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1202 cmd.resp_type = MMC_RSP_R1;
1203 cmd.cmdarg = 2;
272cc70b
AF
1204 err = mmc_send_cmd(mmc, &cmd, NULL);
1205 if (err)
1206 return err;
1207
1208 mmc_set_bus_width(mmc, 4);
1209 }
1210
1211 if (mmc->card_caps & MMC_MODE_HS)
ad5fd922 1212 mmc->tran_speed = 50000000;
272cc70b 1213 else
ad5fd922 1214 mmc->tran_speed = 25000000;
272cc70b 1215 } else {
7798f6db
AF
1216 int idx;
1217
1218 /* An array of possible bus widths in order of preference */
1219 static unsigned ext_csd_bits[] = {
1220 EXT_CSD_BUS_WIDTH_8,
1221 EXT_CSD_BUS_WIDTH_4,
1222 EXT_CSD_BUS_WIDTH_1,
1223 };
1224
1225 /* An array to map CSD bus widths to host cap bits */
1226 static unsigned ext_to_hostcaps[] = {
1227 [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
1228 [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
1229 };
1230
1231 /* An array to map chosen bus width to an integer */
1232 static unsigned widths[] = {
1233 8, 4, 1,
1234 };
1235
1236 for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
1237 unsigned int extw = ext_csd_bits[idx];
1238
1239 /*
1240 * Check to make sure the controller supports
1241 * this bus width, if it's more than 1
1242 */
1243 if (extw != EXT_CSD_BUS_WIDTH_1 &&
1244 !(mmc->host_caps & ext_to_hostcaps[extw]))
1245 continue;
1246
272cc70b 1247 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
7798f6db 1248 EXT_CSD_BUS_WIDTH, extw);
272cc70b
AF
1249
1250 if (err)
4137894e 1251 continue;
272cc70b 1252
7798f6db 1253 mmc_set_bus_width(mmc, widths[idx]);
4137894e
LW
1254
1255 err = mmc_send_ext_csd(mmc, test_csd);
1256 if (!err && ext_csd[EXT_CSD_PARTITIONING_SUPPORT] \
1257 == test_csd[EXT_CSD_PARTITIONING_SUPPORT]
1258 && ext_csd[EXT_CSD_ERASE_GROUP_DEF] \
1259 == test_csd[EXT_CSD_ERASE_GROUP_DEF] \
1260 && ext_csd[EXT_CSD_REV] \
1261 == test_csd[EXT_CSD_REV]
1262 && ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] \
1263 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1264 && memcmp(&ext_csd[EXT_CSD_SEC_CNT], \
1265 &test_csd[EXT_CSD_SEC_CNT], 4) == 0) {
1266
7798f6db 1267 mmc->card_caps |= ext_to_hostcaps[extw];
4137894e
LW
1268 break;
1269 }
272cc70b
AF
1270 }
1271
1272 if (mmc->card_caps & MMC_MODE_HS) {
1273 if (mmc->card_caps & MMC_MODE_HS_52MHz)
ad5fd922 1274 mmc->tran_speed = 52000000;
272cc70b 1275 else
ad5fd922
JC
1276 mmc->tran_speed = 26000000;
1277 }
272cc70b
AF
1278 }
1279
ad5fd922
JC
1280 mmc_set_clock(mmc, mmc->tran_speed);
1281
272cc70b
AF
1282 /* fill in device description */
1283 mmc->block_dev.lun = 0;
1284 mmc->block_dev.type = 0;
1285 mmc->block_dev.blksz = mmc->read_bl_len;
0472fbfd 1286 mmc->block_dev.log2blksz = LOG2(mmc->block_dev.blksz);
9b1f942c 1287 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
56196826 1288#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
babce5f6
TH
1289 sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x",
1290 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
1291 (mmc->cid[3] >> 16) & 0xffff);
1292 sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
1293 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1294 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
1295 (mmc->cid[2] >> 24) & 0xff);
1296 sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
1297 (mmc->cid[2] >> 16) & 0xf);
56196826
PB
1298#else
1299 mmc->block_dev.vendor[0] = 0;
1300 mmc->block_dev.product[0] = 0;
1301 mmc->block_dev.revision[0] = 0;
1302#endif
122efd43 1303#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
272cc70b 1304 init_part(&mmc->block_dev);
122efd43 1305#endif
272cc70b
AF
1306
1307 return 0;
1308}
1309
fdbb873e 1310static int mmc_send_if_cond(struct mmc *mmc)
272cc70b
AF
1311{
1312 struct mmc_cmd cmd;
1313 int err;
1314
1315 cmd.cmdidx = SD_CMD_SEND_IF_COND;
1316 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
1317 cmd.cmdarg = ((mmc->voltages & 0xff8000) != 0) << 8 | 0xaa;
1318 cmd.resp_type = MMC_RSP_R7;
272cc70b
AF
1319
1320 err = mmc_send_cmd(mmc, &cmd, NULL);
1321
1322 if (err)
1323 return err;
1324
998be3dd 1325 if ((cmd.response[0] & 0xff) != 0xaa)
272cc70b
AF
1326 return UNUSABLE_ERR;
1327 else
1328 mmc->version = SD_VERSION_2;
1329
1330 return 0;
1331}
1332
1333int mmc_register(struct mmc *mmc)
1334{
1335 /* Setup the universal parts of the block interface just once */
1336 mmc->block_dev.if_type = IF_TYPE_MMC;
1337 mmc->block_dev.dev = cur_dev_num++;
1338 mmc->block_dev.removable = 1;
1339 mmc->block_dev.block_read = mmc_bread;
1340 mmc->block_dev.block_write = mmc_bwrite;
e6f99a56 1341 mmc->block_dev.block_erase = mmc_berase;
8feafcc4
JR
1342 if (!mmc->b_max)
1343 mmc->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
272cc70b
AF
1344
1345 INIT_LIST_HEAD (&mmc->link);
1346
1347 list_add_tail (&mmc->link, &mmc_devices);
1348
1349 return 0;
1350}
1351
df3fc526 1352#ifdef CONFIG_PARTITIONS
272cc70b
AF
1353block_dev_desc_t *mmc_get_dev(int dev)
1354{
1355 struct mmc *mmc = find_mmc_device(dev);
6bb4b4bc 1356 if (!mmc || mmc_init(mmc))
40242bc3 1357 return NULL;
272cc70b 1358
40242bc3 1359 return &mmc->block_dev;
272cc70b 1360}
df3fc526 1361#endif
272cc70b 1362
e9550449 1363int mmc_start_init(struct mmc *mmc)
272cc70b 1364{
afd5932b 1365 int err;
272cc70b 1366
48972d90
TR
1367 if (mmc_getcd(mmc) == 0) {
1368 mmc->has_init = 0;
56196826 1369#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
48972d90 1370 printf("MMC: no card present\n");
56196826 1371#endif
48972d90
TR
1372 return NO_CARD_ERR;
1373 }
1374
bc897b1d
LW
1375 if (mmc->has_init)
1376 return 0;
1377
272cc70b
AF
1378 err = mmc->init(mmc);
1379
1380 if (err)
1381 return err;
1382
b86b85e2
IY
1383 mmc_set_bus_width(mmc, 1);
1384 mmc_set_clock(mmc, 1);
1385
272cc70b
AF
1386 /* Reset the Card */
1387 err = mmc_go_idle(mmc);
1388
1389 if (err)
1390 return err;
1391
bc897b1d
LW
1392 /* The internal partition reset to user partition(0) at every CMD0*/
1393 mmc->part_num = 0;
1394
272cc70b 1395 /* Test for SD version 2 */
afd5932b 1396 err = mmc_send_if_cond(mmc);
272cc70b 1397
272cc70b
AF
1398 /* Now try to get the SD card's operating condition */
1399 err = sd_send_op_cond(mmc);
1400
1401 /* If the command timed out, we check for an MMC card */
1402 if (err == TIMEOUT) {
1403 err = mmc_send_op_cond(mmc);
1404
e9550449 1405 if (err && err != IN_PROGRESS) {
56196826 1406#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
272cc70b 1407 printf("Card did not respond to voltage select!\n");
56196826 1408#endif
272cc70b
AF
1409 return UNUSABLE_ERR;
1410 }
1411 }
1412
e9550449
CLC
1413 if (err == IN_PROGRESS)
1414 mmc->init_in_progress = 1;
1415
1416 return err;
1417}
1418
1419static int mmc_complete_init(struct mmc *mmc)
1420{
1421 int err = 0;
1422
1423 if (mmc->op_cond_pending)
1424 err = mmc_complete_op_cond(mmc);
1425
1426 if (!err)
1427 err = mmc_startup(mmc);
bc897b1d
LW
1428 if (err)
1429 mmc->has_init = 0;
1430 else
1431 mmc->has_init = 1;
e9550449
CLC
1432 mmc->init_in_progress = 0;
1433 return err;
1434}
1435
1436int mmc_init(struct mmc *mmc)
1437{
1438 int err = IN_PROGRESS;
1439 unsigned start = get_timer(0);
1440
1441 if (mmc->has_init)
1442 return 0;
1443 if (!mmc->init_in_progress)
1444 err = mmc_start_init(mmc);
1445
1446 if (!err || err == IN_PROGRESS)
1447 err = mmc_complete_init(mmc);
1448 debug("%s: %d, time %lu\n", __func__, err, get_timer(start));
bc897b1d 1449 return err;
272cc70b
AF
1450}
1451
1452/*
1453 * CPU and board-specific MMC initializations. Aliased function
1454 * signals caller to move on
1455 */
1456static int __def_mmc_init(bd_t *bis)
1457{
1458 return -1;
1459}
1460
f9a109b3
PT
1461int cpu_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init")));
1462int board_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init")));
272cc70b 1463
56196826
PB
1464#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1465
272cc70b
AF
1466void print_mmc_devices(char separator)
1467{
1468 struct mmc *m;
1469 struct list_head *entry;
1470
1471 list_for_each(entry, &mmc_devices) {
1472 m = list_entry(entry, struct mmc, link);
1473
1474 printf("%s: %d", m->name, m->block_dev.dev);
1475
1476 if (entry->next != &mmc_devices)
1477 printf("%c ", separator);
1478 }
1479
1480 printf("\n");
1481}
1482
56196826
PB
1483#else
1484void print_mmc_devices(char separator) { }
1485#endif
1486
ea6ebe21
LW
1487int get_mmc_num(void)
1488{
1489 return cur_dev_num;
1490}
1491
e9550449
CLC
1492void mmc_set_preinit(struct mmc *mmc, int preinit)
1493{
1494 mmc->preinit = preinit;
1495}
1496
1497static void do_preinit(void)
1498{
1499 struct mmc *m;
1500 struct list_head *entry;
1501
1502 list_for_each(entry, &mmc_devices) {
1503 m = list_entry(entry, struct mmc, link);
1504
1505 if (m->preinit)
1506 mmc_start_init(m);
1507 }
1508}
1509
1510
272cc70b
AF
1511int mmc_initialize(bd_t *bis)
1512{
1513 INIT_LIST_HEAD (&mmc_devices);
1514 cur_dev_num = 0;
1515
1516 if (board_mmc_init(bis) < 0)
1517 cpu_mmc_init(bis);
1518
bb0dc108 1519#ifndef CONFIG_SPL_BUILD
272cc70b 1520 print_mmc_devices(',');
bb0dc108 1521#endif
272cc70b 1522
e9550449 1523 do_preinit();
272cc70b
AF
1524 return 0;
1525}
3690d6d6
A
1526
1527#ifdef CONFIG_SUPPORT_EMMC_BOOT
1528/*
1529 * This function changes the size of boot partition and the size of rpmb
1530 * partition present on EMMC devices.
1531 *
1532 * Input Parameters:
1533 * struct *mmc: pointer for the mmc device strcuture
1534 * bootsize: size of boot partition
1535 * rpmbsize: size of rpmb partition
1536 *
1537 * Returns 0 on success.
1538 */
1539
1540int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
1541 unsigned long rpmbsize)
1542{
1543 int err;
1544 struct mmc_cmd cmd;
1545
1546 /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */
1547 cmd.cmdidx = MMC_CMD_RES_MAN;
1548 cmd.resp_type = MMC_RSP_R1b;
1549 cmd.cmdarg = MMC_CMD62_ARG1;
1550
1551 err = mmc_send_cmd(mmc, &cmd, NULL);
1552 if (err) {
1553 debug("mmc_boot_partition_size_change: Error1 = %d\n", err);
1554 return err;
1555 }
1556
1557 /* Boot partition changing mode */
1558 cmd.cmdidx = MMC_CMD_RES_MAN;
1559 cmd.resp_type = MMC_RSP_R1b;
1560 cmd.cmdarg = MMC_CMD62_ARG2;
1561
1562 err = mmc_send_cmd(mmc, &cmd, NULL);
1563 if (err) {
1564 debug("mmc_boot_partition_size_change: Error2 = %d\n", err);
1565 return err;
1566 }
1567 /* boot partition size is multiple of 128KB */
1568 bootsize = (bootsize * 1024) / 128;
1569
1570 /* Arg: boot partition size */
1571 cmd.cmdidx = MMC_CMD_RES_MAN;
1572 cmd.resp_type = MMC_RSP_R1b;
1573 cmd.cmdarg = bootsize;
1574
1575 err = mmc_send_cmd(mmc, &cmd, NULL);
1576 if (err) {
1577 debug("mmc_boot_partition_size_change: Error3 = %d\n", err);
1578 return err;
1579 }
1580 /* RPMB partition size is multiple of 128KB */
1581 rpmbsize = (rpmbsize * 1024) / 128;
1582 /* Arg: RPMB partition size */
1583 cmd.cmdidx = MMC_CMD_RES_MAN;
1584 cmd.resp_type = MMC_RSP_R1b;
1585 cmd.cmdarg = rpmbsize;
1586
1587 err = mmc_send_cmd(mmc, &cmd, NULL);
1588 if (err) {
1589 debug("mmc_boot_partition_size_change: Error4 = %d\n", err);
1590 return err;
1591 }
1592 return 0;
1593}
1594
1595/*
1596 * This function shall form and send the commands to open / close the
1597 * boot partition specified by user.
1598 *
1599 * Input Parameters:
1600 * ack: 0x0 - No boot acknowledge sent (default)
1601 * 0x1 - Boot acknowledge sent during boot operation
1602 * part_num: User selects boot data that will be sent to master
1603 * 0x0 - Device not boot enabled (default)
1604 * 0x1 - Boot partition 1 enabled for boot
1605 * 0x2 - Boot partition 2 enabled for boot
1606 * access: User selects partitions to access
1607 * 0x0 : No access to boot partition (default)
1608 * 0x1 : R/W boot partition 1
1609 * 0x2 : R/W boot partition 2
1610 * 0x3 : R/W Replay Protected Memory Block (RPMB)
1611 *
1612 * Returns 0 on success.
1613 */
1614int mmc_boot_part_access(struct mmc *mmc, u8 ack, u8 part_num, u8 access)
1615{
1616 int err;
1617 struct mmc_cmd cmd;
1618
1619 /* Boot ack enable, boot partition enable , boot partition access */
1620 cmd.cmdidx = MMC_CMD_SWITCH;
1621 cmd.resp_type = MMC_RSP_R1b;
1622
1623 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
1624 (EXT_CSD_PART_CONF << 16) |
1625 ((EXT_CSD_BOOT_ACK(ack) |
1626 EXT_CSD_BOOT_PART_NUM(part_num) |
1627 EXT_CSD_PARTITION_ACCESS(access)) << 8);
1628
1629 err = mmc_send_cmd(mmc, &cmd, NULL);
1630 if (err) {
1631 if (access) {
1632 debug("mmc boot partition#%d open fail:Error1 = %d\n",
1633 part_num, err);
1634 } else {
1635 debug("mmc boot partition#%d close fail:Error = %d\n",
1636 part_num, err);
1637 }
1638 return err;
1639 }
1640
1641 if (access) {
1642 /* 4bit transfer mode at booting time. */
1643 cmd.cmdidx = MMC_CMD_SWITCH;
1644 cmd.resp_type = MMC_RSP_R1b;
1645
1646 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
1647 (EXT_CSD_BOOT_BUS_WIDTH << 16) |
1648 ((1 << 0) << 8);
1649
1650 err = mmc_send_cmd(mmc, &cmd, NULL);
1651 if (err) {
1652 debug("mmc boot partition#%d open fail:Error2 = %d\n",
1653 part_num, err);
1654 return err;
1655 }
1656 }
1657 return 0;
1658}
1659#endif