]> git.ipfire.org Git - people/ms/u-boot.git/blame - drivers/mmc/mmc.c
mmc: remove the unnecessary define and fix the wrong bit control
[people/ms/u-boot.git] / drivers / mmc / mmc.c
CommitLineData
272cc70b
AF
1/*
2 * Copyright 2008, Freescale Semiconductor, Inc
3 * Andy Fleming
4 *
5 * Based vaguely on the Linux code
6 *
1a459660 7 * SPDX-License-Identifier: GPL-2.0+
272cc70b
AF
8 */
9
10#include <config.h>
11#include <common.h>
12#include <command.h>
13#include <mmc.h>
14#include <part.h>
15#include <malloc.h>
16#include <linux/list.h>
9b1f942c 17#include <div64.h>
da61fa5f 18#include "mmc_private.h"
272cc70b
AF
19
20static struct list_head mmc_devices;
21static int cur_dev_num = -1;
22
d23d8d7e
NK
23int __weak board_mmc_getwp(struct mmc *mmc)
24{
25 return -1;
26}
27
28int mmc_getwp(struct mmc *mmc)
29{
30 int wp;
31
32 wp = board_mmc_getwp(mmc);
33
d4e1da4e 34 if (wp < 0) {
93bfd616
PA
35 if (mmc->cfg->ops->getwp)
36 wp = mmc->cfg->ops->getwp(mmc);
d4e1da4e
PK
37 else
38 wp = 0;
39 }
d23d8d7e
NK
40
41 return wp;
42}
43
314284b1 44int __board_mmc_getcd(struct mmc *mmc) {
11fdade2
SB
45 return -1;
46}
47
314284b1 48int board_mmc_getcd(struct mmc *mmc)__attribute__((weak,
11fdade2
SB
49 alias("__board_mmc_getcd")));
50
da61fa5f 51int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
272cc70b 52{
5db2fe3a 53 int ret;
8635ff9e 54
8635ff9e 55#ifdef CONFIG_MMC_TRACE
5db2fe3a
RR
56 int i;
57 u8 *ptr;
58
59 printf("CMD_SEND:%d\n", cmd->cmdidx);
60 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
93bfd616 61 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
5db2fe3a
RR
62 switch (cmd->resp_type) {
63 case MMC_RSP_NONE:
64 printf("\t\tMMC_RSP_NONE\n");
65 break;
66 case MMC_RSP_R1:
67 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
68 cmd->response[0]);
69 break;
70 case MMC_RSP_R1b:
71 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
72 cmd->response[0]);
73 break;
74 case MMC_RSP_R2:
75 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
76 cmd->response[0]);
77 printf("\t\t \t\t 0x%08X \n",
78 cmd->response[1]);
79 printf("\t\t \t\t 0x%08X \n",
80 cmd->response[2]);
81 printf("\t\t \t\t 0x%08X \n",
82 cmd->response[3]);
83 printf("\n");
84 printf("\t\t\t\t\tDUMPING DATA\n");
85 for (i = 0; i < 4; i++) {
86 int j;
87 printf("\t\t\t\t\t%03d - ", i*4);
146bec79 88 ptr = (u8 *)&cmd->response[i];
5db2fe3a
RR
89 ptr += 3;
90 for (j = 0; j < 4; j++)
91 printf("%02X ", *ptr--);
92 printf("\n");
93 }
94 break;
95 case MMC_RSP_R3:
96 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
97 cmd->response[0]);
98 break;
99 default:
100 printf("\t\tERROR MMC rsp not supported\n");
101 break;
102 }
5db2fe3a 103#else
93bfd616 104 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
5db2fe3a 105#endif
8635ff9e 106 return ret;
272cc70b
AF
107}
108
da61fa5f 109int mmc_send_status(struct mmc *mmc, int timeout)
5d4fc8d9
RR
110{
111 struct mmc_cmd cmd;
d617c426 112 int err, retries = 5;
5d4fc8d9
RR
113#ifdef CONFIG_MMC_TRACE
114 int status;
115#endif
116
117 cmd.cmdidx = MMC_CMD_SEND_STATUS;
118 cmd.resp_type = MMC_RSP_R1;
aaf3d41a
MV
119 if (!mmc_host_is_spi(mmc))
120 cmd.cmdarg = mmc->rca << 16;
5d4fc8d9
RR
121
122 do {
123 err = mmc_send_cmd(mmc, &cmd, NULL);
d617c426
JK
124 if (!err) {
125 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
126 (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
127 MMC_STATE_PRG)
128 break;
129 else if (cmd.response[0] & MMC_STATUS_MASK) {
56196826 130#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
d617c426
JK
131 printf("Status Error: 0x%08X\n",
132 cmd.response[0]);
56196826 133#endif
d617c426
JK
134 return COMM_ERR;
135 }
136 } else if (--retries < 0)
5d4fc8d9 137 return err;
5d4fc8d9
RR
138
139 udelay(1000);
140
5d4fc8d9
RR
141 } while (timeout--);
142
5db2fe3a
RR
143#ifdef CONFIG_MMC_TRACE
144 status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
145 printf("CURR STATE:%d\n", status);
146#endif
5b0c942f 147 if (timeout <= 0) {
56196826 148#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
5d4fc8d9 149 printf("Timeout waiting card ready\n");
56196826 150#endif
5d4fc8d9
RR
151 return TIMEOUT;
152 }
153
154 return 0;
155}
156
da61fa5f 157int mmc_set_blocklen(struct mmc *mmc, int len)
272cc70b
AF
158{
159 struct mmc_cmd cmd;
160
161 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
162 cmd.resp_type = MMC_RSP_R1;
163 cmd.cmdarg = len;
272cc70b
AF
164
165 return mmc_send_cmd(mmc, &cmd, NULL);
166}
167
168struct mmc *find_mmc_device(int dev_num)
169{
170 struct mmc *m;
171 struct list_head *entry;
172
173 list_for_each(entry, &mmc_devices) {
174 m = list_entry(entry, struct mmc, link);
175
176 if (m->block_dev.dev == dev_num)
177 return m;
178 }
179
56196826 180#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
272cc70b 181 printf("MMC Device %d not found\n", dev_num);
56196826 182#endif
272cc70b
AF
183
184 return NULL;
185}
186
ff8fef56 187static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
fdbb873e 188 lbaint_t blkcnt)
272cc70b
AF
189{
190 struct mmc_cmd cmd;
191 struct mmc_data data;
192
4a1a06bc
AS
193 if (blkcnt > 1)
194 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
195 else
196 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
272cc70b
AF
197
198 if (mmc->high_capacity)
4a1a06bc 199 cmd.cmdarg = start;
272cc70b 200 else
4a1a06bc 201 cmd.cmdarg = start * mmc->read_bl_len;
272cc70b
AF
202
203 cmd.resp_type = MMC_RSP_R1;
272cc70b
AF
204
205 data.dest = dst;
4a1a06bc 206 data.blocks = blkcnt;
272cc70b
AF
207 data.blocksize = mmc->read_bl_len;
208 data.flags = MMC_DATA_READ;
209
4a1a06bc
AS
210 if (mmc_send_cmd(mmc, &cmd, &data))
211 return 0;
272cc70b 212
4a1a06bc
AS
213 if (blkcnt > 1) {
214 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
215 cmd.cmdarg = 0;
216 cmd.resp_type = MMC_RSP_R1b;
4a1a06bc 217 if (mmc_send_cmd(mmc, &cmd, NULL)) {
56196826 218#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
4a1a06bc 219 printf("mmc fail to send stop cmd\n");
56196826 220#endif
4a1a06bc
AS
221 return 0;
222 }
272cc70b
AF
223 }
224
4a1a06bc 225 return blkcnt;
272cc70b
AF
226}
227
ff8fef56 228static ulong mmc_bread(int dev_num, lbaint_t start, lbaint_t blkcnt, void *dst)
272cc70b 229{
4a1a06bc
AS
230 lbaint_t cur, blocks_todo = blkcnt;
231
232 if (blkcnt == 0)
233 return 0;
272cc70b 234
4a1a06bc 235 struct mmc *mmc = find_mmc_device(dev_num);
272cc70b
AF
236 if (!mmc)
237 return 0;
238
d2bf29e3 239 if ((start + blkcnt) > mmc->block_dev.lba) {
56196826 240#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
ff8fef56 241 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
d2bf29e3 242 start + blkcnt, mmc->block_dev.lba);
56196826 243#endif
d2bf29e3
LW
244 return 0;
245 }
272cc70b 246
4a1a06bc 247 if (mmc_set_blocklen(mmc, mmc->read_bl_len))
272cc70b 248 return 0;
272cc70b 249
4a1a06bc 250 do {
93bfd616
PA
251 cur = (blocks_todo > mmc->cfg->b_max) ?
252 mmc->cfg->b_max : blocks_todo;
4a1a06bc
AS
253 if(mmc_read_blocks(mmc, dst, start, cur) != cur)
254 return 0;
255 blocks_todo -= cur;
256 start += cur;
257 dst += cur * mmc->read_bl_len;
258 } while (blocks_todo > 0);
272cc70b
AF
259
260 return blkcnt;
261}
262
fdbb873e 263static int mmc_go_idle(struct mmc *mmc)
272cc70b
AF
264{
265 struct mmc_cmd cmd;
266 int err;
267
268 udelay(1000);
269
270 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
271 cmd.cmdarg = 0;
272 cmd.resp_type = MMC_RSP_NONE;
272cc70b
AF
273
274 err = mmc_send_cmd(mmc, &cmd, NULL);
275
276 if (err)
277 return err;
278
279 udelay(2000);
280
281 return 0;
282}
283
fdbb873e 284static int sd_send_op_cond(struct mmc *mmc)
272cc70b
AF
285{
286 int timeout = 1000;
287 int err;
288 struct mmc_cmd cmd;
289
290 do {
291 cmd.cmdidx = MMC_CMD_APP_CMD;
292 cmd.resp_type = MMC_RSP_R1;
293 cmd.cmdarg = 0;
272cc70b
AF
294
295 err = mmc_send_cmd(mmc, &cmd, NULL);
296
297 if (err)
298 return err;
299
300 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
301 cmd.resp_type = MMC_RSP_R3;
250de12b
SB
302
303 /*
304 * Most cards do not answer if some reserved bits
305 * in the ocr are set. However, Some controller
306 * can set bit 7 (reserved for low voltages), but
307 * how to manage low voltages SD card is not yet
308 * specified.
309 */
d52ebf10 310 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
93bfd616 311 (mmc->cfg->voltages & 0xff8000);
272cc70b
AF
312
313 if (mmc->version == SD_VERSION_2)
314 cmd.cmdarg |= OCR_HCS;
315
316 err = mmc_send_cmd(mmc, &cmd, NULL);
317
318 if (err)
319 return err;
320
321 udelay(1000);
322 } while ((!(cmd.response[0] & OCR_BUSY)) && timeout--);
323
324 if (timeout <= 0)
325 return UNUSABLE_ERR;
326
327 if (mmc->version != SD_VERSION_2)
328 mmc->version = SD_VERSION_1_0;
329
d52ebf10
TC
330 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
331 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
332 cmd.resp_type = MMC_RSP_R3;
333 cmd.cmdarg = 0;
d52ebf10
TC
334
335 err = mmc_send_cmd(mmc, &cmd, NULL);
336
337 if (err)
338 return err;
339 }
340
998be3dd 341 mmc->ocr = cmd.response[0];
272cc70b
AF
342
343 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
344 mmc->rca = 0;
345
346 return 0;
347}
348
e9550449
CLC
349/* We pass in the cmd since otherwise the init seems to fail */
350static int mmc_send_op_cond_iter(struct mmc *mmc, struct mmc_cmd *cmd,
351 int use_arg)
272cc70b 352{
272cc70b
AF
353 int err;
354
e9550449
CLC
355 cmd->cmdidx = MMC_CMD_SEND_OP_COND;
356 cmd->resp_type = MMC_RSP_R3;
357 cmd->cmdarg = 0;
358 if (use_arg && !mmc_host_is_spi(mmc)) {
359 cmd->cmdarg =
93bfd616 360 (mmc->cfg->voltages &
e9550449
CLC
361 (mmc->op_cond_response & OCR_VOLTAGE_MASK)) |
362 (mmc->op_cond_response & OCR_ACCESS_MODE);
363
93bfd616 364 if (mmc->cfg->host_caps & MMC_MODE_HC)
e9550449
CLC
365 cmd->cmdarg |= OCR_HCS;
366 }
367 err = mmc_send_cmd(mmc, cmd, NULL);
368 if (err)
369 return err;
370 mmc->op_cond_response = cmd->response[0];
371 return 0;
372}
373
374int mmc_send_op_cond(struct mmc *mmc)
375{
376 struct mmc_cmd cmd;
377 int err, i;
378
272cc70b
AF
379 /* Some cards seem to need this */
380 mmc_go_idle(mmc);
381
31cacbab 382 /* Asking to the card its capabilities */
e9550449
CLC
383 mmc->op_cond_pending = 1;
384 for (i = 0; i < 2; i++) {
385 err = mmc_send_op_cond_iter(mmc, &cmd, i != 0);
386 if (err)
387 return err;
cd6881b5 388
e9550449
CLC
389 /* exit if not busy (flag seems to be inverted) */
390 if (mmc->op_cond_response & OCR_BUSY)
391 return 0;
392 }
393 return IN_PROGRESS;
394}
cd6881b5 395
e9550449
CLC
396int mmc_complete_op_cond(struct mmc *mmc)
397{
398 struct mmc_cmd cmd;
399 int timeout = 1000;
400 uint start;
401 int err;
cd6881b5 402
e9550449
CLC
403 mmc->op_cond_pending = 0;
404 start = get_timer(0);
272cc70b 405 do {
e9550449 406 err = mmc_send_op_cond_iter(mmc, &cmd, 1);
272cc70b
AF
407 if (err)
408 return err;
e9550449
CLC
409 if (get_timer(start) > timeout)
410 return UNUSABLE_ERR;
411 udelay(100);
412 } while (!(mmc->op_cond_response & OCR_BUSY));
272cc70b 413
d52ebf10
TC
414 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
415 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
416 cmd.resp_type = MMC_RSP_R3;
417 cmd.cmdarg = 0;
d52ebf10
TC
418
419 err = mmc_send_cmd(mmc, &cmd, NULL);
420
421 if (err)
422 return err;
423 }
424
272cc70b 425 mmc->version = MMC_VERSION_UNKNOWN;
998be3dd 426 mmc->ocr = cmd.response[0];
272cc70b
AF
427
428 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
def816a2 429 mmc->rca = 1;
272cc70b
AF
430
431 return 0;
432}
433
434
fdbb873e 435static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
272cc70b
AF
436{
437 struct mmc_cmd cmd;
438 struct mmc_data data;
439 int err;
440
441 /* Get the Card Status Register */
442 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
443 cmd.resp_type = MMC_RSP_R1;
444 cmd.cmdarg = 0;
272cc70b 445
cdfd1ac6 446 data.dest = (char *)ext_csd;
272cc70b 447 data.blocks = 1;
8bfa195e 448 data.blocksize = MMC_MAX_BLOCK_LEN;
272cc70b
AF
449 data.flags = MMC_DATA_READ;
450
451 err = mmc_send_cmd(mmc, &cmd, &data);
452
453 return err;
454}
455
456
fdbb873e 457static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
272cc70b
AF
458{
459 struct mmc_cmd cmd;
5d4fc8d9
RR
460 int timeout = 1000;
461 int ret;
272cc70b
AF
462
463 cmd.cmdidx = MMC_CMD_SWITCH;
464 cmd.resp_type = MMC_RSP_R1b;
465 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
5d4fc8d9
RR
466 (index << 16) |
467 (value << 8);
272cc70b 468
5d4fc8d9
RR
469 ret = mmc_send_cmd(mmc, &cmd, NULL);
470
471 /* Waiting for the ready status */
93ad0d18
JK
472 if (!ret)
473 ret = mmc_send_status(mmc, timeout);
5d4fc8d9
RR
474
475 return ret;
476
272cc70b
AF
477}
478
fdbb873e 479static int mmc_change_freq(struct mmc *mmc)
272cc70b 480{
8bfa195e 481 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
272cc70b
AF
482 char cardtype;
483 int err;
484
485 mmc->card_caps = 0;
486
d52ebf10
TC
487 if (mmc_host_is_spi(mmc))
488 return 0;
489
272cc70b
AF
490 /* Only version 4 supports high-speed */
491 if (mmc->version < MMC_VERSION_4)
492 return 0;
493
272cc70b
AF
494 err = mmc_send_ext_csd(mmc, ext_csd);
495
496 if (err)
497 return err;
498
0560db18 499 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
272cc70b
AF
500
501 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
502
503 if (err)
504 return err;
505
506 /* Now check to see that it worked */
507 err = mmc_send_ext_csd(mmc, ext_csd);
508
509 if (err)
510 return err;
511
512 /* No high-speed support */
0560db18 513 if (!ext_csd[EXT_CSD_HS_TIMING])
272cc70b
AF
514 return 0;
515
516 /* High Speed is set, there are two types: 52MHz and 26MHz */
8caf46d1 517 if (cardtype & EXT_CSD_CARD_TYPE_52)
272cc70b
AF
518 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
519 else
520 mmc->card_caps |= MMC_MODE_HS;
521
522 return 0;
523}
524
f866a46d
SW
525static int mmc_set_capacity(struct mmc *mmc, int part_num)
526{
527 switch (part_num) {
528 case 0:
529 mmc->capacity = mmc->capacity_user;
530 break;
531 case 1:
532 case 2:
533 mmc->capacity = mmc->capacity_boot;
534 break;
535 case 3:
536 mmc->capacity = mmc->capacity_rpmb;
537 break;
538 case 4:
539 case 5:
540 case 6:
541 case 7:
542 mmc->capacity = mmc->capacity_gp[part_num - 4];
543 break;
544 default:
545 return -1;
546 }
547
548 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
549
550 return 0;
551}
552
bc897b1d
LW
553int mmc_switch_part(int dev_num, unsigned int part_num)
554{
555 struct mmc *mmc = find_mmc_device(dev_num);
f866a46d 556 int ret;
bc897b1d
LW
557
558 if (!mmc)
559 return -1;
560
f866a46d
SW
561 ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
562 (mmc->part_config & ~PART_ACCESS_MASK)
563 | (part_num & PART_ACCESS_MASK));
564 if (ret)
565 return ret;
566
567 return mmc_set_capacity(mmc, part_num);
bc897b1d
LW
568}
569
48972d90
TR
570int mmc_getcd(struct mmc *mmc)
571{
572 int cd;
573
574 cd = board_mmc_getcd(mmc);
575
d4e1da4e 576 if (cd < 0) {
93bfd616
PA
577 if (mmc->cfg->ops->getcd)
578 cd = mmc->cfg->ops->getcd(mmc);
d4e1da4e
PK
579 else
580 cd = 1;
581 }
48972d90
TR
582
583 return cd;
584}
585
fdbb873e 586static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
272cc70b
AF
587{
588 struct mmc_cmd cmd;
589 struct mmc_data data;
590
591 /* Switch the frequency */
592 cmd.cmdidx = SD_CMD_SWITCH_FUNC;
593 cmd.resp_type = MMC_RSP_R1;
594 cmd.cmdarg = (mode << 31) | 0xffffff;
595 cmd.cmdarg &= ~(0xf << (group * 4));
596 cmd.cmdarg |= value << (group * 4);
272cc70b
AF
597
598 data.dest = (char *)resp;
599 data.blocksize = 64;
600 data.blocks = 1;
601 data.flags = MMC_DATA_READ;
602
603 return mmc_send_cmd(mmc, &cmd, &data);
604}
605
606
fdbb873e 607static int sd_change_freq(struct mmc *mmc)
272cc70b
AF
608{
609 int err;
610 struct mmc_cmd cmd;
f781dd38
A
611 ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
612 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
272cc70b
AF
613 struct mmc_data data;
614 int timeout;
615
616 mmc->card_caps = 0;
617
d52ebf10
TC
618 if (mmc_host_is_spi(mmc))
619 return 0;
620
272cc70b
AF
621 /* Read the SCR to find out if this card supports higher speeds */
622 cmd.cmdidx = MMC_CMD_APP_CMD;
623 cmd.resp_type = MMC_RSP_R1;
624 cmd.cmdarg = mmc->rca << 16;
272cc70b
AF
625
626 err = mmc_send_cmd(mmc, &cmd, NULL);
627
628 if (err)
629 return err;
630
631 cmd.cmdidx = SD_CMD_APP_SEND_SCR;
632 cmd.resp_type = MMC_RSP_R1;
633 cmd.cmdarg = 0;
272cc70b
AF
634
635 timeout = 3;
636
637retry_scr:
f781dd38 638 data.dest = (char *)scr;
272cc70b
AF
639 data.blocksize = 8;
640 data.blocks = 1;
641 data.flags = MMC_DATA_READ;
642
643 err = mmc_send_cmd(mmc, &cmd, &data);
644
645 if (err) {
646 if (timeout--)
647 goto retry_scr;
648
649 return err;
650 }
651
4e3d89ba
YK
652 mmc->scr[0] = __be32_to_cpu(scr[0]);
653 mmc->scr[1] = __be32_to_cpu(scr[1]);
272cc70b
AF
654
655 switch ((mmc->scr[0] >> 24) & 0xf) {
656 case 0:
657 mmc->version = SD_VERSION_1_0;
658 break;
659 case 1:
660 mmc->version = SD_VERSION_1_10;
661 break;
662 case 2:
663 mmc->version = SD_VERSION_2;
1741c64d
JC
664 if ((mmc->scr[0] >> 15) & 0x1)
665 mmc->version = SD_VERSION_3;
272cc70b
AF
666 break;
667 default:
668 mmc->version = SD_VERSION_1_0;
669 break;
670 }
671
b44c7083
AS
672 if (mmc->scr[0] & SD_DATA_4BIT)
673 mmc->card_caps |= MMC_MODE_4BIT;
674
272cc70b
AF
675 /* Version 1.0 doesn't support switching */
676 if (mmc->version == SD_VERSION_1_0)
677 return 0;
678
679 timeout = 4;
680 while (timeout--) {
681 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
f781dd38 682 (u8 *)switch_status);
272cc70b
AF
683
684 if (err)
685 return err;
686
687 /* The high-speed function is busy. Try again */
4e3d89ba 688 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
272cc70b
AF
689 break;
690 }
691
272cc70b 692 /* If high-speed isn't supported, we return */
4e3d89ba 693 if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
272cc70b
AF
694 return 0;
695
2c3fbf4c
ML
696 /*
697 * If the host doesn't support SD_HIGHSPEED, do not switch card to
698 * HIGHSPEED mode even if the card support SD_HIGHSPPED.
699 * This can avoid furthur problem when the card runs in different
700 * mode between the host.
701 */
93bfd616
PA
702 if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) &&
703 (mmc->cfg->host_caps & MMC_MODE_HS)))
2c3fbf4c
ML
704 return 0;
705
f781dd38 706 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
272cc70b
AF
707
708 if (err)
709 return err;
710
4e3d89ba 711 if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
272cc70b
AF
712 mmc->card_caps |= MMC_MODE_HS;
713
714 return 0;
715}
716
717/* frequency bases */
718/* divided by 10 to be nice to platforms without floating point */
5f837c2c 719static const int fbase[] = {
272cc70b
AF
720 10000,
721 100000,
722 1000000,
723 10000000,
724};
725
726/* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
727 * to platforms without floating point.
728 */
5f837c2c 729static const int multipliers[] = {
272cc70b
AF
730 0, /* reserved */
731 10,
732 12,
733 13,
734 15,
735 20,
736 25,
737 30,
738 35,
739 40,
740 45,
741 50,
742 55,
743 60,
744 70,
745 80,
746};
747
fdbb873e 748static void mmc_set_ios(struct mmc *mmc)
272cc70b 749{
93bfd616
PA
750 if (mmc->cfg->ops->set_ios)
751 mmc->cfg->ops->set_ios(mmc);
272cc70b
AF
752}
753
754void mmc_set_clock(struct mmc *mmc, uint clock)
755{
93bfd616
PA
756 if (clock > mmc->cfg->f_max)
757 clock = mmc->cfg->f_max;
272cc70b 758
93bfd616
PA
759 if (clock < mmc->cfg->f_min)
760 clock = mmc->cfg->f_min;
272cc70b
AF
761
762 mmc->clock = clock;
763
764 mmc_set_ios(mmc);
765}
766
fdbb873e 767static void mmc_set_bus_width(struct mmc *mmc, uint width)
272cc70b
AF
768{
769 mmc->bus_width = width;
770
771 mmc_set_ios(mmc);
772}
773
fdbb873e 774static int mmc_startup(struct mmc *mmc)
272cc70b 775{
f866a46d 776 int err, i;
272cc70b 777 uint mult, freq;
639b7827 778 u64 cmult, csize, capacity;
272cc70b 779 struct mmc_cmd cmd;
8bfa195e
SG
780 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
781 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
5d4fc8d9 782 int timeout = 1000;
272cc70b 783
d52ebf10
TC
784#ifdef CONFIG_MMC_SPI_CRC_ON
785 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
786 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
787 cmd.resp_type = MMC_RSP_R1;
788 cmd.cmdarg = 1;
d52ebf10
TC
789 err = mmc_send_cmd(mmc, &cmd, NULL);
790
791 if (err)
792 return err;
793 }
794#endif
795
272cc70b 796 /* Put the Card in Identify Mode */
d52ebf10
TC
797 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
798 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
272cc70b
AF
799 cmd.resp_type = MMC_RSP_R2;
800 cmd.cmdarg = 0;
272cc70b
AF
801
802 err = mmc_send_cmd(mmc, &cmd, NULL);
803
804 if (err)
805 return err;
806
807 memcpy(mmc->cid, cmd.response, 16);
808
809 /*
810 * For MMC cards, set the Relative Address.
811 * For SD cards, get the Relatvie Address.
812 * This also puts the cards into Standby State
813 */
d52ebf10
TC
814 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
815 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
816 cmd.cmdarg = mmc->rca << 16;
817 cmd.resp_type = MMC_RSP_R6;
272cc70b 818
d52ebf10 819 err = mmc_send_cmd(mmc, &cmd, NULL);
272cc70b 820
d52ebf10
TC
821 if (err)
822 return err;
272cc70b 823
d52ebf10
TC
824 if (IS_SD(mmc))
825 mmc->rca = (cmd.response[0] >> 16) & 0xffff;
826 }
272cc70b
AF
827
828 /* Get the Card-Specific Data */
829 cmd.cmdidx = MMC_CMD_SEND_CSD;
830 cmd.resp_type = MMC_RSP_R2;
831 cmd.cmdarg = mmc->rca << 16;
272cc70b
AF
832
833 err = mmc_send_cmd(mmc, &cmd, NULL);
834
5d4fc8d9
RR
835 /* Waiting for the ready status */
836 mmc_send_status(mmc, timeout);
837
272cc70b
AF
838 if (err)
839 return err;
840
998be3dd
RV
841 mmc->csd[0] = cmd.response[0];
842 mmc->csd[1] = cmd.response[1];
843 mmc->csd[2] = cmd.response[2];
844 mmc->csd[3] = cmd.response[3];
272cc70b
AF
845
846 if (mmc->version == MMC_VERSION_UNKNOWN) {
0b453ffe 847 int version = (cmd.response[0] >> 26) & 0xf;
272cc70b
AF
848
849 switch (version) {
850 case 0:
851 mmc->version = MMC_VERSION_1_2;
852 break;
853 case 1:
854 mmc->version = MMC_VERSION_1_4;
855 break;
856 case 2:
857 mmc->version = MMC_VERSION_2_2;
858 break;
859 case 3:
860 mmc->version = MMC_VERSION_3;
861 break;
862 case 4:
863 mmc->version = MMC_VERSION_4;
864 break;
865 default:
866 mmc->version = MMC_VERSION_1_2;
867 break;
868 }
869 }
870
871 /* divide frequency by 10, since the mults are 10x bigger */
0b453ffe
RV
872 freq = fbase[(cmd.response[0] & 0x7)];
873 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
272cc70b
AF
874
875 mmc->tran_speed = freq * mult;
876
ab71188c 877 mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
998be3dd 878 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
272cc70b
AF
879
880 if (IS_SD(mmc))
881 mmc->write_bl_len = mmc->read_bl_len;
882 else
998be3dd 883 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
272cc70b
AF
884
885 if (mmc->high_capacity) {
886 csize = (mmc->csd[1] & 0x3f) << 16
887 | (mmc->csd[2] & 0xffff0000) >> 16;
888 cmult = 8;
889 } else {
890 csize = (mmc->csd[1] & 0x3ff) << 2
891 | (mmc->csd[2] & 0xc0000000) >> 30;
892 cmult = (mmc->csd[2] & 0x00038000) >> 15;
893 }
894
f866a46d
SW
895 mmc->capacity_user = (csize + 1) << (cmult + 2);
896 mmc->capacity_user *= mmc->read_bl_len;
897 mmc->capacity_boot = 0;
898 mmc->capacity_rpmb = 0;
899 for (i = 0; i < 4; i++)
900 mmc->capacity_gp[i] = 0;
272cc70b 901
8bfa195e
SG
902 if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
903 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
272cc70b 904
8bfa195e
SG
905 if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
906 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
272cc70b 907
ab71188c
MN
908 if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
909 cmd.cmdidx = MMC_CMD_SET_DSR;
910 cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
911 cmd.resp_type = MMC_RSP_NONE;
912 if (mmc_send_cmd(mmc, &cmd, NULL))
913 printf("MMC: SET_DSR failed\n");
914 }
915
272cc70b 916 /* Select the card, and put it into Transfer Mode */
d52ebf10
TC
917 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
918 cmd.cmdidx = MMC_CMD_SELECT_CARD;
fe8f7066 919 cmd.resp_type = MMC_RSP_R1;
d52ebf10 920 cmd.cmdarg = mmc->rca << 16;
d52ebf10 921 err = mmc_send_cmd(mmc, &cmd, NULL);
272cc70b 922
d52ebf10
TC
923 if (err)
924 return err;
925 }
272cc70b 926
e6f99a56
LW
927 /*
928 * For SD, its erase group is always one sector
929 */
930 mmc->erase_grp_size = 1;
bc897b1d 931 mmc->part_config = MMCPART_NOAVAILABLE;
d23e2c09
SG
932 if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
933 /* check ext_csd version and capacity */
934 err = mmc_send_ext_csd(mmc, ext_csd);
fdbb873e 935 if (!err && (ext_csd[EXT_CSD_REV] >= 2)) {
639b7827
YS
936 /*
937 * According to the JEDEC Standard, the value of
938 * ext_csd's capacity is valid if the value is more
939 * than 2GB
940 */
0560db18
LW
941 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
942 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
943 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
944 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
8bfa195e 945 capacity *= MMC_MAX_BLOCK_LEN;
b1f1e821 946 if ((capacity >> 20) > 2 * 1024)
f866a46d 947 mmc->capacity_user = capacity;
d23e2c09 948 }
bc897b1d 949
64f4a619
JC
950 switch (ext_csd[EXT_CSD_REV]) {
951 case 1:
952 mmc->version = MMC_VERSION_4_1;
953 break;
954 case 2:
955 mmc->version = MMC_VERSION_4_2;
956 break;
957 case 3:
958 mmc->version = MMC_VERSION_4_3;
959 break;
960 case 5:
961 mmc->version = MMC_VERSION_4_41;
962 break;
963 case 6:
964 mmc->version = MMC_VERSION_4_5;
965 break;
966 }
967
e6f99a56 968 /*
1937e5aa
OM
969 * Host needs to enable ERASE_GRP_DEF bit if device is
970 * partitioned. This bit will be lost every time after a reset
971 * or power off. This will affect erase size.
e6f99a56 972 */
1937e5aa
OM
973 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
974 (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB)) {
975 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
976 EXT_CSD_ERASE_GROUP_DEF, 1);
977
978 if (err)
979 return err;
980
981 /* Read out group size from ext_csd */
0560db18 982 mmc->erase_grp_size =
8bfa195e
SG
983 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] *
984 MMC_MAX_BLOCK_LEN * 1024;
985 } else {
1937e5aa 986 /* Calculate the group size from the csd value. */
e6f99a56
LW
987 int erase_gsz, erase_gmul;
988 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
989 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
990 mmc->erase_grp_size = (erase_gsz + 1)
991 * (erase_gmul + 1);
992 }
993
bc897b1d 994 /* store the partition info of emmc */
8948ea83
SW
995 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
996 ext_csd[EXT_CSD_BOOT_MULT])
0560db18 997 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
f866a46d
SW
998
999 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
1000
1001 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
1002
1003 for (i = 0; i < 4; i++) {
1004 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
1005 mmc->capacity_gp[i] = (ext_csd[idx + 2] << 16) +
1006 (ext_csd[idx + 1] << 8) + ext_csd[idx];
1007 mmc->capacity_gp[i] *=
1008 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1009 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1010 }
d23e2c09
SG
1011 }
1012
f866a46d
SW
1013 err = mmc_set_capacity(mmc, mmc->part_num);
1014 if (err)
1015 return err;
1016
272cc70b
AF
1017 if (IS_SD(mmc))
1018 err = sd_change_freq(mmc);
1019 else
1020 err = mmc_change_freq(mmc);
1021
1022 if (err)
1023 return err;
1024
1025 /* Restrict card's capabilities by what the host can do */
93bfd616 1026 mmc->card_caps &= mmc->cfg->host_caps;
272cc70b
AF
1027
1028 if (IS_SD(mmc)) {
1029 if (mmc->card_caps & MMC_MODE_4BIT) {
1030 cmd.cmdidx = MMC_CMD_APP_CMD;
1031 cmd.resp_type = MMC_RSP_R1;
1032 cmd.cmdarg = mmc->rca << 16;
272cc70b
AF
1033
1034 err = mmc_send_cmd(mmc, &cmd, NULL);
1035 if (err)
1036 return err;
1037
1038 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1039 cmd.resp_type = MMC_RSP_R1;
1040 cmd.cmdarg = 2;
272cc70b
AF
1041 err = mmc_send_cmd(mmc, &cmd, NULL);
1042 if (err)
1043 return err;
1044
1045 mmc_set_bus_width(mmc, 4);
1046 }
1047
1048 if (mmc->card_caps & MMC_MODE_HS)
ad5fd922 1049 mmc->tran_speed = 50000000;
272cc70b 1050 else
ad5fd922 1051 mmc->tran_speed = 25000000;
272cc70b 1052 } else {
7798f6db
AF
1053 int idx;
1054
1055 /* An array of possible bus widths in order of preference */
1056 static unsigned ext_csd_bits[] = {
1057 EXT_CSD_BUS_WIDTH_8,
1058 EXT_CSD_BUS_WIDTH_4,
1059 EXT_CSD_BUS_WIDTH_1,
1060 };
1061
1062 /* An array to map CSD bus widths to host cap bits */
1063 static unsigned ext_to_hostcaps[] = {
1064 [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
1065 [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
1066 };
1067
1068 /* An array to map chosen bus width to an integer */
1069 static unsigned widths[] = {
1070 8, 4, 1,
1071 };
1072
1073 for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
1074 unsigned int extw = ext_csd_bits[idx];
1075
1076 /*
1077 * Check to make sure the controller supports
1078 * this bus width, if it's more than 1
1079 */
1080 if (extw != EXT_CSD_BUS_WIDTH_1 &&
93bfd616 1081 !(mmc->cfg->host_caps & ext_to_hostcaps[extw]))
7798f6db
AF
1082 continue;
1083
272cc70b 1084 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
7798f6db 1085 EXT_CSD_BUS_WIDTH, extw);
272cc70b
AF
1086
1087 if (err)
4137894e 1088 continue;
272cc70b 1089
7798f6db 1090 mmc_set_bus_width(mmc, widths[idx]);
4137894e
LW
1091
1092 err = mmc_send_ext_csd(mmc, test_csd);
1093 if (!err && ext_csd[EXT_CSD_PARTITIONING_SUPPORT] \
1094 == test_csd[EXT_CSD_PARTITIONING_SUPPORT]
1095 && ext_csd[EXT_CSD_ERASE_GROUP_DEF] \
1096 == test_csd[EXT_CSD_ERASE_GROUP_DEF] \
1097 && ext_csd[EXT_CSD_REV] \
1098 == test_csd[EXT_CSD_REV]
1099 && ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] \
1100 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1101 && memcmp(&ext_csd[EXT_CSD_SEC_CNT], \
1102 &test_csd[EXT_CSD_SEC_CNT], 4) == 0) {
1103
7798f6db 1104 mmc->card_caps |= ext_to_hostcaps[extw];
4137894e
LW
1105 break;
1106 }
272cc70b
AF
1107 }
1108
1109 if (mmc->card_caps & MMC_MODE_HS) {
1110 if (mmc->card_caps & MMC_MODE_HS_52MHz)
ad5fd922 1111 mmc->tran_speed = 52000000;
272cc70b 1112 else
ad5fd922
JC
1113 mmc->tran_speed = 26000000;
1114 }
272cc70b
AF
1115 }
1116
ad5fd922
JC
1117 mmc_set_clock(mmc, mmc->tran_speed);
1118
272cc70b
AF
1119 /* fill in device description */
1120 mmc->block_dev.lun = 0;
1121 mmc->block_dev.type = 0;
1122 mmc->block_dev.blksz = mmc->read_bl_len;
0472fbfd 1123 mmc->block_dev.log2blksz = LOG2(mmc->block_dev.blksz);
9b1f942c 1124 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
56196826 1125#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
babce5f6
TH
1126 sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x",
1127 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
1128 (mmc->cid[3] >> 16) & 0xffff);
1129 sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
1130 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1131 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
1132 (mmc->cid[2] >> 24) & 0xff);
1133 sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
1134 (mmc->cid[2] >> 16) & 0xf);
56196826
PB
1135#else
1136 mmc->block_dev.vendor[0] = 0;
1137 mmc->block_dev.product[0] = 0;
1138 mmc->block_dev.revision[0] = 0;
1139#endif
122efd43 1140#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
272cc70b 1141 init_part(&mmc->block_dev);
122efd43 1142#endif
272cc70b
AF
1143
1144 return 0;
1145}
1146
fdbb873e 1147static int mmc_send_if_cond(struct mmc *mmc)
272cc70b
AF
1148{
1149 struct mmc_cmd cmd;
1150 int err;
1151
1152 cmd.cmdidx = SD_CMD_SEND_IF_COND;
1153 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
93bfd616 1154 cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
272cc70b 1155 cmd.resp_type = MMC_RSP_R7;
272cc70b
AF
1156
1157 err = mmc_send_cmd(mmc, &cmd, NULL);
1158
1159 if (err)
1160 return err;
1161
998be3dd 1162 if ((cmd.response[0] & 0xff) != 0xaa)
272cc70b
AF
1163 return UNUSABLE_ERR;
1164 else
1165 mmc->version = SD_VERSION_2;
1166
1167 return 0;
1168}
1169
93bfd616
PA
1170/* not used any more */
1171int __deprecated mmc_register(struct mmc *mmc)
1172{
1173#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1174 printf("%s is deprecated! use mmc_create() instead.\n", __func__);
1175#endif
1176 return -1;
1177}
1178
1179struct mmc *mmc_create(const struct mmc_config *cfg, void *priv)
272cc70b 1180{
93bfd616
PA
1181 struct mmc *mmc;
1182
1183 /* quick validation */
1184 if (cfg == NULL || cfg->ops == NULL || cfg->ops->send_cmd == NULL ||
1185 cfg->f_min == 0 || cfg->f_max == 0 || cfg->b_max == 0)
1186 return NULL;
1187
1188 mmc = calloc(1, sizeof(*mmc));
1189 if (mmc == NULL)
1190 return NULL;
1191
1192 mmc->cfg = cfg;
1193 mmc->priv = priv;
1194
1195 /* the following chunk was mmc_register() */
1196
ab71188c
MN
1197 /* Setup dsr related values */
1198 mmc->dsr_imp = 0;
1199 mmc->dsr = 0xffffffff;
272cc70b
AF
1200 /* Setup the universal parts of the block interface just once */
1201 mmc->block_dev.if_type = IF_TYPE_MMC;
1202 mmc->block_dev.dev = cur_dev_num++;
1203 mmc->block_dev.removable = 1;
1204 mmc->block_dev.block_read = mmc_bread;
1205 mmc->block_dev.block_write = mmc_bwrite;
e6f99a56 1206 mmc->block_dev.block_erase = mmc_berase;
272cc70b 1207
93bfd616
PA
1208 /* setup initial part type */
1209 mmc->block_dev.part_type = mmc->cfg->part_type;
272cc70b 1210
93bfd616 1211 INIT_LIST_HEAD(&mmc->link);
272cc70b 1212
93bfd616
PA
1213 list_add_tail(&mmc->link, &mmc_devices);
1214
1215 return mmc;
1216}
1217
1218void mmc_destroy(struct mmc *mmc)
1219{
1220 /* only freeing memory for now */
1221 free(mmc);
272cc70b
AF
1222}
1223
df3fc526 1224#ifdef CONFIG_PARTITIONS
272cc70b
AF
1225block_dev_desc_t *mmc_get_dev(int dev)
1226{
1227 struct mmc *mmc = find_mmc_device(dev);
6bb4b4bc 1228 if (!mmc || mmc_init(mmc))
40242bc3 1229 return NULL;
272cc70b 1230
40242bc3 1231 return &mmc->block_dev;
272cc70b 1232}
df3fc526 1233#endif
272cc70b 1234
e9550449 1235int mmc_start_init(struct mmc *mmc)
272cc70b 1236{
afd5932b 1237 int err;
272cc70b 1238
ab769f22 1239 /* we pretend there's no card when init is NULL */
93bfd616 1240 if (mmc_getcd(mmc) == 0 || mmc->cfg->ops->init == NULL) {
48972d90 1241 mmc->has_init = 0;
56196826 1242#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
48972d90 1243 printf("MMC: no card present\n");
56196826 1244#endif
48972d90
TR
1245 return NO_CARD_ERR;
1246 }
1247
bc897b1d
LW
1248 if (mmc->has_init)
1249 return 0;
1250
ab769f22 1251 /* made sure it's not NULL earlier */
93bfd616 1252 err = mmc->cfg->ops->init(mmc);
272cc70b
AF
1253
1254 if (err)
1255 return err;
1256
b86b85e2
IY
1257 mmc_set_bus_width(mmc, 1);
1258 mmc_set_clock(mmc, 1);
1259
272cc70b
AF
1260 /* Reset the Card */
1261 err = mmc_go_idle(mmc);
1262
1263 if (err)
1264 return err;
1265
bc897b1d
LW
1266 /* The internal partition reset to user partition(0) at every CMD0*/
1267 mmc->part_num = 0;
1268
272cc70b 1269 /* Test for SD version 2 */
afd5932b 1270 err = mmc_send_if_cond(mmc);
272cc70b 1271
272cc70b
AF
1272 /* Now try to get the SD card's operating condition */
1273 err = sd_send_op_cond(mmc);
1274
1275 /* If the command timed out, we check for an MMC card */
1276 if (err == TIMEOUT) {
1277 err = mmc_send_op_cond(mmc);
1278
e9550449 1279 if (err && err != IN_PROGRESS) {
56196826 1280#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
272cc70b 1281 printf("Card did not respond to voltage select!\n");
56196826 1282#endif
272cc70b
AF
1283 return UNUSABLE_ERR;
1284 }
1285 }
1286
e9550449
CLC
1287 if (err == IN_PROGRESS)
1288 mmc->init_in_progress = 1;
1289
1290 return err;
1291}
1292
1293static int mmc_complete_init(struct mmc *mmc)
1294{
1295 int err = 0;
1296
1297 if (mmc->op_cond_pending)
1298 err = mmc_complete_op_cond(mmc);
1299
1300 if (!err)
1301 err = mmc_startup(mmc);
bc897b1d
LW
1302 if (err)
1303 mmc->has_init = 0;
1304 else
1305 mmc->has_init = 1;
e9550449
CLC
1306 mmc->init_in_progress = 0;
1307 return err;
1308}
1309
1310int mmc_init(struct mmc *mmc)
1311{
1312 int err = IN_PROGRESS;
1313 unsigned start = get_timer(0);
1314
1315 if (mmc->has_init)
1316 return 0;
1317 if (!mmc->init_in_progress)
1318 err = mmc_start_init(mmc);
1319
1320 if (!err || err == IN_PROGRESS)
1321 err = mmc_complete_init(mmc);
1322 debug("%s: %d, time %lu\n", __func__, err, get_timer(start));
bc897b1d 1323 return err;
272cc70b
AF
1324}
1325
ab71188c
MN
1326int mmc_set_dsr(struct mmc *mmc, u16 val)
1327{
1328 mmc->dsr = val;
1329 return 0;
1330}
1331
272cc70b
AF
1332/*
1333 * CPU and board-specific MMC initializations. Aliased function
1334 * signals caller to move on
1335 */
1336static int __def_mmc_init(bd_t *bis)
1337{
1338 return -1;
1339}
1340
f9a109b3
PT
1341int cpu_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init")));
1342int board_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init")));
272cc70b 1343
56196826
PB
1344#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1345
272cc70b
AF
1346void print_mmc_devices(char separator)
1347{
1348 struct mmc *m;
1349 struct list_head *entry;
1350
1351 list_for_each(entry, &mmc_devices) {
1352 m = list_entry(entry, struct mmc, link);
1353
93bfd616 1354 printf("%s: %d", m->cfg->name, m->block_dev.dev);
272cc70b
AF
1355
1356 if (entry->next != &mmc_devices)
1357 printf("%c ", separator);
1358 }
1359
1360 printf("\n");
1361}
1362
56196826
PB
1363#else
1364void print_mmc_devices(char separator) { }
1365#endif
1366
ea6ebe21
LW
1367int get_mmc_num(void)
1368{
1369 return cur_dev_num;
1370}
1371
e9550449
CLC
1372void mmc_set_preinit(struct mmc *mmc, int preinit)
1373{
1374 mmc->preinit = preinit;
1375}
1376
1377static void do_preinit(void)
1378{
1379 struct mmc *m;
1380 struct list_head *entry;
1381
1382 list_for_each(entry, &mmc_devices) {
1383 m = list_entry(entry, struct mmc, link);
1384
1385 if (m->preinit)
1386 mmc_start_init(m);
1387 }
1388}
1389
1390
272cc70b
AF
1391int mmc_initialize(bd_t *bis)
1392{
1393 INIT_LIST_HEAD (&mmc_devices);
1394 cur_dev_num = 0;
1395
1396 if (board_mmc_init(bis) < 0)
1397 cpu_mmc_init(bis);
1398
bb0dc108 1399#ifndef CONFIG_SPL_BUILD
272cc70b 1400 print_mmc_devices(',');
bb0dc108 1401#endif
272cc70b 1402
e9550449 1403 do_preinit();
272cc70b
AF
1404 return 0;
1405}
3690d6d6
A
1406
1407#ifdef CONFIG_SUPPORT_EMMC_BOOT
1408/*
1409 * This function changes the size of boot partition and the size of rpmb
1410 * partition present on EMMC devices.
1411 *
1412 * Input Parameters:
1413 * struct *mmc: pointer for the mmc device strcuture
1414 * bootsize: size of boot partition
1415 * rpmbsize: size of rpmb partition
1416 *
1417 * Returns 0 on success.
1418 */
1419
1420int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
1421 unsigned long rpmbsize)
1422{
1423 int err;
1424 struct mmc_cmd cmd;
1425
1426 /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */
1427 cmd.cmdidx = MMC_CMD_RES_MAN;
1428 cmd.resp_type = MMC_RSP_R1b;
1429 cmd.cmdarg = MMC_CMD62_ARG1;
1430
1431 err = mmc_send_cmd(mmc, &cmd, NULL);
1432 if (err) {
1433 debug("mmc_boot_partition_size_change: Error1 = %d\n", err);
1434 return err;
1435 }
1436
1437 /* Boot partition changing mode */
1438 cmd.cmdidx = MMC_CMD_RES_MAN;
1439 cmd.resp_type = MMC_RSP_R1b;
1440 cmd.cmdarg = MMC_CMD62_ARG2;
1441
1442 err = mmc_send_cmd(mmc, &cmd, NULL);
1443 if (err) {
1444 debug("mmc_boot_partition_size_change: Error2 = %d\n", err);
1445 return err;
1446 }
1447 /* boot partition size is multiple of 128KB */
1448 bootsize = (bootsize * 1024) / 128;
1449
1450 /* Arg: boot partition size */
1451 cmd.cmdidx = MMC_CMD_RES_MAN;
1452 cmd.resp_type = MMC_RSP_R1b;
1453 cmd.cmdarg = bootsize;
1454
1455 err = mmc_send_cmd(mmc, &cmd, NULL);
1456 if (err) {
1457 debug("mmc_boot_partition_size_change: Error3 = %d\n", err);
1458 return err;
1459 }
1460 /* RPMB partition size is multiple of 128KB */
1461 rpmbsize = (rpmbsize * 1024) / 128;
1462 /* Arg: RPMB partition size */
1463 cmd.cmdidx = MMC_CMD_RES_MAN;
1464 cmd.resp_type = MMC_RSP_R1b;
1465 cmd.cmdarg = rpmbsize;
1466
1467 err = mmc_send_cmd(mmc, &cmd, NULL);
1468 if (err) {
1469 debug("mmc_boot_partition_size_change: Error4 = %d\n", err);
1470 return err;
1471 }
1472 return 0;
1473}
1474
5a99b9de
TR
1475/*
1476 * Modify EXT_CSD[177] which is BOOT_BUS_WIDTH
1477 * based on the passed in values for BOOT_BUS_WIDTH, RESET_BOOT_BUS_WIDTH
1478 * and BOOT_MODE.
1479 *
1480 * Returns 0 on success.
1481 */
1482int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode)
1483{
1484 int err;
1485
1486 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH,
1487 EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) |
1488 EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) |
1489 EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width));
1490
1491 if (err)
1492 return err;
1493 return 0;
1494}
1495
792970b0
TR
1496/*
1497 * Modify EXT_CSD[179] which is PARTITION_CONFIG (formerly BOOT_CONFIG)
1498 * based on the passed in values for BOOT_ACK, BOOT_PARTITION_ENABLE and
1499 * PARTITION_ACCESS.
1500 *
1501 * Returns 0 on success.
1502 */
1503int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access)
1504{
1505 int err;
1506
1507 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
1508 EXT_CSD_BOOT_ACK(ack) |
1509 EXT_CSD_BOOT_PART_NUM(part_num) |
1510 EXT_CSD_PARTITION_ACCESS(access));
1511
1512 if (err)
1513 return err;
1514 return 0;
1515}
33ace362
TR
1516
1517/*
1518 * Modify EXT_CSD[162] which is RST_n_FUNCTION based on the given value
1519 * for enable. Note that this is a write-once field for non-zero values.
1520 *
1521 * Returns 0 on success.
1522 */
1523int mmc_set_rst_n_function(struct mmc *mmc, u8 enable)
1524{
1525 return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_RST_N_FUNCTION,
1526 enable);
1527}
3690d6d6 1528#endif