]> git.ipfire.org Git - people/ms/u-boot.git/blame - drivers/mmc/mmc.c
mmc: provide a select_hwpart implementation for get_device()
[people/ms/u-boot.git] / drivers / mmc / mmc.c
CommitLineData
272cc70b
AF
1/*
2 * Copyright 2008, Freescale Semiconductor, Inc
3 * Andy Fleming
4 *
5 * Based vaguely on the Linux code
6 *
1a459660 7 * SPDX-License-Identifier: GPL-2.0+
272cc70b
AF
8 */
9
10#include <config.h>
11#include <common.h>
12#include <command.h>
13#include <mmc.h>
14#include <part.h>
15#include <malloc.h>
16#include <linux/list.h>
9b1f942c 17#include <div64.h>
da61fa5f 18#include "mmc_private.h"
272cc70b
AF
19
20static struct list_head mmc_devices;
21static int cur_dev_num = -1;
22
d23d8d7e
NK
23int __weak board_mmc_getwp(struct mmc *mmc)
24{
25 return -1;
26}
27
28int mmc_getwp(struct mmc *mmc)
29{
30 int wp;
31
32 wp = board_mmc_getwp(mmc);
33
d4e1da4e 34 if (wp < 0) {
93bfd616
PA
35 if (mmc->cfg->ops->getwp)
36 wp = mmc->cfg->ops->getwp(mmc);
d4e1da4e
PK
37 else
38 wp = 0;
39 }
d23d8d7e
NK
40
41 return wp;
42}
43
314284b1 44int __board_mmc_getcd(struct mmc *mmc) {
11fdade2
SB
45 return -1;
46}
47
314284b1 48int board_mmc_getcd(struct mmc *mmc)__attribute__((weak,
11fdade2
SB
49 alias("__board_mmc_getcd")));
50
da61fa5f 51int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
272cc70b 52{
5db2fe3a 53 int ret;
8635ff9e 54
8635ff9e 55#ifdef CONFIG_MMC_TRACE
5db2fe3a
RR
56 int i;
57 u8 *ptr;
58
59 printf("CMD_SEND:%d\n", cmd->cmdidx);
60 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
93bfd616 61 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
5db2fe3a
RR
62 switch (cmd->resp_type) {
63 case MMC_RSP_NONE:
64 printf("\t\tMMC_RSP_NONE\n");
65 break;
66 case MMC_RSP_R1:
67 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
68 cmd->response[0]);
69 break;
70 case MMC_RSP_R1b:
71 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
72 cmd->response[0]);
73 break;
74 case MMC_RSP_R2:
75 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
76 cmd->response[0]);
77 printf("\t\t \t\t 0x%08X \n",
78 cmd->response[1]);
79 printf("\t\t \t\t 0x%08X \n",
80 cmd->response[2]);
81 printf("\t\t \t\t 0x%08X \n",
82 cmd->response[3]);
83 printf("\n");
84 printf("\t\t\t\t\tDUMPING DATA\n");
85 for (i = 0; i < 4; i++) {
86 int j;
87 printf("\t\t\t\t\t%03d - ", i*4);
146bec79 88 ptr = (u8 *)&cmd->response[i];
5db2fe3a
RR
89 ptr += 3;
90 for (j = 0; j < 4; j++)
91 printf("%02X ", *ptr--);
92 printf("\n");
93 }
94 break;
95 case MMC_RSP_R3:
96 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
97 cmd->response[0]);
98 break;
99 default:
100 printf("\t\tERROR MMC rsp not supported\n");
101 break;
102 }
5db2fe3a 103#else
93bfd616 104 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
5db2fe3a 105#endif
8635ff9e 106 return ret;
272cc70b
AF
107}
108
da61fa5f 109int mmc_send_status(struct mmc *mmc, int timeout)
5d4fc8d9
RR
110{
111 struct mmc_cmd cmd;
d617c426 112 int err, retries = 5;
5d4fc8d9
RR
113#ifdef CONFIG_MMC_TRACE
114 int status;
115#endif
116
117 cmd.cmdidx = MMC_CMD_SEND_STATUS;
118 cmd.resp_type = MMC_RSP_R1;
aaf3d41a
MV
119 if (!mmc_host_is_spi(mmc))
120 cmd.cmdarg = mmc->rca << 16;
5d4fc8d9
RR
121
122 do {
123 err = mmc_send_cmd(mmc, &cmd, NULL);
d617c426
JK
124 if (!err) {
125 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
126 (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
127 MMC_STATE_PRG)
128 break;
129 else if (cmd.response[0] & MMC_STATUS_MASK) {
56196826 130#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
d617c426
JK
131 printf("Status Error: 0x%08X\n",
132 cmd.response[0]);
56196826 133#endif
d617c426
JK
134 return COMM_ERR;
135 }
136 } else if (--retries < 0)
5d4fc8d9 137 return err;
5d4fc8d9
RR
138
139 udelay(1000);
140
5d4fc8d9
RR
141 } while (timeout--);
142
5db2fe3a
RR
143#ifdef CONFIG_MMC_TRACE
144 status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
145 printf("CURR STATE:%d\n", status);
146#endif
5b0c942f 147 if (timeout <= 0) {
56196826 148#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
5d4fc8d9 149 printf("Timeout waiting card ready\n");
56196826 150#endif
5d4fc8d9
RR
151 return TIMEOUT;
152 }
6b2221b0
AG
153 if (cmd.response[0] & MMC_STATUS_SWITCH_ERROR)
154 return SWITCH_ERR;
5d4fc8d9
RR
155
156 return 0;
157}
158
da61fa5f 159int mmc_set_blocklen(struct mmc *mmc, int len)
272cc70b
AF
160{
161 struct mmc_cmd cmd;
162
163 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
164 cmd.resp_type = MMC_RSP_R1;
165 cmd.cmdarg = len;
272cc70b
AF
166
167 return mmc_send_cmd(mmc, &cmd, NULL);
168}
169
170struct mmc *find_mmc_device(int dev_num)
171{
172 struct mmc *m;
173 struct list_head *entry;
174
175 list_for_each(entry, &mmc_devices) {
176 m = list_entry(entry, struct mmc, link);
177
178 if (m->block_dev.dev == dev_num)
179 return m;
180 }
181
56196826 182#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
272cc70b 183 printf("MMC Device %d not found\n", dev_num);
56196826 184#endif
272cc70b
AF
185
186 return NULL;
187}
188
ff8fef56 189static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
fdbb873e 190 lbaint_t blkcnt)
272cc70b
AF
191{
192 struct mmc_cmd cmd;
193 struct mmc_data data;
194
4a1a06bc
AS
195 if (blkcnt > 1)
196 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
197 else
198 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
272cc70b
AF
199
200 if (mmc->high_capacity)
4a1a06bc 201 cmd.cmdarg = start;
272cc70b 202 else
4a1a06bc 203 cmd.cmdarg = start * mmc->read_bl_len;
272cc70b
AF
204
205 cmd.resp_type = MMC_RSP_R1;
272cc70b
AF
206
207 data.dest = dst;
4a1a06bc 208 data.blocks = blkcnt;
272cc70b
AF
209 data.blocksize = mmc->read_bl_len;
210 data.flags = MMC_DATA_READ;
211
4a1a06bc
AS
212 if (mmc_send_cmd(mmc, &cmd, &data))
213 return 0;
272cc70b 214
4a1a06bc
AS
215 if (blkcnt > 1) {
216 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
217 cmd.cmdarg = 0;
218 cmd.resp_type = MMC_RSP_R1b;
4a1a06bc 219 if (mmc_send_cmd(mmc, &cmd, NULL)) {
56196826 220#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
4a1a06bc 221 printf("mmc fail to send stop cmd\n");
56196826 222#endif
4a1a06bc
AS
223 return 0;
224 }
272cc70b
AF
225 }
226
4a1a06bc 227 return blkcnt;
272cc70b
AF
228}
229
ff8fef56 230static ulong mmc_bread(int dev_num, lbaint_t start, lbaint_t blkcnt, void *dst)
272cc70b 231{
4a1a06bc
AS
232 lbaint_t cur, blocks_todo = blkcnt;
233
234 if (blkcnt == 0)
235 return 0;
272cc70b 236
4a1a06bc 237 struct mmc *mmc = find_mmc_device(dev_num);
272cc70b
AF
238 if (!mmc)
239 return 0;
240
d2bf29e3 241 if ((start + blkcnt) > mmc->block_dev.lba) {
56196826 242#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
ff8fef56 243 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
d2bf29e3 244 start + blkcnt, mmc->block_dev.lba);
56196826 245#endif
d2bf29e3
LW
246 return 0;
247 }
272cc70b 248
4a1a06bc 249 if (mmc_set_blocklen(mmc, mmc->read_bl_len))
272cc70b 250 return 0;
272cc70b 251
4a1a06bc 252 do {
93bfd616
PA
253 cur = (blocks_todo > mmc->cfg->b_max) ?
254 mmc->cfg->b_max : blocks_todo;
4a1a06bc
AS
255 if(mmc_read_blocks(mmc, dst, start, cur) != cur)
256 return 0;
257 blocks_todo -= cur;
258 start += cur;
259 dst += cur * mmc->read_bl_len;
260 } while (blocks_todo > 0);
272cc70b
AF
261
262 return blkcnt;
263}
264
fdbb873e 265static int mmc_go_idle(struct mmc *mmc)
272cc70b
AF
266{
267 struct mmc_cmd cmd;
268 int err;
269
270 udelay(1000);
271
272 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
273 cmd.cmdarg = 0;
274 cmd.resp_type = MMC_RSP_NONE;
272cc70b
AF
275
276 err = mmc_send_cmd(mmc, &cmd, NULL);
277
278 if (err)
279 return err;
280
281 udelay(2000);
282
283 return 0;
284}
285
fdbb873e 286static int sd_send_op_cond(struct mmc *mmc)
272cc70b
AF
287{
288 int timeout = 1000;
289 int err;
290 struct mmc_cmd cmd;
291
292 do {
293 cmd.cmdidx = MMC_CMD_APP_CMD;
294 cmd.resp_type = MMC_RSP_R1;
295 cmd.cmdarg = 0;
272cc70b
AF
296
297 err = mmc_send_cmd(mmc, &cmd, NULL);
298
299 if (err)
300 return err;
301
302 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
303 cmd.resp_type = MMC_RSP_R3;
250de12b
SB
304
305 /*
306 * Most cards do not answer if some reserved bits
307 * in the ocr are set. However, Some controller
308 * can set bit 7 (reserved for low voltages), but
309 * how to manage low voltages SD card is not yet
310 * specified.
311 */
d52ebf10 312 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
93bfd616 313 (mmc->cfg->voltages & 0xff8000);
272cc70b
AF
314
315 if (mmc->version == SD_VERSION_2)
316 cmd.cmdarg |= OCR_HCS;
317
318 err = mmc_send_cmd(mmc, &cmd, NULL);
319
320 if (err)
321 return err;
322
323 udelay(1000);
324 } while ((!(cmd.response[0] & OCR_BUSY)) && timeout--);
325
326 if (timeout <= 0)
327 return UNUSABLE_ERR;
328
329 if (mmc->version != SD_VERSION_2)
330 mmc->version = SD_VERSION_1_0;
331
d52ebf10
TC
332 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
333 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
334 cmd.resp_type = MMC_RSP_R3;
335 cmd.cmdarg = 0;
d52ebf10
TC
336
337 err = mmc_send_cmd(mmc, &cmd, NULL);
338
339 if (err)
340 return err;
341 }
342
998be3dd 343 mmc->ocr = cmd.response[0];
272cc70b
AF
344
345 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
346 mmc->rca = 0;
347
348 return 0;
349}
350
e9550449
CLC
351/* We pass in the cmd since otherwise the init seems to fail */
352static int mmc_send_op_cond_iter(struct mmc *mmc, struct mmc_cmd *cmd,
353 int use_arg)
272cc70b 354{
272cc70b
AF
355 int err;
356
e9550449
CLC
357 cmd->cmdidx = MMC_CMD_SEND_OP_COND;
358 cmd->resp_type = MMC_RSP_R3;
359 cmd->cmdarg = 0;
360 if (use_arg && !mmc_host_is_spi(mmc)) {
361 cmd->cmdarg =
93bfd616 362 (mmc->cfg->voltages &
e9550449
CLC
363 (mmc->op_cond_response & OCR_VOLTAGE_MASK)) |
364 (mmc->op_cond_response & OCR_ACCESS_MODE);
365
93bfd616 366 if (mmc->cfg->host_caps & MMC_MODE_HC)
e9550449
CLC
367 cmd->cmdarg |= OCR_HCS;
368 }
369 err = mmc_send_cmd(mmc, cmd, NULL);
370 if (err)
371 return err;
372 mmc->op_cond_response = cmd->response[0];
373 return 0;
374}
375
376int mmc_send_op_cond(struct mmc *mmc)
377{
378 struct mmc_cmd cmd;
379 int err, i;
380
272cc70b
AF
381 /* Some cards seem to need this */
382 mmc_go_idle(mmc);
383
31cacbab 384 /* Asking to the card its capabilities */
e9550449
CLC
385 mmc->op_cond_pending = 1;
386 for (i = 0; i < 2; i++) {
387 err = mmc_send_op_cond_iter(mmc, &cmd, i != 0);
388 if (err)
389 return err;
cd6881b5 390
e9550449
CLC
391 /* exit if not busy (flag seems to be inverted) */
392 if (mmc->op_cond_response & OCR_BUSY)
393 return 0;
394 }
395 return IN_PROGRESS;
396}
cd6881b5 397
e9550449
CLC
398int mmc_complete_op_cond(struct mmc *mmc)
399{
400 struct mmc_cmd cmd;
401 int timeout = 1000;
402 uint start;
403 int err;
cd6881b5 404
e9550449
CLC
405 mmc->op_cond_pending = 0;
406 start = get_timer(0);
272cc70b 407 do {
e9550449 408 err = mmc_send_op_cond_iter(mmc, &cmd, 1);
272cc70b
AF
409 if (err)
410 return err;
e9550449
CLC
411 if (get_timer(start) > timeout)
412 return UNUSABLE_ERR;
413 udelay(100);
414 } while (!(mmc->op_cond_response & OCR_BUSY));
272cc70b 415
d52ebf10
TC
416 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
417 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
418 cmd.resp_type = MMC_RSP_R3;
419 cmd.cmdarg = 0;
d52ebf10
TC
420
421 err = mmc_send_cmd(mmc, &cmd, NULL);
422
423 if (err)
424 return err;
425 }
426
272cc70b 427 mmc->version = MMC_VERSION_UNKNOWN;
998be3dd 428 mmc->ocr = cmd.response[0];
272cc70b
AF
429
430 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
def816a2 431 mmc->rca = 1;
272cc70b
AF
432
433 return 0;
434}
435
436
fdbb873e 437static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
272cc70b
AF
438{
439 struct mmc_cmd cmd;
440 struct mmc_data data;
441 int err;
442
443 /* Get the Card Status Register */
444 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
445 cmd.resp_type = MMC_RSP_R1;
446 cmd.cmdarg = 0;
272cc70b 447
cdfd1ac6 448 data.dest = (char *)ext_csd;
272cc70b 449 data.blocks = 1;
8bfa195e 450 data.blocksize = MMC_MAX_BLOCK_LEN;
272cc70b
AF
451 data.flags = MMC_DATA_READ;
452
453 err = mmc_send_cmd(mmc, &cmd, &data);
454
455 return err;
456}
457
458
fdbb873e 459static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
272cc70b
AF
460{
461 struct mmc_cmd cmd;
5d4fc8d9
RR
462 int timeout = 1000;
463 int ret;
272cc70b
AF
464
465 cmd.cmdidx = MMC_CMD_SWITCH;
466 cmd.resp_type = MMC_RSP_R1b;
467 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
5d4fc8d9
RR
468 (index << 16) |
469 (value << 8);
272cc70b 470
5d4fc8d9
RR
471 ret = mmc_send_cmd(mmc, &cmd, NULL);
472
473 /* Waiting for the ready status */
93ad0d18
JK
474 if (!ret)
475 ret = mmc_send_status(mmc, timeout);
5d4fc8d9
RR
476
477 return ret;
478
272cc70b
AF
479}
480
fdbb873e 481static int mmc_change_freq(struct mmc *mmc)
272cc70b 482{
8bfa195e 483 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
272cc70b
AF
484 char cardtype;
485 int err;
486
487 mmc->card_caps = 0;
488
d52ebf10
TC
489 if (mmc_host_is_spi(mmc))
490 return 0;
491
272cc70b
AF
492 /* Only version 4 supports high-speed */
493 if (mmc->version < MMC_VERSION_4)
494 return 0;
495
272cc70b
AF
496 err = mmc_send_ext_csd(mmc, ext_csd);
497
498 if (err)
499 return err;
500
0560db18 501 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
272cc70b
AF
502
503 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
504
505 if (err)
6b2221b0 506 return err == SWITCH_ERR ? 0 : err;
272cc70b
AF
507
508 /* Now check to see that it worked */
509 err = mmc_send_ext_csd(mmc, ext_csd);
510
511 if (err)
512 return err;
513
514 /* No high-speed support */
0560db18 515 if (!ext_csd[EXT_CSD_HS_TIMING])
272cc70b
AF
516 return 0;
517
518 /* High Speed is set, there are two types: 52MHz and 26MHz */
519 if (cardtype & MMC_HS_52MHZ)
520 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
521 else
522 mmc->card_caps |= MMC_MODE_HS;
523
524 return 0;
525}
526
f866a46d
SW
527static int mmc_set_capacity(struct mmc *mmc, int part_num)
528{
529 switch (part_num) {
530 case 0:
531 mmc->capacity = mmc->capacity_user;
532 break;
533 case 1:
534 case 2:
535 mmc->capacity = mmc->capacity_boot;
536 break;
537 case 3:
538 mmc->capacity = mmc->capacity_rpmb;
539 break;
540 case 4:
541 case 5:
542 case 6:
543 case 7:
544 mmc->capacity = mmc->capacity_gp[part_num - 4];
545 break;
546 default:
547 return -1;
548 }
549
550 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
551
552 return 0;
553}
554
d2356284
SW
555int mmc_select_hwpart(int dev_num, int hwpart)
556{
557 struct mmc *mmc = find_mmc_device(dev_num);
558 int ret;
559
560 if (!mmc)
561 return -1;
562
563 if (mmc->part_num == hwpart)
564 return 0;
565
566 if (mmc->part_config == MMCPART_NOAVAILABLE) {
567 printf("Card doesn't support part_switch\n");
568 return -1;
569 }
570
571 ret = mmc_switch_part(dev_num, hwpart);
572 if (ret)
573 return -1;
574
575 mmc->part_num = hwpart;
576
577 return 0;
578}
579
580
bc897b1d
LW
581int mmc_switch_part(int dev_num, unsigned int part_num)
582{
583 struct mmc *mmc = find_mmc_device(dev_num);
f866a46d 584 int ret;
bc897b1d
LW
585
586 if (!mmc)
587 return -1;
588
f866a46d
SW
589 ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
590 (mmc->part_config & ~PART_ACCESS_MASK)
591 | (part_num & PART_ACCESS_MASK));
592 if (ret)
593 return ret;
594
595 return mmc_set_capacity(mmc, part_num);
bc897b1d
LW
596}
597
48972d90
TR
598int mmc_getcd(struct mmc *mmc)
599{
600 int cd;
601
602 cd = board_mmc_getcd(mmc);
603
d4e1da4e 604 if (cd < 0) {
93bfd616
PA
605 if (mmc->cfg->ops->getcd)
606 cd = mmc->cfg->ops->getcd(mmc);
d4e1da4e
PK
607 else
608 cd = 1;
609 }
48972d90
TR
610
611 return cd;
612}
613
fdbb873e 614static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
272cc70b
AF
615{
616 struct mmc_cmd cmd;
617 struct mmc_data data;
618
619 /* Switch the frequency */
620 cmd.cmdidx = SD_CMD_SWITCH_FUNC;
621 cmd.resp_type = MMC_RSP_R1;
622 cmd.cmdarg = (mode << 31) | 0xffffff;
623 cmd.cmdarg &= ~(0xf << (group * 4));
624 cmd.cmdarg |= value << (group * 4);
272cc70b
AF
625
626 data.dest = (char *)resp;
627 data.blocksize = 64;
628 data.blocks = 1;
629 data.flags = MMC_DATA_READ;
630
631 return mmc_send_cmd(mmc, &cmd, &data);
632}
633
634
fdbb873e 635static int sd_change_freq(struct mmc *mmc)
272cc70b
AF
636{
637 int err;
638 struct mmc_cmd cmd;
f781dd38
A
639 ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
640 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
272cc70b
AF
641 struct mmc_data data;
642 int timeout;
643
644 mmc->card_caps = 0;
645
d52ebf10
TC
646 if (mmc_host_is_spi(mmc))
647 return 0;
648
272cc70b
AF
649 /* Read the SCR to find out if this card supports higher speeds */
650 cmd.cmdidx = MMC_CMD_APP_CMD;
651 cmd.resp_type = MMC_RSP_R1;
652 cmd.cmdarg = mmc->rca << 16;
272cc70b
AF
653
654 err = mmc_send_cmd(mmc, &cmd, NULL);
655
656 if (err)
657 return err;
658
659 cmd.cmdidx = SD_CMD_APP_SEND_SCR;
660 cmd.resp_type = MMC_RSP_R1;
661 cmd.cmdarg = 0;
272cc70b
AF
662
663 timeout = 3;
664
665retry_scr:
f781dd38 666 data.dest = (char *)scr;
272cc70b
AF
667 data.blocksize = 8;
668 data.blocks = 1;
669 data.flags = MMC_DATA_READ;
670
671 err = mmc_send_cmd(mmc, &cmd, &data);
672
673 if (err) {
674 if (timeout--)
675 goto retry_scr;
676
677 return err;
678 }
679
4e3d89ba
YK
680 mmc->scr[0] = __be32_to_cpu(scr[0]);
681 mmc->scr[1] = __be32_to_cpu(scr[1]);
272cc70b
AF
682
683 switch ((mmc->scr[0] >> 24) & 0xf) {
684 case 0:
685 mmc->version = SD_VERSION_1_0;
686 break;
687 case 1:
688 mmc->version = SD_VERSION_1_10;
689 break;
690 case 2:
691 mmc->version = SD_VERSION_2;
1741c64d
JC
692 if ((mmc->scr[0] >> 15) & 0x1)
693 mmc->version = SD_VERSION_3;
272cc70b
AF
694 break;
695 default:
696 mmc->version = SD_VERSION_1_0;
697 break;
698 }
699
b44c7083
AS
700 if (mmc->scr[0] & SD_DATA_4BIT)
701 mmc->card_caps |= MMC_MODE_4BIT;
702
272cc70b
AF
703 /* Version 1.0 doesn't support switching */
704 if (mmc->version == SD_VERSION_1_0)
705 return 0;
706
707 timeout = 4;
708 while (timeout--) {
709 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
f781dd38 710 (u8 *)switch_status);
272cc70b
AF
711
712 if (err)
713 return err;
714
715 /* The high-speed function is busy. Try again */
4e3d89ba 716 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
272cc70b
AF
717 break;
718 }
719
272cc70b 720 /* If high-speed isn't supported, we return */
4e3d89ba 721 if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
272cc70b
AF
722 return 0;
723
2c3fbf4c
ML
724 /*
725 * If the host doesn't support SD_HIGHSPEED, do not switch card to
726 * HIGHSPEED mode even if the card support SD_HIGHSPPED.
727 * This can avoid furthur problem when the card runs in different
728 * mode between the host.
729 */
93bfd616
PA
730 if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) &&
731 (mmc->cfg->host_caps & MMC_MODE_HS)))
2c3fbf4c
ML
732 return 0;
733
f781dd38 734 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
272cc70b
AF
735
736 if (err)
737 return err;
738
4e3d89ba 739 if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
272cc70b
AF
740 mmc->card_caps |= MMC_MODE_HS;
741
742 return 0;
743}
744
745/* frequency bases */
746/* divided by 10 to be nice to platforms without floating point */
5f837c2c 747static const int fbase[] = {
272cc70b
AF
748 10000,
749 100000,
750 1000000,
751 10000000,
752};
753
754/* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
755 * to platforms without floating point.
756 */
5f837c2c 757static const int multipliers[] = {
272cc70b
AF
758 0, /* reserved */
759 10,
760 12,
761 13,
762 15,
763 20,
764 25,
765 30,
766 35,
767 40,
768 45,
769 50,
770 55,
771 60,
772 70,
773 80,
774};
775
fdbb873e 776static void mmc_set_ios(struct mmc *mmc)
272cc70b 777{
93bfd616
PA
778 if (mmc->cfg->ops->set_ios)
779 mmc->cfg->ops->set_ios(mmc);
272cc70b
AF
780}
781
782void mmc_set_clock(struct mmc *mmc, uint clock)
783{
93bfd616
PA
784 if (clock > mmc->cfg->f_max)
785 clock = mmc->cfg->f_max;
272cc70b 786
93bfd616
PA
787 if (clock < mmc->cfg->f_min)
788 clock = mmc->cfg->f_min;
272cc70b
AF
789
790 mmc->clock = clock;
791
792 mmc_set_ios(mmc);
793}
794
fdbb873e 795static void mmc_set_bus_width(struct mmc *mmc, uint width)
272cc70b
AF
796{
797 mmc->bus_width = width;
798
799 mmc_set_ios(mmc);
800}
801
fdbb873e 802static int mmc_startup(struct mmc *mmc)
272cc70b 803{
f866a46d 804 int err, i;
272cc70b 805 uint mult, freq;
639b7827 806 u64 cmult, csize, capacity;
272cc70b 807 struct mmc_cmd cmd;
8bfa195e
SG
808 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
809 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
5d4fc8d9 810 int timeout = 1000;
272cc70b 811
d52ebf10
TC
812#ifdef CONFIG_MMC_SPI_CRC_ON
813 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
814 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
815 cmd.resp_type = MMC_RSP_R1;
816 cmd.cmdarg = 1;
d52ebf10
TC
817 err = mmc_send_cmd(mmc, &cmd, NULL);
818
819 if (err)
820 return err;
821 }
822#endif
823
272cc70b 824 /* Put the Card in Identify Mode */
d52ebf10
TC
825 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
826 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
272cc70b
AF
827 cmd.resp_type = MMC_RSP_R2;
828 cmd.cmdarg = 0;
272cc70b
AF
829
830 err = mmc_send_cmd(mmc, &cmd, NULL);
831
832 if (err)
833 return err;
834
835 memcpy(mmc->cid, cmd.response, 16);
836
837 /*
838 * For MMC cards, set the Relative Address.
839 * For SD cards, get the Relatvie Address.
840 * This also puts the cards into Standby State
841 */
d52ebf10
TC
842 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
843 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
844 cmd.cmdarg = mmc->rca << 16;
845 cmd.resp_type = MMC_RSP_R6;
272cc70b 846
d52ebf10 847 err = mmc_send_cmd(mmc, &cmd, NULL);
272cc70b 848
d52ebf10
TC
849 if (err)
850 return err;
272cc70b 851
d52ebf10
TC
852 if (IS_SD(mmc))
853 mmc->rca = (cmd.response[0] >> 16) & 0xffff;
854 }
272cc70b
AF
855
856 /* Get the Card-Specific Data */
857 cmd.cmdidx = MMC_CMD_SEND_CSD;
858 cmd.resp_type = MMC_RSP_R2;
859 cmd.cmdarg = mmc->rca << 16;
272cc70b
AF
860
861 err = mmc_send_cmd(mmc, &cmd, NULL);
862
5d4fc8d9
RR
863 /* Waiting for the ready status */
864 mmc_send_status(mmc, timeout);
865
272cc70b
AF
866 if (err)
867 return err;
868
998be3dd
RV
869 mmc->csd[0] = cmd.response[0];
870 mmc->csd[1] = cmd.response[1];
871 mmc->csd[2] = cmd.response[2];
872 mmc->csd[3] = cmd.response[3];
272cc70b
AF
873
874 if (mmc->version == MMC_VERSION_UNKNOWN) {
0b453ffe 875 int version = (cmd.response[0] >> 26) & 0xf;
272cc70b
AF
876
877 switch (version) {
878 case 0:
879 mmc->version = MMC_VERSION_1_2;
880 break;
881 case 1:
882 mmc->version = MMC_VERSION_1_4;
883 break;
884 case 2:
885 mmc->version = MMC_VERSION_2_2;
886 break;
887 case 3:
888 mmc->version = MMC_VERSION_3;
889 break;
890 case 4:
891 mmc->version = MMC_VERSION_4;
892 break;
893 default:
894 mmc->version = MMC_VERSION_1_2;
895 break;
896 }
897 }
898
899 /* divide frequency by 10, since the mults are 10x bigger */
0b453ffe
RV
900 freq = fbase[(cmd.response[0] & 0x7)];
901 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
272cc70b
AF
902
903 mmc->tran_speed = freq * mult;
904
ab71188c 905 mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
998be3dd 906 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
272cc70b
AF
907
908 if (IS_SD(mmc))
909 mmc->write_bl_len = mmc->read_bl_len;
910 else
998be3dd 911 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
272cc70b
AF
912
913 if (mmc->high_capacity) {
914 csize = (mmc->csd[1] & 0x3f) << 16
915 | (mmc->csd[2] & 0xffff0000) >> 16;
916 cmult = 8;
917 } else {
918 csize = (mmc->csd[1] & 0x3ff) << 2
919 | (mmc->csd[2] & 0xc0000000) >> 30;
920 cmult = (mmc->csd[2] & 0x00038000) >> 15;
921 }
922
f866a46d
SW
923 mmc->capacity_user = (csize + 1) << (cmult + 2);
924 mmc->capacity_user *= mmc->read_bl_len;
925 mmc->capacity_boot = 0;
926 mmc->capacity_rpmb = 0;
927 for (i = 0; i < 4; i++)
928 mmc->capacity_gp[i] = 0;
272cc70b 929
8bfa195e
SG
930 if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
931 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
272cc70b 932
8bfa195e
SG
933 if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
934 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
272cc70b 935
ab71188c
MN
936 if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
937 cmd.cmdidx = MMC_CMD_SET_DSR;
938 cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
939 cmd.resp_type = MMC_RSP_NONE;
940 if (mmc_send_cmd(mmc, &cmd, NULL))
941 printf("MMC: SET_DSR failed\n");
942 }
943
272cc70b 944 /* Select the card, and put it into Transfer Mode */
d52ebf10
TC
945 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
946 cmd.cmdidx = MMC_CMD_SELECT_CARD;
fe8f7066 947 cmd.resp_type = MMC_RSP_R1;
d52ebf10 948 cmd.cmdarg = mmc->rca << 16;
d52ebf10 949 err = mmc_send_cmd(mmc, &cmd, NULL);
272cc70b 950
d52ebf10
TC
951 if (err)
952 return err;
953 }
272cc70b 954
e6f99a56
LW
955 /*
956 * For SD, its erase group is always one sector
957 */
958 mmc->erase_grp_size = 1;
bc897b1d 959 mmc->part_config = MMCPART_NOAVAILABLE;
d23e2c09
SG
960 if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
961 /* check ext_csd version and capacity */
962 err = mmc_send_ext_csd(mmc, ext_csd);
fdbb873e 963 if (!err && (ext_csd[EXT_CSD_REV] >= 2)) {
639b7827
YS
964 /*
965 * According to the JEDEC Standard, the value of
966 * ext_csd's capacity is valid if the value is more
967 * than 2GB
968 */
0560db18
LW
969 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
970 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
971 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
972 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
8bfa195e 973 capacity *= MMC_MAX_BLOCK_LEN;
b1f1e821 974 if ((capacity >> 20) > 2 * 1024)
f866a46d 975 mmc->capacity_user = capacity;
d23e2c09 976 }
bc897b1d 977
64f4a619
JC
978 switch (ext_csd[EXT_CSD_REV]) {
979 case 1:
980 mmc->version = MMC_VERSION_4_1;
981 break;
982 case 2:
983 mmc->version = MMC_VERSION_4_2;
984 break;
985 case 3:
986 mmc->version = MMC_VERSION_4_3;
987 break;
988 case 5:
989 mmc->version = MMC_VERSION_4_41;
990 break;
991 case 6:
992 mmc->version = MMC_VERSION_4_5;
993 break;
994 }
995
e6f99a56 996 /*
1937e5aa
OM
997 * Host needs to enable ERASE_GRP_DEF bit if device is
998 * partitioned. This bit will be lost every time after a reset
999 * or power off. This will affect erase size.
e6f99a56 1000 */
1937e5aa
OM
1001 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
1002 (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB)) {
1003 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1004 EXT_CSD_ERASE_GROUP_DEF, 1);
1005
1006 if (err)
1007 return err;
1008
1009 /* Read out group size from ext_csd */
0560db18 1010 mmc->erase_grp_size =
8bfa195e
SG
1011 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] *
1012 MMC_MAX_BLOCK_LEN * 1024;
1013 } else {
1937e5aa 1014 /* Calculate the group size from the csd value. */
e6f99a56
LW
1015 int erase_gsz, erase_gmul;
1016 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
1017 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
1018 mmc->erase_grp_size = (erase_gsz + 1)
1019 * (erase_gmul + 1);
1020 }
1021
bc897b1d 1022 /* store the partition info of emmc */
8948ea83
SW
1023 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
1024 ext_csd[EXT_CSD_BOOT_MULT])
0560db18 1025 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
f866a46d
SW
1026
1027 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
1028
1029 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
1030
1031 for (i = 0; i < 4; i++) {
1032 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
1033 mmc->capacity_gp[i] = (ext_csd[idx + 2] << 16) +
1034 (ext_csd[idx + 1] << 8) + ext_csd[idx];
1035 mmc->capacity_gp[i] *=
1036 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1037 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1038 }
d23e2c09
SG
1039 }
1040
f866a46d
SW
1041 err = mmc_set_capacity(mmc, mmc->part_num);
1042 if (err)
1043 return err;
1044
272cc70b
AF
1045 if (IS_SD(mmc))
1046 err = sd_change_freq(mmc);
1047 else
1048 err = mmc_change_freq(mmc);
1049
1050 if (err)
1051 return err;
1052
1053 /* Restrict card's capabilities by what the host can do */
93bfd616 1054 mmc->card_caps &= mmc->cfg->host_caps;
272cc70b
AF
1055
1056 if (IS_SD(mmc)) {
1057 if (mmc->card_caps & MMC_MODE_4BIT) {
1058 cmd.cmdidx = MMC_CMD_APP_CMD;
1059 cmd.resp_type = MMC_RSP_R1;
1060 cmd.cmdarg = mmc->rca << 16;
272cc70b
AF
1061
1062 err = mmc_send_cmd(mmc, &cmd, NULL);
1063 if (err)
1064 return err;
1065
1066 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1067 cmd.resp_type = MMC_RSP_R1;
1068 cmd.cmdarg = 2;
272cc70b
AF
1069 err = mmc_send_cmd(mmc, &cmd, NULL);
1070 if (err)
1071 return err;
1072
1073 mmc_set_bus_width(mmc, 4);
1074 }
1075
1076 if (mmc->card_caps & MMC_MODE_HS)
ad5fd922 1077 mmc->tran_speed = 50000000;
272cc70b 1078 else
ad5fd922 1079 mmc->tran_speed = 25000000;
272cc70b 1080 } else {
7798f6db
AF
1081 int idx;
1082
1083 /* An array of possible bus widths in order of preference */
1084 static unsigned ext_csd_bits[] = {
1085 EXT_CSD_BUS_WIDTH_8,
1086 EXT_CSD_BUS_WIDTH_4,
1087 EXT_CSD_BUS_WIDTH_1,
1088 };
1089
1090 /* An array to map CSD bus widths to host cap bits */
1091 static unsigned ext_to_hostcaps[] = {
1092 [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
1093 [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
1094 };
1095
1096 /* An array to map chosen bus width to an integer */
1097 static unsigned widths[] = {
1098 8, 4, 1,
1099 };
1100
1101 for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
1102 unsigned int extw = ext_csd_bits[idx];
1103
1104 /*
1105 * Check to make sure the controller supports
1106 * this bus width, if it's more than 1
1107 */
1108 if (extw != EXT_CSD_BUS_WIDTH_1 &&
93bfd616 1109 !(mmc->cfg->host_caps & ext_to_hostcaps[extw]))
7798f6db
AF
1110 continue;
1111
272cc70b 1112 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
7798f6db 1113 EXT_CSD_BUS_WIDTH, extw);
272cc70b
AF
1114
1115 if (err)
4137894e 1116 continue;
272cc70b 1117
7798f6db 1118 mmc_set_bus_width(mmc, widths[idx]);
4137894e
LW
1119
1120 err = mmc_send_ext_csd(mmc, test_csd);
1121 if (!err && ext_csd[EXT_CSD_PARTITIONING_SUPPORT] \
1122 == test_csd[EXT_CSD_PARTITIONING_SUPPORT]
1123 && ext_csd[EXT_CSD_ERASE_GROUP_DEF] \
1124 == test_csd[EXT_CSD_ERASE_GROUP_DEF] \
1125 && ext_csd[EXT_CSD_REV] \
1126 == test_csd[EXT_CSD_REV]
1127 && ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] \
1128 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1129 && memcmp(&ext_csd[EXT_CSD_SEC_CNT], \
1130 &test_csd[EXT_CSD_SEC_CNT], 4) == 0) {
1131
7798f6db 1132 mmc->card_caps |= ext_to_hostcaps[extw];
4137894e
LW
1133 break;
1134 }
272cc70b
AF
1135 }
1136
1137 if (mmc->card_caps & MMC_MODE_HS) {
1138 if (mmc->card_caps & MMC_MODE_HS_52MHz)
ad5fd922 1139 mmc->tran_speed = 52000000;
272cc70b 1140 else
ad5fd922
JC
1141 mmc->tran_speed = 26000000;
1142 }
272cc70b
AF
1143 }
1144
ad5fd922
JC
1145 mmc_set_clock(mmc, mmc->tran_speed);
1146
272cc70b
AF
1147 /* fill in device description */
1148 mmc->block_dev.lun = 0;
1149 mmc->block_dev.type = 0;
1150 mmc->block_dev.blksz = mmc->read_bl_len;
0472fbfd 1151 mmc->block_dev.log2blksz = LOG2(mmc->block_dev.blksz);
9b1f942c 1152 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
56196826 1153#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
babce5f6
TH
1154 sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x",
1155 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
1156 (mmc->cid[3] >> 16) & 0xffff);
1157 sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
1158 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1159 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
1160 (mmc->cid[2] >> 24) & 0xff);
1161 sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
1162 (mmc->cid[2] >> 16) & 0xf);
56196826
PB
1163#else
1164 mmc->block_dev.vendor[0] = 0;
1165 mmc->block_dev.product[0] = 0;
1166 mmc->block_dev.revision[0] = 0;
1167#endif
122efd43 1168#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
272cc70b 1169 init_part(&mmc->block_dev);
122efd43 1170#endif
272cc70b
AF
1171
1172 return 0;
1173}
1174
fdbb873e 1175static int mmc_send_if_cond(struct mmc *mmc)
272cc70b
AF
1176{
1177 struct mmc_cmd cmd;
1178 int err;
1179
1180 cmd.cmdidx = SD_CMD_SEND_IF_COND;
1181 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
93bfd616 1182 cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
272cc70b 1183 cmd.resp_type = MMC_RSP_R7;
272cc70b
AF
1184
1185 err = mmc_send_cmd(mmc, &cmd, NULL);
1186
1187 if (err)
1188 return err;
1189
998be3dd 1190 if ((cmd.response[0] & 0xff) != 0xaa)
272cc70b
AF
1191 return UNUSABLE_ERR;
1192 else
1193 mmc->version = SD_VERSION_2;
1194
1195 return 0;
1196}
1197
93bfd616
PA
1198/* not used any more */
1199int __deprecated mmc_register(struct mmc *mmc)
1200{
1201#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1202 printf("%s is deprecated! use mmc_create() instead.\n", __func__);
1203#endif
1204 return -1;
1205}
1206
1207struct mmc *mmc_create(const struct mmc_config *cfg, void *priv)
272cc70b 1208{
93bfd616
PA
1209 struct mmc *mmc;
1210
1211 /* quick validation */
1212 if (cfg == NULL || cfg->ops == NULL || cfg->ops->send_cmd == NULL ||
1213 cfg->f_min == 0 || cfg->f_max == 0 || cfg->b_max == 0)
1214 return NULL;
1215
1216 mmc = calloc(1, sizeof(*mmc));
1217 if (mmc == NULL)
1218 return NULL;
1219
1220 mmc->cfg = cfg;
1221 mmc->priv = priv;
1222
1223 /* the following chunk was mmc_register() */
1224
ab71188c
MN
1225 /* Setup dsr related values */
1226 mmc->dsr_imp = 0;
1227 mmc->dsr = 0xffffffff;
272cc70b
AF
1228 /* Setup the universal parts of the block interface just once */
1229 mmc->block_dev.if_type = IF_TYPE_MMC;
1230 mmc->block_dev.dev = cur_dev_num++;
1231 mmc->block_dev.removable = 1;
1232 mmc->block_dev.block_read = mmc_bread;
1233 mmc->block_dev.block_write = mmc_bwrite;
e6f99a56 1234 mmc->block_dev.block_erase = mmc_berase;
272cc70b 1235
93bfd616
PA
1236 /* setup initial part type */
1237 mmc->block_dev.part_type = mmc->cfg->part_type;
272cc70b 1238
93bfd616 1239 INIT_LIST_HEAD(&mmc->link);
272cc70b 1240
93bfd616
PA
1241 list_add_tail(&mmc->link, &mmc_devices);
1242
1243 return mmc;
1244}
1245
1246void mmc_destroy(struct mmc *mmc)
1247{
1248 /* only freeing memory for now */
1249 free(mmc);
272cc70b
AF
1250}
1251
df3fc526 1252#ifdef CONFIG_PARTITIONS
272cc70b
AF
1253block_dev_desc_t *mmc_get_dev(int dev)
1254{
1255 struct mmc *mmc = find_mmc_device(dev);
6bb4b4bc 1256 if (!mmc || mmc_init(mmc))
40242bc3 1257 return NULL;
272cc70b 1258
40242bc3 1259 return &mmc->block_dev;
272cc70b 1260}
df3fc526 1261#endif
272cc70b 1262
e9550449 1263int mmc_start_init(struct mmc *mmc)
272cc70b 1264{
afd5932b 1265 int err;
272cc70b 1266
ab769f22 1267 /* we pretend there's no card when init is NULL */
93bfd616 1268 if (mmc_getcd(mmc) == 0 || mmc->cfg->ops->init == NULL) {
48972d90 1269 mmc->has_init = 0;
56196826 1270#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
48972d90 1271 printf("MMC: no card present\n");
56196826 1272#endif
48972d90
TR
1273 return NO_CARD_ERR;
1274 }
1275
bc897b1d
LW
1276 if (mmc->has_init)
1277 return 0;
1278
ab769f22 1279 /* made sure it's not NULL earlier */
93bfd616 1280 err = mmc->cfg->ops->init(mmc);
272cc70b
AF
1281
1282 if (err)
1283 return err;
1284
b86b85e2
IY
1285 mmc_set_bus_width(mmc, 1);
1286 mmc_set_clock(mmc, 1);
1287
272cc70b
AF
1288 /* Reset the Card */
1289 err = mmc_go_idle(mmc);
1290
1291 if (err)
1292 return err;
1293
bc897b1d
LW
1294 /* The internal partition reset to user partition(0) at every CMD0*/
1295 mmc->part_num = 0;
1296
272cc70b 1297 /* Test for SD version 2 */
afd5932b 1298 err = mmc_send_if_cond(mmc);
272cc70b 1299
272cc70b
AF
1300 /* Now try to get the SD card's operating condition */
1301 err = sd_send_op_cond(mmc);
1302
1303 /* If the command timed out, we check for an MMC card */
1304 if (err == TIMEOUT) {
1305 err = mmc_send_op_cond(mmc);
1306
e9550449 1307 if (err && err != IN_PROGRESS) {
56196826 1308#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
272cc70b 1309 printf("Card did not respond to voltage select!\n");
56196826 1310#endif
272cc70b
AF
1311 return UNUSABLE_ERR;
1312 }
1313 }
1314
e9550449
CLC
1315 if (err == IN_PROGRESS)
1316 mmc->init_in_progress = 1;
1317
1318 return err;
1319}
1320
1321static int mmc_complete_init(struct mmc *mmc)
1322{
1323 int err = 0;
1324
1325 if (mmc->op_cond_pending)
1326 err = mmc_complete_op_cond(mmc);
1327
1328 if (!err)
1329 err = mmc_startup(mmc);
bc897b1d
LW
1330 if (err)
1331 mmc->has_init = 0;
1332 else
1333 mmc->has_init = 1;
e9550449
CLC
1334 mmc->init_in_progress = 0;
1335 return err;
1336}
1337
1338int mmc_init(struct mmc *mmc)
1339{
1340 int err = IN_PROGRESS;
d803fea5 1341 unsigned start;
e9550449
CLC
1342
1343 if (mmc->has_init)
1344 return 0;
d803fea5
MZ
1345
1346 start = get_timer(0);
1347
e9550449
CLC
1348 if (!mmc->init_in_progress)
1349 err = mmc_start_init(mmc);
1350
1351 if (!err || err == IN_PROGRESS)
1352 err = mmc_complete_init(mmc);
1353 debug("%s: %d, time %lu\n", __func__, err, get_timer(start));
bc897b1d 1354 return err;
272cc70b
AF
1355}
1356
ab71188c
MN
1357int mmc_set_dsr(struct mmc *mmc, u16 val)
1358{
1359 mmc->dsr = val;
1360 return 0;
1361}
1362
272cc70b
AF
1363/*
1364 * CPU and board-specific MMC initializations. Aliased function
1365 * signals caller to move on
1366 */
1367static int __def_mmc_init(bd_t *bis)
1368{
1369 return -1;
1370}
1371
f9a109b3
PT
1372int cpu_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init")));
1373int board_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init")));
272cc70b 1374
56196826
PB
1375#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1376
272cc70b
AF
1377void print_mmc_devices(char separator)
1378{
1379 struct mmc *m;
1380 struct list_head *entry;
1381
1382 list_for_each(entry, &mmc_devices) {
1383 m = list_entry(entry, struct mmc, link);
1384
93bfd616 1385 printf("%s: %d", m->cfg->name, m->block_dev.dev);
272cc70b
AF
1386
1387 if (entry->next != &mmc_devices)
1388 printf("%c ", separator);
1389 }
1390
1391 printf("\n");
1392}
1393
56196826
PB
1394#else
1395void print_mmc_devices(char separator) { }
1396#endif
1397
ea6ebe21
LW
1398int get_mmc_num(void)
1399{
1400 return cur_dev_num;
1401}
1402
e9550449
CLC
1403void mmc_set_preinit(struct mmc *mmc, int preinit)
1404{
1405 mmc->preinit = preinit;
1406}
1407
1408static void do_preinit(void)
1409{
1410 struct mmc *m;
1411 struct list_head *entry;
1412
1413 list_for_each(entry, &mmc_devices) {
1414 m = list_entry(entry, struct mmc, link);
1415
1416 if (m->preinit)
1417 mmc_start_init(m);
1418 }
1419}
1420
1421
272cc70b
AF
1422int mmc_initialize(bd_t *bis)
1423{
1424 INIT_LIST_HEAD (&mmc_devices);
1425 cur_dev_num = 0;
1426
1427 if (board_mmc_init(bis) < 0)
1428 cpu_mmc_init(bis);
1429
bb0dc108 1430#ifndef CONFIG_SPL_BUILD
272cc70b 1431 print_mmc_devices(',');
bb0dc108 1432#endif
272cc70b 1433
e9550449 1434 do_preinit();
272cc70b
AF
1435 return 0;
1436}
3690d6d6
A
1437
1438#ifdef CONFIG_SUPPORT_EMMC_BOOT
1439/*
1440 * This function changes the size of boot partition and the size of rpmb
1441 * partition present on EMMC devices.
1442 *
1443 * Input Parameters:
1444 * struct *mmc: pointer for the mmc device strcuture
1445 * bootsize: size of boot partition
1446 * rpmbsize: size of rpmb partition
1447 *
1448 * Returns 0 on success.
1449 */
1450
1451int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
1452 unsigned long rpmbsize)
1453{
1454 int err;
1455 struct mmc_cmd cmd;
1456
1457 /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */
1458 cmd.cmdidx = MMC_CMD_RES_MAN;
1459 cmd.resp_type = MMC_RSP_R1b;
1460 cmd.cmdarg = MMC_CMD62_ARG1;
1461
1462 err = mmc_send_cmd(mmc, &cmd, NULL);
1463 if (err) {
1464 debug("mmc_boot_partition_size_change: Error1 = %d\n", err);
1465 return err;
1466 }
1467
1468 /* Boot partition changing mode */
1469 cmd.cmdidx = MMC_CMD_RES_MAN;
1470 cmd.resp_type = MMC_RSP_R1b;
1471 cmd.cmdarg = MMC_CMD62_ARG2;
1472
1473 err = mmc_send_cmd(mmc, &cmd, NULL);
1474 if (err) {
1475 debug("mmc_boot_partition_size_change: Error2 = %d\n", err);
1476 return err;
1477 }
1478 /* boot partition size is multiple of 128KB */
1479 bootsize = (bootsize * 1024) / 128;
1480
1481 /* Arg: boot partition size */
1482 cmd.cmdidx = MMC_CMD_RES_MAN;
1483 cmd.resp_type = MMC_RSP_R1b;
1484 cmd.cmdarg = bootsize;
1485
1486 err = mmc_send_cmd(mmc, &cmd, NULL);
1487 if (err) {
1488 debug("mmc_boot_partition_size_change: Error3 = %d\n", err);
1489 return err;
1490 }
1491 /* RPMB partition size is multiple of 128KB */
1492 rpmbsize = (rpmbsize * 1024) / 128;
1493 /* Arg: RPMB partition size */
1494 cmd.cmdidx = MMC_CMD_RES_MAN;
1495 cmd.resp_type = MMC_RSP_R1b;
1496 cmd.cmdarg = rpmbsize;
1497
1498 err = mmc_send_cmd(mmc, &cmd, NULL);
1499 if (err) {
1500 debug("mmc_boot_partition_size_change: Error4 = %d\n", err);
1501 return err;
1502 }
1503 return 0;
1504}
1505
5a99b9de
TR
1506/*
1507 * Modify EXT_CSD[177] which is BOOT_BUS_WIDTH
1508 * based on the passed in values for BOOT_BUS_WIDTH, RESET_BOOT_BUS_WIDTH
1509 * and BOOT_MODE.
1510 *
1511 * Returns 0 on success.
1512 */
1513int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode)
1514{
1515 int err;
1516
1517 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH,
1518 EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) |
1519 EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) |
1520 EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width));
1521
1522 if (err)
1523 return err;
1524 return 0;
1525}
1526
792970b0
TR
1527/*
1528 * Modify EXT_CSD[179] which is PARTITION_CONFIG (formerly BOOT_CONFIG)
1529 * based on the passed in values for BOOT_ACK, BOOT_PARTITION_ENABLE and
1530 * PARTITION_ACCESS.
1531 *
1532 * Returns 0 on success.
1533 */
1534int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access)
1535{
1536 int err;
1537
1538 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
1539 EXT_CSD_BOOT_ACK(ack) |
1540 EXT_CSD_BOOT_PART_NUM(part_num) |
1541 EXT_CSD_PARTITION_ACCESS(access));
1542
1543 if (err)
1544 return err;
1545 return 0;
1546}
33ace362
TR
1547
1548/*
1549 * Modify EXT_CSD[162] which is RST_n_FUNCTION based on the given value
1550 * for enable. Note that this is a write-once field for non-zero values.
1551 *
1552 * Returns 0 on success.
1553 */
1554int mmc_set_rst_n_function(struct mmc *mmc, u8 enable)
1555{
1556 return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_RST_N_FUNCTION,
1557 enable);
1558}
3690d6d6 1559#endif